ARM GAS /tmp/ccOpL6Dp.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 1 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .file "stm32f4xx_hal_msp.c" 14 .text 15 .Ltext0: 16 .cfi_sections .debug_frame 17 .section .text.HAL_MspInit,"ax",%progbits 18 .align 1 19 .global HAL_MspInit 20 .arch armv7e-m 21 .syntax unified 22 .thumb 23 .thumb_func 24 .fpu fpv4-sp-d16 26 HAL_MspInit: 27 .LFB134: 28 .file 1 "Core/Src/stm32f4xx_hal_msp.c" 1:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f4xx_hal_msp.c **** /** 3:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 4:Core/Src/stm32f4xx_hal_msp.c **** * @file stm32f4xx_hal_msp.c 5:Core/Src/stm32f4xx_hal_msp.c **** * @brief This file provides code for the MSP Initialization 6:Core/Src/stm32f4xx_hal_msp.c **** * and de-Initialization codes. 7:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 8:Core/Src/stm32f4xx_hal_msp.c **** * @attention 9:Core/Src/stm32f4xx_hal_msp.c **** * 10:Core/Src/stm32f4xx_hal_msp.c **** * Copyright (c) 2025 STMicroelectronics. 11:Core/Src/stm32f4xx_hal_msp.c **** * All rights reserved. 12:Core/Src/stm32f4xx_hal_msp.c **** * 13:Core/Src/stm32f4xx_hal_msp.c **** * This software is licensed under terms that can be found in the LICENSE file 14:Core/Src/stm32f4xx_hal_msp.c **** * in the root directory of this software component. 15:Core/Src/stm32f4xx_hal_msp.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 16:Core/Src/stm32f4xx_hal_msp.c **** * 17:Core/Src/stm32f4xx_hal_msp.c **** ****************************************************************************** 18:Core/Src/stm32f4xx_hal_msp.c **** */ 19:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Header */ 20:Core/Src/stm32f4xx_hal_msp.c **** 21:Core/Src/stm32f4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ 22:Core/Src/stm32f4xx_hal_msp.c **** #include "main.h" 23:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Includes */ 24:Core/Src/stm32f4xx_hal_msp.c **** 25:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Includes */ 26:Core/Src/stm32f4xx_hal_msp.c **** 27:Core/Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ 28:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f4xx_hal_msp.c **** 30:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */ ARM GAS /tmp/ccOpL6Dp.s page 2 31:Core/Src/stm32f4xx_hal_msp.c **** 32:Core/Src/stm32f4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ 33:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Define */ 34:Core/Src/stm32f4xx_hal_msp.c **** 35:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Define */ 36:Core/Src/stm32f4xx_hal_msp.c **** 37:Core/Src/stm32f4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ 38:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Macro */ 39:Core/Src/stm32f4xx_hal_msp.c **** 40:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Macro */ 41:Core/Src/stm32f4xx_hal_msp.c **** 42:Core/Src/stm32f4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ 43:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PV */ 44:Core/Src/stm32f4xx_hal_msp.c **** 45:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PV */ 46:Core/Src/stm32f4xx_hal_msp.c **** 47:Core/Src/stm32f4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ 48:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PFP */ 49:Core/Src/stm32f4xx_hal_msp.c **** 50:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PFP */ 51:Core/Src/stm32f4xx_hal_msp.c **** 52:Core/Src/stm32f4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ 53:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ 54:Core/Src/stm32f4xx_hal_msp.c **** 55:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ 56:Core/Src/stm32f4xx_hal_msp.c **** 57:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN 0 */ 58:Core/Src/stm32f4xx_hal_msp.c **** 59:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END 0 */ 60:Core/Src/stm32f4xx_hal_msp.c **** /** 61:Core/Src/stm32f4xx_hal_msp.c **** * Initializes the Global MSP. 62:Core/Src/stm32f4xx_hal_msp.c **** */ 63:Core/Src/stm32f4xx_hal_msp.c **** void HAL_MspInit(void) 64:Core/Src/stm32f4xx_hal_msp.c **** { 29 .loc 1 64 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 8 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 34 0000 82B0 sub sp, sp, #8 35 .LCFI0: 36 .cfi_def_cfa_offset 8 65:Core/Src/stm32f4xx_hal_msp.c **** 66:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ 67:Core/Src/stm32f4xx_hal_msp.c **** 68:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END MspInit 0 */ 69:Core/Src/stm32f4xx_hal_msp.c **** 70:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); 37 .loc 1 70 3 view .LVU1 38 .LBB2: 39 .loc 1 70 3 view .LVU2 40 0002 0021 movs r1, #0 41 0004 0091 str r1, [sp] 42 .loc 1 70 3 view .LVU3 43 0006 0B4B ldr r3, .L3 44 0008 5A6C ldr r2, [r3, #68] 45 000a 42F48042 orr r2, r2, #16384 ARM GAS /tmp/ccOpL6Dp.s page 3 46 000e 5A64 str r2, [r3, #68] 47 .loc 1 70 3 view .LVU4 48 0010 5A6C ldr r2, [r3, #68] 49 0012 02F48042 and r2, r2, #16384 50 0016 0092 str r2, [sp] 51 .loc 1 70 3 view .LVU5 52 0018 009A ldr r2, [sp] 53 .LBE2: 54 .loc 1 70 3 view .LVU6 71:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); 55 .loc 1 71 3 view .LVU7 56 .LBB3: 57 .loc 1 71 3 view .LVU8 58 001a 0191 str r1, [sp, #4] 59 .loc 1 71 3 view .LVU9 60 001c 1A6C ldr r2, [r3, #64] 61 001e 42F08052 orr r2, r2, #268435456 62 0022 1A64 str r2, [r3, #64] 63 .loc 1 71 3 view .LVU10 64 0024 1B6C ldr r3, [r3, #64] 65 0026 03F08053 and r3, r3, #268435456 66 002a 0193 str r3, [sp, #4] 67 .loc 1 71 3 view .LVU11 68 002c 019B ldr r3, [sp, #4] 69 .LBE3: 70 .loc 1 71 3 view .LVU12 72:Core/Src/stm32f4xx_hal_msp.c **** 73:Core/Src/stm32f4xx_hal_msp.c **** /* System interrupt init*/ 74:Core/Src/stm32f4xx_hal_msp.c **** 75:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ 76:Core/Src/stm32f4xx_hal_msp.c **** 77:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END MspInit 1 */ 78:Core/Src/stm32f4xx_hal_msp.c **** } 71 .loc 1 78 1 is_stmt 0 view .LVU13 72 002e 02B0 add sp, sp, #8 73 .LCFI1: 74 .cfi_def_cfa_offset 0 75 @ sp needed 76 0030 7047 bx lr 77 .L4: 78 0032 00BF .align 2 79 .L3: 80 0034 00380240 .word 1073887232 81 .cfi_endproc 82 .LFE134: 84 .section .text.HAL_UART_MspInit,"ax",%progbits 85 .align 1 86 .global HAL_UART_MspInit 87 .syntax unified 88 .thumb 89 .thumb_func 90 .fpu fpv4-sp-d16 92 HAL_UART_MspInit: 93 .LVL0: 94 .LFB135: 79:Core/Src/stm32f4xx_hal_msp.c **** 80:Core/Src/stm32f4xx_hal_msp.c **** /** ARM GAS /tmp/ccOpL6Dp.s page 4 81:Core/Src/stm32f4xx_hal_msp.c **** * @brief UART MSP Initialization 82:Core/Src/stm32f4xx_hal_msp.c **** * This function configures the hardware resources used in this example 83:Core/Src/stm32f4xx_hal_msp.c **** * @param huart: UART handle pointer 84:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 85:Core/Src/stm32f4xx_hal_msp.c **** */ 86:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart) 87:Core/Src/stm32f4xx_hal_msp.c **** { 95 .loc 1 87 1 is_stmt 1 view -0 96 .cfi_startproc 97 @ args = 0, pretend = 0, frame = 32 98 @ frame_needed = 0, uses_anonymous_args = 0 99 .loc 1 87 1 is_stmt 0 view .LVU15 100 0000 00B5 push {lr} 101 .LCFI2: 102 .cfi_def_cfa_offset 4 103 .cfi_offset 14, -4 104 0002 89B0 sub sp, sp, #36 105 .LCFI3: 106 .cfi_def_cfa_offset 40 88:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 107 .loc 1 88 3 is_stmt 1 view .LVU16 108 .loc 1 88 20 is_stmt 0 view .LVU17 109 0004 0023 movs r3, #0 110 0006 0393 str r3, [sp, #12] 111 0008 0493 str r3, [sp, #16] 112 000a 0593 str r3, [sp, #20] 113 000c 0693 str r3, [sp, #24] 114 000e 0793 str r3, [sp, #28] 89:Core/Src/stm32f4xx_hal_msp.c **** if(huart->Instance==USART2) 115 .loc 1 89 3 is_stmt 1 view .LVU18 116 .loc 1 89 11 is_stmt 0 view .LVU19 117 0010 0268 ldr r2, [r0] 118 .loc 1 89 5 view .LVU20 119 0012 144B ldr r3, .L9 120 0014 9A42 cmp r2, r3 121 0016 02D0 beq .L8 122 .LVL1: 123 .L5: 90:Core/Src/stm32f4xx_hal_msp.c **** { 91:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART2_MspInit 0 */ 92:Core/Src/stm32f4xx_hal_msp.c **** 93:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART2_MspInit 0 */ 94:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock enable */ 95:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_USART2_CLK_ENABLE(); 96:Core/Src/stm32f4xx_hal_msp.c **** 97:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 98:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 99:Core/Src/stm32f4xx_hal_msp.c **** PA2 ------> USART2_TX 100:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> USART2_RX 101:Core/Src/stm32f4xx_hal_msp.c **** */ 102:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin; 103:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 106:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 107:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 108:Core/Src/stm32f4xx_hal_msp.c **** ARM GAS /tmp/ccOpL6Dp.s page 5 109:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART2_MspInit 1 */ 110:Core/Src/stm32f4xx_hal_msp.c **** 111:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART2_MspInit 1 */ 112:Core/Src/stm32f4xx_hal_msp.c **** 113:Core/Src/stm32f4xx_hal_msp.c **** } 114:Core/Src/stm32f4xx_hal_msp.c **** 115:Core/Src/stm32f4xx_hal_msp.c **** } 124 .loc 1 115 1 view .LVU21 125 0018 09B0 add sp, sp, #36 126 .LCFI4: 127 .cfi_remember_state 128 .cfi_def_cfa_offset 4 129 @ sp needed 130 001a 5DF804FB ldr pc, [sp], #4 131 .LVL2: 132 .L8: 133 .LCFI5: 134 .cfi_restore_state 95:Core/Src/stm32f4xx_hal_msp.c **** 135 .loc 1 95 5 is_stmt 1 view .LVU22 136 .LBB4: 95:Core/Src/stm32f4xx_hal_msp.c **** 137 .loc 1 95 5 view .LVU23 138 001e 0021 movs r1, #0 139 0020 0191 str r1, [sp, #4] 95:Core/Src/stm32f4xx_hal_msp.c **** 140 .loc 1 95 5 view .LVU24 141 0022 03F5FA33 add r3, r3, #128000 142 0026 1A6C ldr r2, [r3, #64] 143 0028 42F40032 orr r2, r2, #131072 144 002c 1A64 str r2, [r3, #64] 95:Core/Src/stm32f4xx_hal_msp.c **** 145 .loc 1 95 5 view .LVU25 146 002e 1A6C ldr r2, [r3, #64] 147 0030 02F40032 and r2, r2, #131072 148 0034 0192 str r2, [sp, #4] 95:Core/Src/stm32f4xx_hal_msp.c **** 149 .loc 1 95 5 view .LVU26 150 0036 019A ldr r2, [sp, #4] 151 .LBE4: 95:Core/Src/stm32f4xx_hal_msp.c **** 152 .loc 1 95 5 view .LVU27 97:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 153 .loc 1 97 5 view .LVU28 154 .LBB5: 97:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 155 .loc 1 97 5 view .LVU29 156 0038 0291 str r1, [sp, #8] 97:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 157 .loc 1 97 5 view .LVU30 158 003a 1A6B ldr r2, [r3, #48] 159 003c 42F00102 orr r2, r2, #1 160 0040 1A63 str r2, [r3, #48] 97:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 161 .loc 1 97 5 view .LVU31 162 0042 1B6B ldr r3, [r3, #48] 163 0044 03F00103 and r3, r3, #1 ARM GAS /tmp/ccOpL6Dp.s page 6 164 0048 0293 str r3, [sp, #8] 97:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 165 .loc 1 97 5 view .LVU32 166 004a 029B ldr r3, [sp, #8] 167 .LBE5: 97:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 168 .loc 1 97 5 view .LVU33 102:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 169 .loc 1 102 5 view .LVU34 102:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 170 .loc 1 102 25 is_stmt 0 view .LVU35 171 004c 0C23 movs r3, #12 172 004e 0393 str r3, [sp, #12] 103:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 173 .loc 1 103 5 is_stmt 1 view .LVU36 103:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 174 .loc 1 103 26 is_stmt 0 view .LVU37 175 0050 0223 movs r3, #2 176 0052 0493 str r3, [sp, #16] 104:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 177 .loc 1 104 5 is_stmt 1 view .LVU38 105:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 178 .loc 1 105 5 view .LVU39 106:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 179 .loc 1 106 5 view .LVU40 106:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 180 .loc 1 106 31 is_stmt 0 view .LVU41 181 0054 0723 movs r3, #7 182 0056 0793 str r3, [sp, #28] 107:Core/Src/stm32f4xx_hal_msp.c **** 183 .loc 1 107 5 is_stmt 1 view .LVU42 184 0058 03A9 add r1, sp, #12 185 005a 0348 ldr r0, .L9+4 186 .LVL3: 107:Core/Src/stm32f4xx_hal_msp.c **** 187 .loc 1 107 5 is_stmt 0 view .LVU43 188 005c FFF7FEFF bl HAL_GPIO_Init 189 .LVL4: 190 .loc 1 115 1 view .LVU44 191 0060 DAE7 b .L5 192 .L10: 193 0062 00BF .align 2 194 .L9: 195 0064 00440040 .word 1073759232 196 0068 00000240 .word 1073872896 197 .cfi_endproc 198 .LFE135: 200 .section .text.HAL_UART_MspDeInit,"ax",%progbits 201 .align 1 202 .global HAL_UART_MspDeInit 203 .syntax unified 204 .thumb 205 .thumb_func 206 .fpu fpv4-sp-d16 208 HAL_UART_MspDeInit: 209 .LVL5: 210 .LFB136: ARM GAS /tmp/ccOpL6Dp.s page 7 116:Core/Src/stm32f4xx_hal_msp.c **** 117:Core/Src/stm32f4xx_hal_msp.c **** /** 118:Core/Src/stm32f4xx_hal_msp.c **** * @brief UART MSP De-Initialization 119:Core/Src/stm32f4xx_hal_msp.c **** * This function freeze the hardware resources used in this example 120:Core/Src/stm32f4xx_hal_msp.c **** * @param huart: UART handle pointer 121:Core/Src/stm32f4xx_hal_msp.c **** * @retval None 122:Core/Src/stm32f4xx_hal_msp.c **** */ 123:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) 124:Core/Src/stm32f4xx_hal_msp.c **** { 211 .loc 1 124 1 is_stmt 1 view -0 212 .cfi_startproc 213 @ args = 0, pretend = 0, frame = 0 214 @ frame_needed = 0, uses_anonymous_args = 0 215 .loc 1 124 1 is_stmt 0 view .LVU46 216 0000 08B5 push {r3, lr} 217 .LCFI6: 218 .cfi_def_cfa_offset 8 219 .cfi_offset 3, -8 220 .cfi_offset 14, -4 125:Core/Src/stm32f4xx_hal_msp.c **** if(huart->Instance==USART2) 221 .loc 1 125 3 is_stmt 1 view .LVU47 222 .loc 1 125 11 is_stmt 0 view .LVU48 223 0002 0268 ldr r2, [r0] 224 .loc 1 125 5 view .LVU49 225 0004 064B ldr r3, .L15 226 0006 9A42 cmp r2, r3 227 0008 00D0 beq .L14 228 .LVL6: 229 .L11: 126:Core/Src/stm32f4xx_hal_msp.c **** { 127:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART2_MspDeInit 0 */ 128:Core/Src/stm32f4xx_hal_msp.c **** 129:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART2_MspDeInit 0 */ 130:Core/Src/stm32f4xx_hal_msp.c **** /* Peripheral clock disable */ 131:Core/Src/stm32f4xx_hal_msp.c **** __HAL_RCC_USART2_CLK_DISABLE(); 132:Core/Src/stm32f4xx_hal_msp.c **** 133:Core/Src/stm32f4xx_hal_msp.c **** /**USART2 GPIO Configuration 134:Core/Src/stm32f4xx_hal_msp.c **** PA2 ------> USART2_TX 135:Core/Src/stm32f4xx_hal_msp.c **** PA3 ------> USART2_RX 136:Core/Src/stm32f4xx_hal_msp.c **** */ 137:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin); 138:Core/Src/stm32f4xx_hal_msp.c **** 139:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART2_MspDeInit 1 */ 140:Core/Src/stm32f4xx_hal_msp.c **** 141:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END USART2_MspDeInit 1 */ 142:Core/Src/stm32f4xx_hal_msp.c **** } 143:Core/Src/stm32f4xx_hal_msp.c **** 144:Core/Src/stm32f4xx_hal_msp.c **** } 230 .loc 1 144 1 view .LVU50 231 000a 08BD pop {r3, pc} 232 .LVL7: 233 .L14: 131:Core/Src/stm32f4xx_hal_msp.c **** 234 .loc 1 131 5 is_stmt 1 view .LVU51 235 000c 054A ldr r2, .L15+4 236 000e 136C ldr r3, [r2, #64] 237 0010 23F40033 bic r3, r3, #131072 ARM GAS /tmp/ccOpL6Dp.s page 8 238 0014 1364 str r3, [r2, #64] 137:Core/Src/stm32f4xx_hal_msp.c **** 239 .loc 1 137 5 view .LVU52 240 0016 0C21 movs r1, #12 241 0018 0348 ldr r0, .L15+8 242 .LVL8: 137:Core/Src/stm32f4xx_hal_msp.c **** 243 .loc 1 137 5 is_stmt 0 view .LVU53 244 001a FFF7FEFF bl HAL_GPIO_DeInit 245 .LVL9: 246 .loc 1 144 1 view .LVU54 247 001e F4E7 b .L11 248 .L16: 249 .align 2 250 .L15: 251 0020 00440040 .word 1073759232 252 0024 00380240 .word 1073887232 253 0028 00000240 .word 1073872896 254 .cfi_endproc 255 .LFE136: 257 .text 258 .Letext0: 259 .file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h" 260 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h" 261 .file 4 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 262 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 263 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" 264 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h" ARM GAS /tmp/ccOpL6Dp.s page 9 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_hal_msp.c /tmp/ccOpL6Dp.s:18 .text.HAL_MspInit:0000000000000000 $t /tmp/ccOpL6Dp.s:26 .text.HAL_MspInit:0000000000000000 HAL_MspInit /tmp/ccOpL6Dp.s:80 .text.HAL_MspInit:0000000000000034 $d /tmp/ccOpL6Dp.s:85 .text.HAL_UART_MspInit:0000000000000000 $t /tmp/ccOpL6Dp.s:92 .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit /tmp/ccOpL6Dp.s:195 .text.HAL_UART_MspInit:0000000000000064 $d /tmp/ccOpL6Dp.s:201 .text.HAL_UART_MspDeInit:0000000000000000 $t /tmp/ccOpL6Dp.s:208 .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit /tmp/ccOpL6Dp.s:251 .text.HAL_UART_MspDeInit:0000000000000020 $d UNDEFINED SYMBOLS HAL_GPIO_Init HAL_GPIO_DeInit