ARM GAS /tmp/ccnj6RPV.s page 1 1 .cpu cortex-m4 2 .eabi_attribute 27, 1 3 .eabi_attribute 28, 1 4 .eabi_attribute 20, 1 5 .eabi_attribute 21, 1 6 .eabi_attribute 23, 3 7 .eabi_attribute 24, 1 8 .eabi_attribute 25, 1 9 .eabi_attribute 26, 1 10 .eabi_attribute 30, 1 11 .eabi_attribute 34, 1 12 .eabi_attribute 18, 4 13 .file "stm32f4xx_hal_rcc.c" 14 .text 15 .Ltext0: 16 .cfi_sections .debug_frame 17 .section .text.HAL_RCC_DeInit,"ax",%progbits 18 .align 1 19 .weak HAL_RCC_DeInit 20 .arch armv7e-m 21 .syntax unified 22 .thumb 23 .thumb_func 24 .fpu fpv4-sp-d16 26 HAL_RCC_DeInit: 27 .LFB134: 28 .file 1 "Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c" 1:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 2:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 3:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @file stm32f4xx_hal_rcc.c 4:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @author MCD Application Team 5:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver. 6:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This file provides firmware functions to manage the following 7:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: 8:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * + Peripheral Control functions 10:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 11:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 12:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 13:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC specific features ##### 14:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 15:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 16:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator 17:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSI 16MHz) with Flash 0 wait state, Flash prefetch buffer, D-Cache 18:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and I-Cache are disabled, and all peripherals are off except internal 19:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SRAM, Flash and JTAG. 20:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses; 21:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** all peripherals mapped on these busses are running at HSI speed. 22:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. 23:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which 24:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** are assigned to be used for debug purpose. 25:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 26:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 27:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Once the device started from reset, the user application has to: 28:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock 29:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (if the application needs higher frequency/performance) 30:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings ARM GAS /tmp/ccnj6RPV.s page 2 31:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the AHB and APB busses prescalers 32:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used 33:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals which clocks are not 34:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** derived from the System clock (I2S, RTC, ADC, USB OTG FS/SDIO/RNG) 35:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 36:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### RCC Limitations ##### 37:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ============================================================================== 38:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 39:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral 40:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write 41:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from/to registers. 42:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. 43:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on AHB: the delay is 2 AHB clock cycle 44:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register 45:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) If peripheral is mapped on APB: the delay is 2 APB clock cycle 46:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** after the clock enable bit is set on the hardware register 47:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 48:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 49:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Implemented Workaround: 50:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (+) For AHB & APB peripherals, a dummy read to the peripheral register has been 51:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. 52:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 53:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 54:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 55:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @attention 56:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 57:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * Copyright (c) 2017 STMicroelectronics. 58:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * All rights reserved. 59:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 60:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This software is licensed under terms that can be found in the LICENSE file in 61:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the root directory of this software component. 62:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 63:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ****************************************************************************** 64:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 65:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 66:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ 67:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #include "stm32f4xx_hal.h" 68:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 69:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup STM32F4xx_HAL_Driver 70:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 71:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 72:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 73:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC RCC 74:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC HAL module driver 75:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 76:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 77:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 78:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED 79:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 80:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ 81:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ 82:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @addtogroup RCC_Private_Constants 83:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 84:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 85:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 86:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ 87:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() ARM GAS /tmp/ccnj6RPV.s page 3 88:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA 89:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 90:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 91:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define __MCO2_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE() 92:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_GPIO_PORT GPIOC 93:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #define MCO2_PIN GPIO_PIN_9 94:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 95:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 96:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 97:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 98:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ 99:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables 100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ 106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Private functions ---------------------------------------------------------*/ 107:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 108:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions 109:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 110:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 111:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 112:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 113:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initialization and Configuration functions 114:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 115:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 116:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 117:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### 118:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 119:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 120:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators 121:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HSE, HSI, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK, AHB, APB1 122:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and APB2). 123:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 124:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration 125:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSI (high-speed internal), 16 MHz factory-trimmed RC used directly or through 126:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the PLL as System clock source. 127:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 128:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSI (low-speed internal), 32 KHz low consumption RC used as IWDG and/or RTC 129:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source. 130:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 131:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 26 MHz crystal oscillator used directly or 132:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. 133:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 134:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. 135:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 136:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) PLL (clocked by HSI or HSE), featuring two different output clocks: 137:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 168 MHz) 138:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB OTG FS (48 MHz), 139:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the random analog generator (<=48 MHz) and the SDIO (<= 48 MHz). 140:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 141:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() 142:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System 143:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt 144:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M4 NMI ARM GAS /tmp/ccnj6RPV.s page 4 145:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. 146:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 147:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO1 (microcontroller clock output), used to output HSI, LSE, HSE or PLL 148:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PA8 pin. 149:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 150:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) MCO2 (microcontroller clock output), used to output HSE, PLL, SYSCLK or PLLI2S 151:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** clock (through a configurable prescaler) on PC9 pin. 152:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 153:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] System, AHB and APB busses clocks configuration 154:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, 155:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HSE and PLL. 156:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable 157:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped 158:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) and APB2 (PCLK2) clocks are derived 159:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock 160:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the peripherals mapped on these busses. You can use 161:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. 162:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 163:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F405xx/07xx and STM32F415xx/17xx devices, the maximum 164:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequency of the SYSCLK and HCLK is 168 MHz, PCLK2 84 MHz and PCLK1 42 MHz. 165:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 166:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 167:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 168:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F42xxx, STM32F43xxx, STM32F446xx, STM32F469xx and STM32F479xx devices, 169:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the maximum frequency of the SYSCLK and HCLK is 180 MHz, PCLK2 90 MHz and PCLK1 45 MHz 170:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 171:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 172:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 173:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F401xx, the maximum frequency of the SYSCLK and HCLK is 84 MHz, 174:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 84 MHz and PCLK1 42 MHz. 175:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 176:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 177:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 178:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (#) For the STM32F41xxx, the maximum frequency of the SYSCLK and HCLK is 100 MHz, 179:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** PCLK2 100 MHz and PCLK1 50 MHz. 180:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** Depending on the device voltage range, the maximum frequency should 181:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** be adapted accordingly (refer to the product datasheets for more details). 182:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 183:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 184:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 185:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 186:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 187:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 188:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. 189:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: 190:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSI ON and used as system clock source 191:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - HSE and PLL OFF 192:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - AHB, APB1 and APB2 prescaler set to 1. 193:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - CSS, MCO1 and MCO2 OFF 194:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - All interrupts disabled 195:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function doesn't modify the configuration of the 196:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - Peripheral clocks 197:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * - LSI, LSE and RTC clocks 198:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status 199:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 200:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_DeInit(void) 201:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccnj6RPV.s page 5 29 .loc 1 201 1 view -0 30 .cfi_startproc 31 @ args = 0, pretend = 0, frame = 0 32 @ frame_needed = 0, uses_anonymous_args = 0 33 @ link register save eliminated. 202:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 34 .loc 1 202 3 view .LVU1 203:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 35 .loc 1 203 1 is_stmt 0 view .LVU2 36 0000 0020 movs r0, #0 37 0002 7047 bx lr 38 .cfi_endproc 39 .LFE134: 41 .section .text.HAL_RCC_OscConfig,"ax",%progbits 42 .align 1 43 .weak HAL_RCC_OscConfig 44 .syntax unified 45 .thumb 46 .thumb_func 47 .fpu fpv4-sp-d16 49 HAL_RCC_OscConfig: 50 .LVL0: 51 .LFB135: 204:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 205:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 206:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the 207:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC_OscInitTypeDef. 208:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 209:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. 210:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. 211:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not 212:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to LSE Off 213:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. 214:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not 215:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * supported by this API. User should request a transition to HSE Off 216:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. 217:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HAL status 218:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 219:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 52 .loc 1 220 1 is_stmt 1 view -0 53 .cfi_startproc 54 @ args = 0, pretend = 0, frame = 8 55 @ frame_needed = 0, uses_anonymous_args = 0 221:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 56 .loc 1 221 3 view .LVU4 222:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pll_config; 57 .loc 1 222 3 view .LVU5 223:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */ 224:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_OscInitStruct == NULL) 58 .loc 1 224 3 view .LVU6 59 .loc 1 224 6 is_stmt 0 view .LVU7 60 0000 0028 cmp r0, #0 61 0002 00F0E081 beq .L52 220:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 62 .loc 1 220 1 view .LVU8 63 0006 70B5 push {r4, r5, r6, lr} ARM GAS /tmp/ccnj6RPV.s page 6 64 .LCFI0: 65 .cfi_def_cfa_offset 16 66 .cfi_offset 4, -16 67 .cfi_offset 5, -12 68 .cfi_offset 6, -8 69 .cfi_offset 14, -4 70 0008 82B0 sub sp, sp, #8 71 .LCFI1: 72 .cfi_def_cfa_offset 24 73 000a 0446 mov r4, r0 225:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 227:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 228:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 229:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 230:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); 74 .loc 1 230 3 is_stmt 1 view .LVU9 231:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ 232:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 75 .loc 1 232 3 view .LVU10 76 .loc 1 232 26 is_stmt 0 view .LVU11 77 000c 0368 ldr r3, [r0] 78 .loc 1 232 6 view .LVU12 79 000e 13F0010F tst r3, #1 80 0012 3BD0 beq .L4 233:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 234:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 235:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); 81 .loc 1 235 5 is_stmt 1 view .LVU13 236:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not dis 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \ 82 .loc 1 237 5 view .LVU14 83 .loc 1 237 10 is_stmt 0 view .LVU15 84 0014 9F4B ldr r3, .L93 85 0016 9B68 ldr r3, [r3, #8] 86 0018 03F00C03 and r3, r3, #12 87 .loc 1 237 8 view .LVU16 88 001c 042B cmp r3, #4 89 001e 2CD0 beq .L5 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC 90 .loc 1 238 11 discriminator 1 view .LVU17 91 0020 9C4B ldr r3, .L93 92 0022 9B68 ldr r3, [r3, #8] 93 0024 03F00C03 and r3, r3, #12 237:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC 94 .loc 1 237 61 discriminator 1 view .LVU18 95 0028 082B cmp r3, #8 96 002a 21D0 beq .L79 97 .L6: 239:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE 241:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 243:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 244:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 245:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 246:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccnj6RPV.s page 7 247:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 98 .loc 1 248 7 is_stmt 1 view .LVU19 99 .loc 1 248 7 view .LVU20 100 002c 6368 ldr r3, [r4, #4] 101 002e B3F5803F cmp r3, #65536 102 0032 4FD0 beq .L80 103 .loc 1 248 7 discriminator 2 view .LVU21 104 0034 B3F5A02F cmp r3, #327680 105 0038 52D0 beq .L81 106 .loc 1 248 7 discriminator 5 view .LVU22 107 003a 964B ldr r3, .L93 108 003c 1A68 ldr r2, [r3] 109 003e 22F48032 bic r2, r2, #65536 110 0042 1A60 str r2, [r3] 111 .loc 1 248 7 discriminator 5 view .LVU23 112 0044 1A68 ldr r2, [r3] 113 0046 22F48022 bic r2, r2, #262144 114 004a 1A60 str r2, [r3] 115 .L8: 116 .loc 1 248 7 discriminator 7 view .LVU24 249:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 250:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE State */ 251:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) 117 .loc 1 251 7 discriminator 7 view .LVU25 118 .loc 1 251 29 is_stmt 0 discriminator 7 view .LVU26 119 004c 6368 ldr r3, [r4, #4] 120 .loc 1 251 10 discriminator 7 view .LVU27 121 004e 002B cmp r3, #0 122 0050 50D0 beq .L10 252:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 253:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 254:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 123 .loc 1 254 9 is_stmt 1 view .LVU28 124 .loc 1 254 21 is_stmt 0 view .LVU29 125 0052 FFF7FEFF bl HAL_GetTick 126 .LVL1: 127 .loc 1 254 21 view .LVU30 128 0056 0546 mov r5, r0 129 .LVL2: 255:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 256:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is ready */ 257:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 130 .loc 1 257 9 is_stmt 1 view .LVU31 131 .L11: 132 .loc 1 257 15 view .LVU32 133 .loc 1 257 16 is_stmt 0 view .LVU33 134 0058 8E4B ldr r3, .L93 135 005a 1B68 ldr r3, [r3] 136 .loc 1 257 15 view .LVU34 137 005c 13F4003F tst r3, #131072 138 0060 14D1 bne .L4 258:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 259:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 139 .loc 1 259 11 is_stmt 1 view .LVU35 140 .loc 1 259 16 is_stmt 0 view .LVU36 141 0062 FFF7FEFF bl HAL_GetTick ARM GAS /tmp/ccnj6RPV.s page 8 142 .LVL3: 143 .loc 1 259 30 view .LVU37 144 0066 401B subs r0, r0, r5 145 .loc 1 259 14 view .LVU38 146 0068 6428 cmp r0, #100 147 006a F5D9 bls .L11 260:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 261:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 148 .loc 1 261 20 view .LVU39 149 006c 0320 movs r0, #3 150 006e B1E1 b .L3 151 .LVL4: 152 .L79: 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 153 .loc 1 238 70 view .LVU40 154 0070 884B ldr r3, .L93 155 0072 5B68 ldr r3, [r3, #4] 238:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 156 .loc 1 238 62 view .LVU41 157 0074 13F4800F tst r3, #4194304 158 0078 D8D0 beq .L6 159 .L5: 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 160 .loc 1 240 7 is_stmt 1 view .LVU42 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 161 .loc 1 240 12 is_stmt 0 view .LVU43 162 007a 864B ldr r3, .L93 163 007c 1B68 ldr r3, [r3] 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 164 .loc 1 240 10 view .LVU44 165 007e 13F4003F tst r3, #131072 166 0082 03D0 beq .L4 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 167 .loc 1 240 79 discriminator 1 view .LVU45 168 0084 6368 ldr r3, [r4, #4] 240:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 169 .loc 1 240 58 discriminator 1 view .LVU46 170 0086 002B cmp r3, #0 171 0088 00F09F81 beq .L82 172 .LVL5: 173 .L4: 262:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 263:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 264:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 265:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 266:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 267:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 269:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 270:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSE is bypassed or disabled */ 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 272:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 274:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 276:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 277:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } ARM GAS /tmp/ccnj6RPV.s page 9 278:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 279:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 280:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 281:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ 282:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 174 .loc 1 282 3 is_stmt 1 view .LVU47 175 .loc 1 282 26 is_stmt 0 view .LVU48 176 008c 2368 ldr r3, [r4] 177 .loc 1 282 6 view .LVU49 178 008e 13F0020F tst r3, #2 179 0092 54D0 beq .L15 283:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 284:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 285:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); 180 .loc 1 285 5 is_stmt 1 view .LVU50 286:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); 181 .loc 1 286 5 view .LVU51 287:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 288:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) || \ 182 .loc 1 289 5 view .LVU52 183 .loc 1 289 10 is_stmt 0 view .LVU53 184 0094 7F4B ldr r3, .L93 185 0096 9B68 ldr r3, [r3, #8] 186 .loc 1 289 8 view .LVU54 187 0098 13F00C0F tst r3, #12 188 009c 3ED0 beq .L16 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC 189 .loc 1 290 11 discriminator 1 view .LVU55 190 009e 7D4B ldr r3, .L93 191 00a0 9B68 ldr r3, [r3, #8] 192 00a2 03F00C03 and r3, r3, #12 289:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC 193 .loc 1 289 61 discriminator 1 view .LVU56 194 00a6 082B cmp r3, #8 195 00a8 33D0 beq .L83 196 .L17: 291:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 292:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI 294:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 296:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 297:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ 298:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 299:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 300:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 302:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 303:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 304:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 305:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 306:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI State */ 307:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF) 197 .loc 1 307 7 is_stmt 1 view .LVU57 198 .loc 1 307 29 is_stmt 0 view .LVU58 199 00aa E368 ldr r3, [r4, #12] ARM GAS /tmp/ccnj6RPV.s page 10 200 .loc 1 307 10 view .LVU59 201 00ac 002B cmp r3, #0 202 00ae 68D0 beq .L19 308:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 309:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ 310:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); 203 .loc 1 310 9 is_stmt 1 view .LVU60 204 00b0 794B ldr r3, .L93+4 205 00b2 0122 movs r2, #1 206 00b4 1A60 str r2, [r3] 311:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 312:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 313:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 207 .loc 1 313 9 view .LVU61 208 .loc 1 313 21 is_stmt 0 view .LVU62 209 00b6 FFF7FEFF bl HAL_GetTick 210 .LVL6: 211 00ba 0546 mov r5, r0 212 .LVL7: 314:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 315:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */ 316:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 213 .loc 1 316 9 is_stmt 1 view .LVU63 214 .L20: 215 .loc 1 316 15 view .LVU64 216 .loc 1 316 16 is_stmt 0 view .LVU65 217 00bc 754B ldr r3, .L93 218 00be 1B68 ldr r3, [r3] 219 .loc 1 316 15 view .LVU66 220 00c0 13F0020F tst r3, #2 221 00c4 54D1 bne .L84 317:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 318:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 222 .loc 1 318 11 is_stmt 1 view .LVU67 223 .loc 1 318 16 is_stmt 0 view .LVU68 224 00c6 FFF7FEFF bl HAL_GetTick 225 .LVL8: 226 .loc 1 318 30 view .LVU69 227 00ca 401B subs r0, r0, r5 228 .loc 1 318 14 view .LVU70 229 00cc 0228 cmp r0, #2 230 00ce F5D9 bls .L20 319:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 320:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 231 .loc 1 320 20 view .LVU71 232 00d0 0320 movs r0, #3 233 00d2 7FE1 b .L3 234 .LVL9: 235 .L80: 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 236 .loc 1 248 7 is_stmt 1 discriminator 1 view .LVU72 237 00d4 6F4A ldr r2, .L93 238 00d6 1368 ldr r3, [r2] 239 00d8 43F48033 orr r3, r3, #65536 240 00dc 1360 str r3, [r2] 241 00de B5E7 b .L8 242 .L81: ARM GAS /tmp/ccnj6RPV.s page 11 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 243 .loc 1 248 7 discriminator 4 view .LVU73 244 00e0 6C4B ldr r3, .L93 245 00e2 1A68 ldr r2, [r3] 246 00e4 42F48022 orr r2, r2, #262144 247 00e8 1A60 str r2, [r3] 248:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 248 .loc 1 248 7 discriminator 4 view .LVU74 249 00ea 1A68 ldr r2, [r3] 250 00ec 42F48032 orr r2, r2, #65536 251 00f0 1A60 str r2, [r3] 252 00f2 ABE7 b .L8 253 .L10: 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 254 .loc 1 268 9 view .LVU75 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 255 .loc 1 268 21 is_stmt 0 view .LVU76 256 00f4 FFF7FEFF bl HAL_GetTick 257 .LVL10: 268:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 258 .loc 1 268 21 view .LVU77 259 00f8 0546 mov r5, r0 260 .LVL11: 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 261 .loc 1 271 9 is_stmt 1 view .LVU78 262 .L13: 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 263 .loc 1 271 15 view .LVU79 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 264 .loc 1 271 16 is_stmt 0 view .LVU80 265 00fa 664B ldr r3, .L93 266 00fc 1B68 ldr r3, [r3] 271:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 267 .loc 1 271 15 view .LVU81 268 00fe 13F4003F tst r3, #131072 269 0102 C3D0 beq .L4 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 270 .loc 1 273 11 is_stmt 1 view .LVU82 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 271 .loc 1 273 16 is_stmt 0 view .LVU83 272 0104 FFF7FEFF bl HAL_GetTick 273 .LVL12: 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 274 .loc 1 273 30 view .LVU84 275 0108 401B subs r0, r0, r5 273:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 276 .loc 1 273 14 view .LVU85 277 010a 6428 cmp r0, #100 278 010c F5D9 bls .L13 275:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 279 .loc 1 275 20 view .LVU86 280 010e 0320 movs r0, #3 281 0110 60E1 b .L3 282 .LVL13: 283 .L83: 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 284 .loc 1 290 70 view .LVU87 ARM GAS /tmp/ccnj6RPV.s page 12 285 0112 604B ldr r3, .L93 286 0114 5B68 ldr r3, [r3, #4] 290:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 287 .loc 1 290 62 view .LVU88 288 0116 13F4800F tst r3, #4194304 289 011a C6D1 bne .L17 290 .L16: 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 291 .loc 1 293 7 is_stmt 1 view .LVU89 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 292 .loc 1 293 12 is_stmt 0 view .LVU90 293 011c 5D4B ldr r3, .L93 294 011e 1B68 ldr r3, [r3] 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 295 .loc 1 293 10 view .LVU91 296 0120 13F0020F tst r3, #2 297 0124 03D0 beq .L18 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 298 .loc 1 293 79 discriminator 1 view .LVU92 299 0126 E368 ldr r3, [r4, #12] 293:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 300 .loc 1 293 58 discriminator 1 view .LVU93 301 0128 012B cmp r3, #1 302 012a 40F05081 bne .L56 303 .L18: 301:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 304 .loc 1 301 9 is_stmt 1 view .LVU94 305 012e 594A ldr r2, .L93 306 0130 1368 ldr r3, [r2] 307 0132 23F0F803 bic r3, r3, #248 308 0136 2169 ldr r1, [r4, #16] 309 0138 43EAC103 orr r3, r3, r1, lsl #3 310 013c 1360 str r3, [r2] 311 .L15: 321:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 322:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 323:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 324:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value. */ 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 326:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 327:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 328:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 329:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); 331:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 332:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 334:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 335:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till HSI is ready */ 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 337:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 339:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 341:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 342:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 343:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } ARM GAS /tmp/ccnj6RPV.s page 13 344:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 345:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 346:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ 347:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 312 .loc 1 347 3 view .LVU95 313 .loc 1 347 26 is_stmt 0 view .LVU96 314 013e 2368 ldr r3, [r4] 315 .loc 1 347 6 view .LVU97 316 0140 13F0080F tst r3, #8 317 0144 42D0 beq .L24 348:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 349:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 350:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); 318 .loc 1 350 5 is_stmt 1 view .LVU98 351:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 352:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSI State */ 353:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF) 319 .loc 1 353 5 view .LVU99 320 .loc 1 353 27 is_stmt 0 view .LVU100 321 0146 6369 ldr r3, [r4, #20] 322 .loc 1 353 8 view .LVU101 323 0148 6BB3 cbz r3, .L25 354:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 355:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ 356:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); 324 .loc 1 356 7 is_stmt 1 view .LVU102 325 014a 534B ldr r3, .L93+4 326 014c 0122 movs r2, #1 327 014e C3F8802E str r2, [r3, #3712] 357:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 358:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 359:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 328 .loc 1 359 7 view .LVU103 329 .loc 1 359 19 is_stmt 0 view .LVU104 330 0152 FFF7FEFF bl HAL_GetTick 331 .LVL14: 332 0156 0546 mov r5, r0 333 .LVL15: 360:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 361:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */ 362:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 334 .loc 1 362 7 is_stmt 1 view .LVU105 335 .L26: 336 .loc 1 362 13 view .LVU106 337 .loc 1 362 14 is_stmt 0 view .LVU107 338 0158 4E4B ldr r3, .L93 339 015a 5B6F ldr r3, [r3, #116] 340 .loc 1 362 13 view .LVU108 341 015c 13F0020F tst r3, #2 342 0160 34D1 bne .L24 363:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 364:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 343 .loc 1 364 9 is_stmt 1 view .LVU109 344 .loc 1 364 14 is_stmt 0 view .LVU110 345 0162 FFF7FEFF bl HAL_GetTick 346 .LVL16: 347 .loc 1 364 28 view .LVU111 ARM GAS /tmp/ccnj6RPV.s page 14 348 0166 401B subs r0, r0, r5 349 .loc 1 364 12 view .LVU112 350 0168 0228 cmp r0, #2 351 016a F5D9 bls .L26 365:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 366:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 352 .loc 1 366 18 view .LVU113 353 016c 0320 movs r0, #3 354 016e 31E1 b .L3 355 .L84: 325:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 356 .loc 1 325 9 is_stmt 1 view .LVU114 357 0170 484A ldr r2, .L93 358 0172 1368 ldr r3, [r2] 359 0174 23F0F803 bic r3, r3, #248 360 0178 2169 ldr r1, [r4, #16] 361 017a 43EAC103 orr r3, r3, r1, lsl #3 362 017e 1360 str r3, [r2] 363 0180 DDE7 b .L15 364 .LVL17: 365 .L19: 330:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 366 .loc 1 330 9 view .LVU115 367 0182 454B ldr r3, .L93+4 368 0184 0022 movs r2, #0 369 0186 1A60 str r2, [r3] 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 370 .loc 1 333 9 view .LVU116 333:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 371 .loc 1 333 21 is_stmt 0 view .LVU117 372 0188 FFF7FEFF bl HAL_GetTick 373 .LVL18: 374 018c 0546 mov r5, r0 375 .LVL19: 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 376 .loc 1 336 9 is_stmt 1 view .LVU118 377 .L22: 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 378 .loc 1 336 15 view .LVU119 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 379 .loc 1 336 16 is_stmt 0 view .LVU120 380 018e 414B ldr r3, .L93 381 0190 1B68 ldr r3, [r3] 336:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 382 .loc 1 336 15 view .LVU121 383 0192 13F0020F tst r3, #2 384 0196 D2D0 beq .L15 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 385 .loc 1 338 11 is_stmt 1 view .LVU122 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 386 .loc 1 338 16 is_stmt 0 view .LVU123 387 0198 FFF7FEFF bl HAL_GetTick 388 .LVL20: 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 389 .loc 1 338 30 view .LVU124 390 019c 401B subs r0, r0, r5 338:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccnj6RPV.s page 15 391 .loc 1 338 14 view .LVU125 392 019e 0228 cmp r0, #2 393 01a0 F5D9 bls .L22 340:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 394 .loc 1 340 20 view .LVU126 395 01a2 0320 movs r0, #3 396 01a4 16E1 b .L3 397 .LVL21: 398 .L25: 367:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 368:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 369:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 370:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 371:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 372:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ 373:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); 399 .loc 1 373 7 is_stmt 1 view .LVU127 400 01a6 3C4B ldr r3, .L93+4 401 01a8 0022 movs r2, #0 402 01aa C3F8802E str r2, [r3, #3712] 374:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 375:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 376:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 403 .loc 1 376 7 view .LVU128 404 .loc 1 376 19 is_stmt 0 view .LVU129 405 01ae FFF7FEFF bl HAL_GetTick 406 .LVL22: 407 01b2 0546 mov r5, r0 408 .LVL23: 377:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 378:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSI is ready */ 379:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 409 .loc 1 379 7 is_stmt 1 view .LVU130 410 .L28: 411 .loc 1 379 13 view .LVU131 412 .loc 1 379 14 is_stmt 0 view .LVU132 413 01b4 374B ldr r3, .L93 414 01b6 5B6F ldr r3, [r3, #116] 415 .loc 1 379 13 view .LVU133 416 01b8 13F0020F tst r3, #2 417 01bc 06D0 beq .L24 380:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 381:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 418 .loc 1 381 9 is_stmt 1 view .LVU134 419 .loc 1 381 14 is_stmt 0 view .LVU135 420 01be FFF7FEFF bl HAL_GetTick 421 .LVL24: 422 .loc 1 381 28 view .LVU136 423 01c2 401B subs r0, r0, r5 424 .loc 1 381 12 view .LVU137 425 01c4 0228 cmp r0, #2 426 01c6 F5D9 bls .L28 382:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 383:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 427 .loc 1 383 18 view .LVU138 428 01c8 0320 movs r0, #3 429 01ca 03E1 b .L3 ARM GAS /tmp/ccnj6RPV.s page 16 430 .LVL25: 431 .L24: 384:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 385:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 386:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 387:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 388:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ 389:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 432 .loc 1 389 3 is_stmt 1 view .LVU139 433 .loc 1 389 26 is_stmt 0 view .LVU140 434 01cc 2368 ldr r3, [r4] 435 .loc 1 389 6 view .LVU141 436 01ce 13F0040F tst r3, #4 437 01d2 77D0 beq .L30 438 .LBB2: 390:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; 439 .loc 1 391 5 is_stmt 1 view .LVU142 440 .LVL26: 392:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 393:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 394:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); 441 .loc 1 394 5 view .LVU143 395:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 396:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ 397:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ 398:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 442 .loc 1 398 5 view .LVU144 443 .loc 1 398 9 is_stmt 0 view .LVU145 444 01d4 2F4B ldr r3, .L93 445 01d6 1B6C ldr r3, [r3, #64] 446 .loc 1 398 8 view .LVU146 447 01d8 13F0805F tst r3, #268435456 448 01dc 33D1 bne .L61 399:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 400:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); 449 .loc 1 400 7 is_stmt 1 view .LVU147 450 .LBB3: 451 .loc 1 400 7 view .LVU148 452 01de 0023 movs r3, #0 453 01e0 0193 str r3, [sp, #4] 454 .loc 1 400 7 view .LVU149 455 01e2 2C4B ldr r3, .L93 456 01e4 1A6C ldr r2, [r3, #64] 457 01e6 42F08052 orr r2, r2, #268435456 458 01ea 1A64 str r2, [r3, #64] 459 .loc 1 400 7 view .LVU150 460 01ec 1B6C ldr r3, [r3, #64] 461 01ee 03F08053 and r3, r3, #268435456 462 01f2 0193 str r3, [sp, #4] 463 .loc 1 400 7 view .LVU151 464 01f4 019B ldr r3, [sp, #4] 465 .LBE3: 466 .loc 1 400 7 view .LVU152 401:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pwrclkchanged = SET; 467 .loc 1 401 7 view .LVU153 468 .LVL27: ARM GAS /tmp/ccnj6RPV.s page 17 469 .loc 1 401 21 is_stmt 0 view .LVU154 470 01f6 0125 movs r5, #1 471 .LVL28: 472 .L31: 402:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 403:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 404:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 473 .loc 1 404 5 is_stmt 1 view .LVU155 474 .loc 1 404 9 is_stmt 0 view .LVU156 475 01f8 284B ldr r3, .L93+8 476 01fa 1B68 ldr r3, [r3] 477 .loc 1 404 8 view .LVU157 478 01fc 13F4807F tst r3, #256 479 0200 23D0 beq .L85 480 .L32: 405:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 406:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable write access to Backup domain */ 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); 408:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 409:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 411:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 413:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 415:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 417:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 418:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 419:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 420:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 421:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 481 .loc 1 422 5 is_stmt 1 view .LVU158 482 .loc 1 422 5 view .LVU159 483 0202 A368 ldr r3, [r4, #8] 484 0204 012B cmp r3, #1 485 0206 34D0 beq .L86 486 .loc 1 422 5 discriminator 2 view .LVU160 487 0208 052B cmp r3, #5 488 020a 38D0 beq .L87 489 .loc 1 422 5 discriminator 5 view .LVU161 490 020c 214B ldr r3, .L93 491 020e 1A6F ldr r2, [r3, #112] 492 0210 22F00102 bic r2, r2, #1 493 0214 1A67 str r2, [r3, #112] 494 .loc 1 422 5 discriminator 5 view .LVU162 495 0216 1A6F ldr r2, [r3, #112] 496 0218 22F00402 bic r2, r2, #4 497 021c 1A67 str r2, [r3, #112] 498 .L36: 499 .loc 1 422 5 discriminator 7 view .LVU163 423:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 424:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) 500 .loc 1 424 5 discriminator 7 view .LVU164 501 .loc 1 424 27 is_stmt 0 discriminator 7 view .LVU165 502 021e A368 ldr r3, [r4, #8] ARM GAS /tmp/ccnj6RPV.s page 18 503 .loc 1 424 8 discriminator 7 view .LVU166 504 0220 002B cmp r3, #0 505 0222 3DD0 beq .L38 425:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 426:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick*/ 427:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 506 .loc 1 427 7 is_stmt 1 view .LVU167 507 .loc 1 427 19 is_stmt 0 view .LVU168 508 0224 FFF7FEFF bl HAL_GetTick 509 .LVL29: 510 0228 0646 mov r6, r0 511 .LVL30: 428:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 429:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */ 430:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 512 .loc 1 430 7 is_stmt 1 view .LVU169 513 .L39: 514 .loc 1 430 13 view .LVU170 515 .loc 1 430 14 is_stmt 0 view .LVU171 516 022a 1A4B ldr r3, .L93 517 022c 1B6F ldr r3, [r3, #112] 518 .loc 1 430 13 view .LVU172 519 022e 13F0020F tst r3, #2 520 0232 46D1 bne .L41 431:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 432:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 521 .loc 1 432 9 is_stmt 1 view .LVU173 522 .loc 1 432 14 is_stmt 0 view .LVU174 523 0234 FFF7FEFF bl HAL_GetTick 524 .LVL31: 525 .loc 1 432 28 view .LVU175 526 0238 801B subs r0, r0, r6 527 .loc 1 432 12 view .LVU176 528 023a 41F28833 movw r3, #5000 529 023e 9842 cmp r0, r3 530 0240 F3D9 bls .L39 433:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 434:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 531 .loc 1 434 18 view .LVU177 532 0242 0320 movs r0, #3 533 0244 C6E0 b .L3 534 .LVL32: 535 .L61: 391:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 536 .loc 1 391 22 view .LVU178 537 0246 0025 movs r5, #0 538 0248 D6E7 b .L31 539 .LVL33: 540 .L85: 407:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 541 .loc 1 407 7 is_stmt 1 view .LVU179 542 024a 144A ldr r2, .L93+8 543 024c 1368 ldr r3, [r2] 544 024e 43F48073 orr r3, r3, #256 545 0252 1360 str r3, [r2] 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 546 .loc 1 410 7 view .LVU180 ARM GAS /tmp/ccnj6RPV.s page 19 410:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 547 .loc 1 410 19 is_stmt 0 view .LVU181 548 0254 FFF7FEFF bl HAL_GetTick 549 .LVL34: 550 0258 0646 mov r6, r0 551 .LVL35: 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 552 .loc 1 412 7 is_stmt 1 view .LVU182 553 .L33: 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 554 .loc 1 412 13 view .LVU183 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 555 .loc 1 412 14 is_stmt 0 view .LVU184 556 025a 104B ldr r3, .L93+8 557 025c 1B68 ldr r3, [r3] 412:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 558 .loc 1 412 13 view .LVU185 559 025e 13F4807F tst r3, #256 560 0262 CED1 bne .L32 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 561 .loc 1 414 9 is_stmt 1 view .LVU186 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 562 .loc 1 414 14 is_stmt 0 view .LVU187 563 0264 FFF7FEFF bl HAL_GetTick 564 .LVL36: 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 565 .loc 1 414 28 view .LVU188 566 0268 801B subs r0, r0, r6 414:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 567 .loc 1 414 12 view .LVU189 568 026a 0228 cmp r0, #2 569 026c F5D9 bls .L33 416:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 570 .loc 1 416 18 view .LVU190 571 026e 0320 movs r0, #3 572 0270 B0E0 b .L3 573 .LVL37: 574 .L86: 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 575 .loc 1 422 5 is_stmt 1 discriminator 1 view .LVU191 576 0272 084A ldr r2, .L93 577 0274 136F ldr r3, [r2, #112] 578 0276 43F00103 orr r3, r3, #1 579 027a 1367 str r3, [r2, #112] 580 027c CFE7 b .L36 581 .L87: 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 582 .loc 1 422 5 discriminator 4 view .LVU192 583 027e 054B ldr r3, .L93 584 0280 1A6F ldr r2, [r3, #112] 585 0282 42F00402 orr r2, r2, #4 586 0286 1A67 str r2, [r3, #112] 422:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the LSE State */ 587 .loc 1 422 5 discriminator 4 view .LVU193 588 0288 1A6F ldr r2, [r3, #112] 589 028a 42F00102 orr r2, r2, #1 590 028e 1A67 str r2, [r3, #112] ARM GAS /tmp/ccnj6RPV.s page 20 591 0290 C5E7 b .L36 592 .L94: 593 0292 00BF .align 2 594 .L93: 595 0294 00380240 .word 1073887232 596 0298 00004742 .word 1111949312 597 029c 00700040 .word 1073770496 598 .L38: 435:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 436:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 437:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 438:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 439:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 440:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 441:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 599 .loc 1 441 7 view .LVU194 600 .loc 1 441 19 is_stmt 0 view .LVU195 601 02a0 FFF7FEFF bl HAL_GetTick 602 .LVL38: 603 02a4 0646 mov r6, r0 604 .LVL39: 442:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 443:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till LSE is ready */ 444:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 605 .loc 1 444 7 is_stmt 1 view .LVU196 606 .L42: 607 .loc 1 444 13 view .LVU197 608 .loc 1 444 14 is_stmt 0 view .LVU198 609 02a6 524B ldr r3, .L95 610 02a8 1B6F ldr r3, [r3, #112] 611 .loc 1 444 13 view .LVU199 612 02aa 13F0020F tst r3, #2 613 02ae 08D0 beq .L41 445:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 446:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 614 .loc 1 446 9 is_stmt 1 view .LVU200 615 .loc 1 446 14 is_stmt 0 view .LVU201 616 02b0 FFF7FEFF bl HAL_GetTick 617 .LVL40: 618 .loc 1 446 28 view .LVU202 619 02b4 801B subs r0, r0, r6 620 .loc 1 446 12 view .LVU203 621 02b6 41F28833 movw r3, #5000 622 02ba 9842 cmp r0, r3 623 02bc F3D9 bls .L42 447:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 448:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 624 .loc 1 448 18 view .LVU204 625 02be 0320 movs r0, #3 626 02c0 88E0 b .L3 627 .L41: 449:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 450:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 451:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 452:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 453:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Restore clock configuration if changed */ 454:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (pwrclkchanged == SET) ARM GAS /tmp/ccnj6RPV.s page 21 628 .loc 1 454 5 is_stmt 1 view .LVU205 629 .loc 1 454 8 is_stmt 0 view .LVU206 630 02c2 EDB9 cbnz r5, .L88 631 .LVL41: 632 .L30: 633 .loc 1 454 8 view .LVU207 634 .LBE2: 455:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); 457:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 458:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 459:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ 460:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 461:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); 635 .loc 1 461 3 is_stmt 1 view .LVU208 462:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 636 .loc 1 462 3 view .LVU209 637 .loc 1 462 30 is_stmt 0 view .LVU210 638 02c4 A369 ldr r3, [r4, #24] 639 .loc 1 462 6 view .LVU211 640 02c6 002B cmp r3, #0 641 02c8 00F08380 beq .L65 463:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 464:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ 465:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 642 .loc 1 465 5 is_stmt 1 view .LVU212 643 .loc 1 465 9 is_stmt 0 view .LVU213 644 02cc 484A ldr r2, .L95 645 02ce 9268 ldr r2, [r2, #8] 646 02d0 02F00C02 and r2, r2, #12 647 .loc 1 465 8 view .LVU214 648 02d4 082A cmp r2, #8 649 02d6 51D0 beq .L44 466:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 467:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 650 .loc 1 467 7 is_stmt 1 view .LVU215 651 .loc 1 467 10 is_stmt 0 view .LVU216 652 02d8 022B cmp r3, #2 653 02da 17D0 beq .L89 468:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 469:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); 475:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 476:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */ 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 478:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 479:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 481:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 482:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is disabled */ 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 484:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) ARM GAS /tmp/ccnj6RPV.s page 22 486:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 488:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 489:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 490:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 491:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the main PLL clock source, multiplication and division factors. */ 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource 493:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM 494:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) 495:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Po 496:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))); 497:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Enable the main PLL. */ 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); 499:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 500:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 502:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 503:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is ready */ 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 505:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 507:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 509:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 510:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 511:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 512:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 513:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 514:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Disable the main PLL. */ 515:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); 654 .loc 1 515 9 is_stmt 1 view .LVU217 655 02dc 454B ldr r3, .L95+4 656 02de 0022 movs r2, #0 657 02e0 1A66 str r2, [r3, #96] 516:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 517:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 518:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 658 .loc 1 518 9 view .LVU218 659 .loc 1 518 21 is_stmt 0 view .LVU219 660 02e2 FFF7FEFF bl HAL_GetTick 661 .LVL42: 662 02e6 0446 mov r4, r0 663 .LVL43: 519:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 520:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Wait till PLL is disabled */ 521:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 664 .loc 1 521 9 is_stmt 1 view .LVU220 665 .L50: 666 .loc 1 521 15 view .LVU221 667 .loc 1 521 16 is_stmt 0 view .LVU222 668 02e8 414B ldr r3, .L95 669 02ea 1B68 ldr r3, [r3] 670 .loc 1 521 15 view .LVU223 671 02ec 13F0007F tst r3, #33554432 672 02f0 42D0 beq .L90 522:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 523:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) ARM GAS /tmp/ccnj6RPV.s page 23 673 .loc 1 523 11 is_stmt 1 view .LVU224 674 .loc 1 523 16 is_stmt 0 view .LVU225 675 02f2 FFF7FEFF bl HAL_GetTick 676 .LVL44: 677 .loc 1 523 30 view .LVU226 678 02f6 001B subs r0, r0, r4 679 .loc 1 523 14 view .LVU227 680 02f8 0228 cmp r0, #2 681 02fa F5D9 bls .L50 524:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 525:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 682 .loc 1 525 20 view .LVU228 683 02fc 0320 movs r0, #3 684 02fe 69E0 b .L3 685 .LVL45: 686 .L88: 687 .LBB4: 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 688 .loc 1 456 7 is_stmt 1 view .LVU229 689 0300 3B4A ldr r2, .L95 690 0302 136C ldr r3, [r2, #64] 691 0304 23F08053 bic r3, r3, #268435456 692 0308 1364 str r3, [r2, #64] 693 030a DBE7 b .L30 694 .LVL46: 695 .L89: 456:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 696 .loc 1 456 7 is_stmt 0 view .LVU230 697 .LBE4: 470:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLM_VALUE(RCC_OscInitStruct->PLL.PLLM)); 698 .loc 1 470 9 is_stmt 1 view .LVU231 471:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLN_VALUE(RCC_OscInitStruct->PLL.PLLN)); 699 .loc 1 471 9 view .LVU232 472:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); 700 .loc 1 472 9 view .LVU233 473:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); 701 .loc 1 473 9 view .LVU234 474:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 702 .loc 1 474 9 view .LVU235 477:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 703 .loc 1 477 9 view .LVU236 704 030c 394B ldr r3, .L95+4 705 030e 0022 movs r2, #0 706 0310 1A66 str r2, [r3, #96] 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 707 .loc 1 480 9 view .LVU237 480:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 708 .loc 1 480 21 is_stmt 0 view .LVU238 709 0312 FFF7FEFF bl HAL_GetTick 710 .LVL47: 711 0316 0546 mov r5, r0 712 .LVL48: 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 713 .loc 1 483 9 is_stmt 1 view .LVU239 714 .L46: 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 715 .loc 1 483 15 view .LVU240 ARM GAS /tmp/ccnj6RPV.s page 24 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 716 .loc 1 483 16 is_stmt 0 view .LVU241 717 0318 354B ldr r3, .L95 718 031a 1B68 ldr r3, [r3] 483:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 719 .loc 1 483 15 view .LVU242 720 031c 13F0007F tst r3, #33554432 721 0320 06D0 beq .L91 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 722 .loc 1 485 11 is_stmt 1 view .LVU243 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 723 .loc 1 485 16 is_stmt 0 view .LVU244 724 0322 FFF7FEFF bl HAL_GetTick 725 .LVL49: 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 726 .loc 1 485 30 view .LVU245 727 0326 401B subs r0, r0, r5 485:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 728 .loc 1 485 14 view .LVU246 729 0328 0228 cmp r0, #2 730 032a F5D9 bls .L46 487:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 731 .loc 1 487 20 view .LVU247 732 032c 0320 movs r0, #3 733 032e 51E0 b .L3 734 .L91: 492:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM 735 .loc 1 492 9 is_stmt 1 view .LVU248 736 0330 E369 ldr r3, [r4, #28] 737 0332 226A ldr r2, [r4, #32] 738 0334 1343 orrs r3, r3, r2 739 0336 626A ldr r2, [r4, #36] 740 0338 43EA8213 orr r3, r3, r2, lsl #6 741 033c A26A ldr r2, [r4, #40] 742 033e 5208 lsrs r2, r2, #1 743 0340 013A subs r2, r2, #1 744 0342 43EA0243 orr r3, r3, r2, lsl #16 745 0346 E26A ldr r2, [r4, #44] 746 0348 43EA0263 orr r3, r3, r2, lsl #24 747 034c 284A ldr r2, .L95 748 034e 5360 str r3, [r2, #4] 498:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 749 .loc 1 498 9 view .LVU249 750 0350 284B ldr r3, .L95+4 751 0352 0122 movs r2, #1 752 0354 1A66 str r2, [r3, #96] 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 753 .loc 1 501 9 view .LVU250 501:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 754 .loc 1 501 21 is_stmt 0 view .LVU251 755 0356 FFF7FEFF bl HAL_GetTick 756 .LVL50: 757 035a 0446 mov r4, r0 758 .LVL51: 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 759 .loc 1 504 9 is_stmt 1 view .LVU252 760 .L48: ARM GAS /tmp/ccnj6RPV.s page 25 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 761 .loc 1 504 15 view .LVU253 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 762 .loc 1 504 16 is_stmt 0 view .LVU254 763 035c 244B ldr r3, .L95 764 035e 1B68 ldr r3, [r3] 504:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 765 .loc 1 504 15 view .LVU255 766 0360 13F0007F tst r3, #33554432 767 0364 06D1 bne .L92 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 768 .loc 1 506 11 is_stmt 1 view .LVU256 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 769 .loc 1 506 16 is_stmt 0 view .LVU257 770 0366 FFF7FEFF bl HAL_GetTick 771 .LVL52: 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 772 .loc 1 506 30 view .LVU258 773 036a 001B subs r0, r0, r4 506:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 774 .loc 1 506 14 view .LVU259 775 036c 0228 cmp r0, #2 776 036e F5D9 bls .L48 508:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 777 .loc 1 508 20 view .LVU260 778 0370 0320 movs r0, #3 779 0372 2FE0 b .L3 780 .L92: 526:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 527:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 528:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 529:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 530:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 531:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 532:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 534:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 536:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 537:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 538:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 539:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pll_config = RCC->PLLCFGR; 541:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined (RCC_PLLCFGR_PLLR) 542:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 543:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 544:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR 545:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR 546:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) 547:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_ 548:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_ 549:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #else 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) ARM GAS /tmp/ccnj6RPV.s page 26 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_ 556:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_PLLCFGR_PLLR */ 557:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 559:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 560:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 561:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 562:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 781 .loc 1 563 10 view .LVU261 782 0374 0020 movs r0, #0 783 0376 2DE0 b .L3 784 .L90: 785 .loc 1 563 10 view .LVU262 786 0378 0020 movs r0, #0 787 037a 2BE0 b .L3 788 .LVL53: 789 .L44: 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 790 .loc 1 533 7 is_stmt 1 view .LVU263 533:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 791 .loc 1 533 10 is_stmt 0 view .LVU264 792 037c 012B cmp r3, #1 793 037e 2BD0 beq .L69 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined (RCC_PLLCFGR_PLLR) 794 .loc 1 540 9 is_stmt 1 view .LVU265 540:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined (RCC_PLLCFGR_PLLR) 795 .loc 1 540 20 is_stmt 0 view .LVU266 796 0380 1B4B ldr r3, .L95 797 0382 5B68 ldr r3, [r3, #4] 798 .LVL54: 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 799 .loc 1 550 9 is_stmt 1 view .LVU267 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR 800 .loc 1 551 14 is_stmt 0 view .LVU268 801 0384 03F48001 and r1, r3, #4194304 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR 802 .loc 1 551 80 view .LVU269 803 0388 E269 ldr r2, [r4, #28] 550:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 804 .loc 1 550 64 view .LVU270 805 038a 9142 cmp r1, r2 806 038c 26D1 bne .L70 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR 807 .loc 1 552 14 view .LVU271 808 038e 03F03F02 and r2, r3, #63 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR 809 .loc 1 552 86 view .LVU272 810 0392 216A ldr r1, [r4, #32] 551:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR 811 .loc 1 551 92 view .LVU273 812 0394 8A42 cmp r2, r1 813 0396 23D1 bne .L71 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) 814 .loc 1 553 79 view .LVU274 815 0398 616A ldr r1, [r4, #36] 552:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR ARM GAS /tmp/ccnj6RPV.s page 27 816 .loc 1 552 111 view .LVU275 817 039a 47F6C072 movw r2, #32704 818 039e 1A40 ands r2, r2, r3 819 03a0 B2EB811F cmp r2, r1, lsl #6 820 03a4 1ED1 bne .L72 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_ 821 .loc 1 554 14 view .LVU276 822 03a6 03F44031 and r1, r3, #196608 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_ 823 .loc 1 554 81 view .LVU277 824 03aa A26A ldr r2, [r4, #40] 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_ 825 .loc 1 554 87 view .LVU278 826 03ac 5208 lsrs r2, r2, #1 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_ 827 .loc 1 554 94 view .LVU279 828 03ae 013A subs r2, r2, #1 553:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) 829 .loc 1 553 111 view .LVU280 830 03b0 B1EB024F cmp r1, r2, lsl #16 831 03b4 18D1 bne .L73 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_PLLCFGR_PLLR */ 832 .loc 1 555 14 view .LVU281 833 03b6 03F07063 and r3, r3, #251658240 834 .LVL55: 555:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_PLLCFGR_PLLR */ 835 .loc 1 555 79 view .LVU282 836 03ba E26A ldr r2, [r4, #44] 554:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_ 837 .loc 1 554 126 view .LVU283 838 03bc B3EB026F cmp r3, r2, lsl #24 839 03c0 14D1 bne .L74 840 .loc 1 563 10 view .LVU284 841 03c2 0020 movs r0, #0 842 03c4 06E0 b .L3 843 .LVL56: 844 .L52: 845 .LCFI2: 846 .cfi_def_cfa_offset 0 847 .cfi_restore 4 848 .cfi_restore 5 849 .cfi_restore 6 850 .cfi_restore 14 226:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 851 .loc 1 226 12 view .LVU285 852 03c6 0120 movs r0, #1 853 .LVL57: 564:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 854 .loc 1 564 1 view .LVU286 855 03c8 7047 bx lr 856 .LVL58: 857 .L82: 858 .LCFI3: 859 .cfi_def_cfa_offset 24 860 .cfi_offset 4, -16 861 .cfi_offset 5, -12 862 .cfi_offset 6, -8 ARM GAS /tmp/ccnj6RPV.s page 28 863 .cfi_offset 14, -4 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 864 .loc 1 242 16 view .LVU287 865 03ca 0120 movs r0, #1 866 .LVL59: 242:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 867 .loc 1 242 16 view .LVU288 868 03cc 02E0 b .L3 869 .L56: 295:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 870 .loc 1 295 16 view .LVU289 871 03ce 0120 movs r0, #1 872 03d0 00E0 b .L3 873 .L65: 563:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 874 .loc 1 563 10 view .LVU290 875 03d2 0020 movs r0, #0 876 .LVL60: 877 .L3: 878 .loc 1 564 1 view .LVU291 879 03d4 02B0 add sp, sp, #8 880 .LCFI4: 881 .cfi_remember_state 882 .cfi_def_cfa_offset 16 883 @ sp needed 884 03d6 70BD pop {r4, r5, r6, pc} 885 .LVL61: 886 .L69: 887 .LCFI5: 888 .cfi_restore_state 535:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 889 .loc 1 535 16 view .LVU292 890 03d8 0120 movs r0, #1 891 03da FBE7 b .L3 892 .LVL62: 893 .L70: 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 894 .loc 1 558 18 view .LVU293 895 03dc 0120 movs r0, #1 896 03de F9E7 b .L3 897 .L71: 898 03e0 0120 movs r0, #1 899 03e2 F7E7 b .L3 900 .L72: 901 03e4 0120 movs r0, #1 902 03e6 F5E7 b .L3 903 .L73: 904 03e8 0120 movs r0, #1 905 03ea F3E7 b .L3 906 .LVL63: 907 .L74: 558:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 908 .loc 1 558 18 view .LVU294 909 03ec 0120 movs r0, #1 910 03ee F1E7 b .L3 911 .L96: 912 .align 2 ARM GAS /tmp/ccnj6RPV.s page 29 913 .L95: 914 03f0 00380240 .word 1073887232 915 03f4 00004742 .word 1111949312 916 .cfi_endproc 917 .LFE135: 919 .section .text.HAL_RCC_MCOConfig,"ax",%progbits 920 .align 1 921 .global HAL_RCC_MCOConfig 922 .syntax unified 923 .thumb 924 .thumb_func 925 .fpu fpv4-sp-d16 927 HAL_RCC_MCOConfig: 928 .LVL64: 929 .LFB137: 565:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 566:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 567:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB busses clocks according to the specified 568:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. 569:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that 570:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. 571:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param FLatency FLASH Latency, this parameter depend on device selected 572:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 573:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 574:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated by HAL_RCC_GetHCLKFreq() function called within this function 575:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 576:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after 577:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * startup from Reset, wake-up from STOP and STANDBY mode, or in case 578:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock 579:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). 580:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 581:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target 582:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * clock source is ready (clock stable after startup delay or PLL locked). 583:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will 584:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * occur when the clock source will be ready. 585:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 586:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Depending on the device voltage range, the software has to set correctly 587:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency 588:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * (for more details refer to section above "Initialization/de-initialization functions") 589:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 590:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 591:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLaten 592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 594:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 595:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check Null pointer */ 596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_ClkInitStruct == NULL) 597:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 599:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 600:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 601:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); 603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 604:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 605:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 606:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock ARM GAS /tmp/ccnj6RPV.s page 30 607:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (HCLK) and the supply voltage of the device. */ 608:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 609:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (FLatency > __HAL_FLASH_GET_LATENCY()) 611:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 612:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 614:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 615:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 616:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_FLASH_GET_LATENCY() != FLatency) 618:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 620:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 621:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 622:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 623:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 625:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 626:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set the highest APBx dividers in order to ensure that we do not go through 627:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */ 628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 629:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 631:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 632:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 634:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 636:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 637:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); 639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 640:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 641:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 642:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 644:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); 646:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 647:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 649:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 650:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSE ready flag */ 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 652:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 654:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 655:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 656:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 658:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 659:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 660:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the PLL ready flag */ 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 662:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; ARM GAS /tmp/ccnj6RPV.s page 31 664:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 665:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 666:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ 667:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 668:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 669:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the HSI ready flag */ 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 671:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 673:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 674:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 675:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 677:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 678:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get Start Tick */ 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** tickstart = HAL_GetTick(); 680:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 682:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 684:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_TIMEOUT; 686:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 687:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 688:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 689:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 690:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (FLatency < __HAL_FLASH_GET_LATENCY()) 692:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 693:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ 694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); 695:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 696:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash 697:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_FLASH_GET_LATENCY() != FLatency) 699:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_ERROR; 701:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 702:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 703:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 704:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 706:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); 708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 709:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 710:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 711:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /*-------------------------- PCLK2 Configuration ---------------------------*/ 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 713:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); 715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 716:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 717:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 718:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_C 720:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ARM GAS /tmp/ccnj6RPV.s page 32 721:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings */ 722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_InitTick(uwTickPrio); 723:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return HAL_OK; 725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 726:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 727:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 728:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @} 729:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 730:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 731:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions 732:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC clocks control functions 733:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 734:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @verbatim 735:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 736:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ##### Peripheral Control functions ##### 737:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** =============================================================================== 738:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** [..] 739:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks 740:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** frequencies. 741:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 742:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** @endverbatim 743:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @{ 744:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 745:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 746:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 747:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO1 pin(PA8) or on MCO2 pin(PC9). 748:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note PA8/PC9 should be configured in alternate function mode. 749:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. 750:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 751:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1: Clock source to output on MCO1 pin(PA8). 752:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2: Clock source to output on MCO2 pin(PC9). 753:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. 754:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 755:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSI: HSI clock selected as MCO1 source 756:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_LSE: LSE clock selected as MCO1 source 757:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_HSE: HSE clock selected as MCO1 source 758:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO1SOURCE_PLLCLK: main PLL clock selected as MCO1 source 759:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_SYSCLK: System clock (SYSCLK) selected as MCO2 source 760:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLI2SCLK: PLLI2S clock selected as MCO2 source, available for a 761:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_I2SCLK: I2SCLK clock selected as MCO2 source, available only for 762:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source 763:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source 764:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCOx prescaler. 765:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * This parameter can be one of the following values: 766:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_1: no division applied to MCOx clock 767:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_2: division by 2 applied to MCOx clock 768:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_3: division by 3 applied to MCOx clock 769:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_4: division by 4 applied to MCOx clock 770:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @arg RCC_MCODIV_5: division by 5 applied to MCOx clock 771:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note For STM32F410Rx devices to output I2SCLK clock on MCO2 you should have 772:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * at last one of the SPI clocks enabled (SPI1, SPI2 or SPI5). 773:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 774:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 775:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) 776:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 930 .loc 1 776 1 is_stmt 1 view -0 ARM GAS /tmp/ccnj6RPV.s page 33 931 .cfi_startproc 932 @ args = 0, pretend = 0, frame = 32 933 @ frame_needed = 0, uses_anonymous_args = 0 934 .loc 1 776 1 is_stmt 0 view .LVU296 935 0000 70B5 push {r4, r5, r6, lr} 936 .LCFI6: 937 .cfi_def_cfa_offset 16 938 .cfi_offset 4, -16 939 .cfi_offset 5, -12 940 .cfi_offset 6, -8 941 .cfi_offset 14, -4 942 0002 88B0 sub sp, sp, #32 943 .LCFI7: 944 .cfi_def_cfa_offset 48 945 0004 0C46 mov r4, r1 946 0006 1546 mov r5, r2 777:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitTypeDef GPIO_InitStruct; 947 .loc 1 777 3 is_stmt 1 view .LVU297 778:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check the parameters */ 779:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); 948 .loc 1 779 3 view .LVU298 780:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); 949 .loc 1 780 3 view .LVU299 781:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC_MCO1 */ 782:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (RCC_MCOx == RCC_MCO1) 950 .loc 1 782 3 view .LVU300 951 .loc 1 782 6 is_stmt 0 view .LVU301 952 0008 00BB cbnz r0, .L98 783:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 784:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); 953 .loc 1 784 5 is_stmt 1 view .LVU302 785:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 786:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO1 Clock Enable */ 787:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO1_CLK_ENABLE(); 954 .loc 1 787 5 view .LVU303 955 .LBB5: 956 .loc 1 787 5 view .LVU304 957 000a 0023 movs r3, #0 958 000c 0193 str r3, [sp, #4] 959 .loc 1 787 5 view .LVU305 960 000e 204E ldr r6, .L101 961 0010 326B ldr r2, [r6, #48] 962 .LVL65: 963 .loc 1 787 5 is_stmt 0 view .LVU306 964 0012 42F00102 orr r2, r2, #1 965 0016 3263 str r2, [r6, #48] 966 .loc 1 787 5 is_stmt 1 view .LVU307 967 0018 326B ldr r2, [r6, #48] 968 001a 02F00102 and r2, r2, #1 969 001e 0192 str r2, [sp, #4] 970 .loc 1 787 5 view .LVU308 971 0020 019A ldr r2, [sp, #4] 972 .LBE5: 973 .loc 1 787 5 view .LVU309 788:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 789:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ 790:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO1_PIN; ARM GAS /tmp/ccnj6RPV.s page 34 974 .loc 1 790 5 view .LVU310 975 .loc 1 790 25 is_stmt 0 view .LVU311 976 0022 4FF48072 mov r2, #256 977 0026 0392 str r2, [sp, #12] 791:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 978 .loc 1 791 5 is_stmt 1 view .LVU312 979 .loc 1 791 26 is_stmt 0 view .LVU313 980 0028 0222 movs r2, #2 981 002a 0492 str r2, [sp, #16] 792:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 982 .loc 1 792 5 is_stmt 1 view .LVU314 983 .loc 1 792 27 is_stmt 0 view .LVU315 984 002c 0322 movs r2, #3 985 002e 0692 str r2, [sp, #24] 793:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 986 .loc 1 793 5 is_stmt 1 view .LVU316 987 .loc 1 793 26 is_stmt 0 view .LVU317 988 0030 0593 str r3, [sp, #20] 794:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 989 .loc 1 794 5 is_stmt 1 view .LVU318 990 .loc 1 794 31 is_stmt 0 view .LVU319 991 0032 0793 str r3, [sp, #28] 795:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &GPIO_InitStruct); 992 .loc 1 795 5 is_stmt 1 view .LVU320 993 0034 03A9 add r1, sp, #12 994 .LVL66: 995 .loc 1 795 5 is_stmt 0 view .LVU321 996 0036 1748 ldr r0, .L101+4 997 .LVL67: 998 .loc 1 795 5 view .LVU322 999 0038 FFF7FEFF bl HAL_GPIO_Init 1000 .LVL68: 796:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 797:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO1 and MCO1PRE[2:0] bits then Select MCO1 clock source and prescaler */ 798:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO1 | RCC_CFGR_MCO1PRE), (RCC_MCOSource | RCC_MCODiv)); 1001 .loc 1 798 5 is_stmt 1 view .LVU323 1002 003c B368 ldr r3, [r6, #8] 1003 003e 23F0EC63 bic r3, r3, #123731968 1004 0042 2543 orrs r5, r5, r4 1005 .LVL69: 1006 .loc 1 798 5 is_stmt 0 view .LVU324 1007 0044 1D43 orrs r5, r5, r3 1008 0046 B560 str r5, [r6, #8] 1009 .LVL70: 1010 .L97: 799:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 800:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO1 enable feature is available only on STM32F410xx devices */ 801:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO1EN) 802:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO1_ENABLE(); 803:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO1EN */ 804:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 805:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2) 806:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 807:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource)); 809:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 810:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* MCO2 Clock Enable */ ARM GAS /tmp/ccnj6RPV.s page 35 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __MCO2_CLK_ENABLE(); 812:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 813:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Configure the MCO2 pin in alternate function mode */ 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pin = MCO2_PIN; 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); 820:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 821:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Mask MCO2 and MCO2PRE[2:0] bits then Select MCO2 clock source and prescaler */ 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, (RCC_CFGR_MCO2 | RCC_CFGR_MCO2PRE), (RCC_MCOSource | (RCC_MCODiv << 3U))) 823:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 824:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* This RCC MCO2 enable feature is available only on STM32F410Rx devices */ 825:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #if defined(RCC_CFGR_MCO2EN) 826:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_MCO2_ENABLE(); 827:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2EN */ 828:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 829:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** #endif /* RCC_CFGR_MCO2 */ 830:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1011 .loc 1 830 1 view .LVU325 1012 0048 08B0 add sp, sp, #32 1013 .LCFI8: 1014 .cfi_remember_state 1015 .cfi_def_cfa_offset 16 1016 @ sp needed 1017 004a 70BD pop {r4, r5, r6, pc} 1018 .LVL71: 1019 .L98: 1020 .LCFI9: 1021 .cfi_restore_state 808:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1022 .loc 1 808 5 is_stmt 1 view .LVU326 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1023 .loc 1 811 5 view .LVU327 1024 .LBB6: 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1025 .loc 1 811 5 view .LVU328 1026 004c 0023 movs r3, #0 1027 004e 0293 str r3, [sp, #8] 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1028 .loc 1 811 5 view .LVU329 1029 0050 0F4E ldr r6, .L101 1030 0052 326B ldr r2, [r6, #48] 1031 .LVL72: 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1032 .loc 1 811 5 is_stmt 0 view .LVU330 1033 0054 42F00402 orr r2, r2, #4 1034 0058 3263 str r2, [r6, #48] 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1035 .loc 1 811 5 is_stmt 1 view .LVU331 1036 005a 326B ldr r2, [r6, #48] 1037 005c 02F00402 and r2, r2, #4 1038 0060 0292 str r2, [sp, #8] 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1039 .loc 1 811 5 view .LVU332 1040 0062 029A ldr r2, [sp, #8] ARM GAS /tmp/ccnj6RPV.s page 36 1041 .LBE6: 811:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1042 .loc 1 811 5 view .LVU333 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1043 .loc 1 814 5 view .LVU334 814:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 1044 .loc 1 814 25 is_stmt 0 view .LVU335 1045 0064 4FF40072 mov r2, #512 1046 0068 0392 str r2, [sp, #12] 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 1047 .loc 1 815 5 is_stmt 1 view .LVU336 815:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 1048 .loc 1 815 26 is_stmt 0 view .LVU337 1049 006a 0222 movs r2, #2 1050 006c 0492 str r2, [sp, #16] 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1051 .loc 1 816 5 is_stmt 1 view .LVU338 816:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 1052 .loc 1 816 27 is_stmt 0 view .LVU339 1053 006e 0322 movs r2, #3 1054 0070 0692 str r2, [sp, #24] 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 1055 .loc 1 817 5 is_stmt 1 view .LVU340 817:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** GPIO_InitStruct.Alternate = GPIO_AF0_MCO; 1056 .loc 1 817 26 is_stmt 0 view .LVU341 1057 0072 0593 str r3, [sp, #20] 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); 1058 .loc 1 818 5 is_stmt 1 view .LVU342 818:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_GPIO_Init(MCO2_GPIO_PORT, &GPIO_InitStruct); 1059 .loc 1 818 31 is_stmt 0 view .LVU343 1060 0074 0793 str r3, [sp, #28] 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1061 .loc 1 819 5 is_stmt 1 view .LVU344 1062 0076 03A9 add r1, sp, #12 1063 .LVL73: 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1064 .loc 1 819 5 is_stmt 0 view .LVU345 1065 0078 0748 ldr r0, .L101+8 1066 .LVL74: 819:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1067 .loc 1 819 5 view .LVU346 1068 007a FFF7FEFF bl HAL_GPIO_Init 1069 .LVL75: 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1070 .loc 1 822 5 is_stmt 1 view .LVU347 1071 007e B368 ldr r3, [r6, #8] 1072 0080 23F07843 bic r3, r3, #-134217728 1073 0084 44EAC504 orr r4, r4, r5, lsl #3 1074 .LVL76: 822:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1075 .loc 1 822 5 is_stmt 0 view .LVU348 1076 0088 1C43 orrs r4, r4, r3 1077 008a B460 str r4, [r6, #8] 1078 .loc 1 830 1 view .LVU349 1079 008c DCE7 b .L97 1080 .L102: 1081 008e 00BF .align 2 ARM GAS /tmp/ccnj6RPV.s page 37 1082 .L101: 1083 0090 00380240 .word 1073887232 1084 0094 00000240 .word 1073872896 1085 0098 00080240 .word 1073874944 1086 .cfi_endproc 1087 .LFE137: 1089 .section .text.HAL_RCC_EnableCSS,"ax",%progbits 1090 .align 1 1091 .global HAL_RCC_EnableCSS 1092 .syntax unified 1093 .thumb 1094 .thumb_func 1095 .fpu fpv4-sp-d16 1097 HAL_RCC_EnableCSS: 1098 .LFB138: 831:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 832:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 833:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Enables the Clock Security System. 834:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator 835:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the 836:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), 837:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to 838:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * the Cortex-M4 NMI (Non-Maskable Interrupt) exception vector. 839:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 840:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 841:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) 842:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1099 .loc 1 842 1 is_stmt 1 view -0 1100 .cfi_startproc 1101 @ args = 0, pretend = 0, frame = 0 1102 @ frame_needed = 0, uses_anonymous_args = 0 1103 @ link register save eliminated. 843:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)ENABLE; 1104 .loc 1 843 3 view .LVU351 1105 .loc 1 843 38 is_stmt 0 view .LVU352 1106 0000 014B ldr r3, .L104 1107 0002 0122 movs r2, #1 1108 0004 DA64 str r2, [r3, #76] 844:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1109 .loc 1 844 1 view .LVU353 1110 0006 7047 bx lr 1111 .L105: 1112 .align 2 1113 .L104: 1114 0008 00004742 .word 1111949312 1115 .cfi_endproc 1116 .LFE138: 1118 .section .text.HAL_RCC_DisableCSS,"ax",%progbits 1119 .align 1 1120 .global HAL_RCC_DisableCSS 1121 .syntax unified 1122 .thumb 1123 .thumb_func 1124 .fpu fpv4-sp-d16 1126 HAL_RCC_DisableCSS: 1127 .LFB139: 845:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** ARM GAS /tmp/ccnj6RPV.s page 38 846:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 847:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Disables the Clock Security System. 848:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 849:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 850:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) 851:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1128 .loc 1 851 1 is_stmt 1 view -0 1129 .cfi_startproc 1130 @ args = 0, pretend = 0, frame = 0 1131 @ frame_needed = 0, uses_anonymous_args = 0 1132 @ link register save eliminated. 852:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *(__IO uint32_t *) RCC_CR_CSSON_BB = (uint32_t)DISABLE; 1133 .loc 1 852 3 view .LVU355 1134 .loc 1 852 38 is_stmt 0 view .LVU356 1135 0000 014B ldr r3, .L107 1136 0002 0022 movs r2, #0 1137 0004 DA64 str r2, [r3, #76] 853:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1138 .loc 1 853 1 view .LVU357 1139 0006 7047 bx lr 1140 .L108: 1141 .align 2 1142 .L107: 1143 0008 00004742 .word 1111949312 1144 .cfi_endproc 1145 .LFE139: 1147 .global __aeabi_uldivmod 1148 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits 1149 .align 1 1150 .weak HAL_RCC_GetSysClockFreq 1151 .syntax unified 1152 .thumb 1153 .thumb_func 1154 .fpu fpv4-sp-d16 1156 HAL_RCC_GetSysClockFreq: 1157 .LFB140: 854:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 855:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 856:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency 857:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 858:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real 859:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined 860:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * constant and the selected clock source: 861:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) 862:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(**) 863:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(**) 864:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. 865:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value 866:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 16 MHz) but the real value may vary depending on the variations 867:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * in voltage and temperature. 868:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value 869:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 25 MHz), user has to ensure that HSE_VALUE is same as the real 870:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may 871:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * have wrong result. 872:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 873:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional 874:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * value for HSE crystal. ARM GAS /tmp/ccnj6RPV.s page 39 875:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 876:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This function can be used by the user application to compute the 877:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * baudrate for the communication peripherals or configure other parameters. 878:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 879:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the 880:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre 881:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 882:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 883:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval SYSCLK frequency 884:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 885:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak uint32_t HAL_RCC_GetSysClockFreq(void) 886:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1158 .loc 1 886 1 is_stmt 1 view -0 1159 .cfi_startproc 1160 @ args = 0, pretend = 0, frame = 0 1161 @ frame_needed = 0, uses_anonymous_args = 0 1162 0000 08B5 push {r3, lr} 1163 .LCFI10: 1164 .cfi_def_cfa_offset 8 1165 .cfi_offset 3, -8 1166 .cfi_offset 14, -4 887:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllm = 0U; 1167 .loc 1 887 3 view .LVU359 1168 .LVL77: 888:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllvco = 0U; 1169 .loc 1 888 3 view .LVU360 889:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t pllp = 0U; 1170 .loc 1 889 3 view .LVU361 890:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; 1171 .loc 1 890 3 view .LVU362 891:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 892:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ 893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** switch (RCC->CFGR & RCC_CFGR_SWS) 1172 .loc 1 893 3 view .LVU363 1173 .loc 1 893 14 is_stmt 0 view .LVU364 1174 0002 314B ldr r3, .L116 1175 0004 9B68 ldr r3, [r3, #8] 1176 .loc 1 893 21 view .LVU365 1177 0006 03F00C03 and r3, r3, #12 1178 .loc 1 893 3 view .LVU366 1179 000a 042B cmp r3, #4 1180 000c 57D0 beq .L113 1181 000e 082B cmp r3, #8 1182 0010 57D1 bne .L114 894:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 895:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ 896:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 897:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 898:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 899:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 900:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ 901:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; 903:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 904:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 905:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock source */ 906:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccnj6RPV.s page 40 907:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN 908:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** SYSCLK = PLL_VCO / PLLP */ 909:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 1183 .loc 1 909 7 is_stmt 1 view .LVU367 1184 .loc 1 909 17 is_stmt 0 view .LVU368 1185 0012 2D4B ldr r3, .L116 1186 0014 5A68 ldr r2, [r3, #4] 1187 .loc 1 909 12 view .LVU369 1188 0016 02F03F02 and r2, r2, #63 1189 .LVL78: 910:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 1190 .loc 1 910 7 is_stmt 1 view .LVU370 1191 .loc 1 910 11 is_stmt 0 view .LVU371 1192 001a 5B68 ldr r3, [r3, #4] 1193 .loc 1 910 10 view .LVU372 1194 001c 13F4800F tst r3, #4194304 1195 0020 2AD0 beq .L111 911:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 912:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSE used as PLL clock source */ 913:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) 1196 .loc 1 913 9 is_stmt 1 view .LVU373 1197 .loc 1 913 70 is_stmt 0 view .LVU374 1198 0022 294B ldr r3, .L116 1199 0024 5968 ldr r1, [r3, #4] 1200 .loc 1 913 55 view .LVU375 1201 0026 C1F3881C ubfx ip, r1, #6, #9 1202 .loc 1 913 52 view .LVU376 1203 002a 4FEA4C11 lsl r1, ip, #5 1204 002e B1EB0C00 subs r0, r1, ip 1205 0032 6EEB0E0E sbc lr, lr, lr 1206 0036 4FEA8E13 lsl r3, lr, #6 1207 003a 43EA9063 orr r3, r3, r0, lsr #26 1208 003e 8101 lsls r1, r0, #6 1209 0040 091A subs r1, r1, r0 1210 0042 63EB0E03 sbc r3, r3, lr 1211 0046 DB00 lsls r3, r3, #3 1212 0048 43EA5173 orr r3, r3, r1, lsr #29 1213 004c C900 lsls r1, r1, #3 1214 004e 11EB0C0C adds ip, r1, ip 1215 0052 43F10003 adc r3, r3, #0 1216 0056 5902 lsls r1, r3, #9 1217 .loc 1 913 128 view .LVU377 1218 0058 0023 movs r3, #0 1219 005a 4FEA4C20 lsl r0, ip, #9 1220 005e 41EADC51 orr r1, r1, ip, lsr #23 1221 0062 FFF7FEFF bl __aeabi_uldivmod 1222 .LVL79: 1223 .L112: 914:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 915:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 916:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 917:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* HSI used as PLL clock source */ 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) 919:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 920:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U); 1224 .loc 1 920 7 is_stmt 1 view .LVU378 1225 .loc 1 920 21 is_stmt 0 view .LVU379 ARM GAS /tmp/ccnj6RPV.s page 41 1226 0066 184B ldr r3, .L116 1227 0068 5B68 ldr r3, [r3, #4] 1228 .loc 1 920 51 view .LVU380 1229 006a C3F30143 ubfx r3, r3, #16, #2 1230 .loc 1 920 76 view .LVU381 1231 006e 0133 adds r3, r3, #1 1232 .loc 1 920 12 view .LVU382 1233 0070 5B00 lsls r3, r3, #1 1234 .LVL80: 921:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 922:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = pllvco / pllp; 1235 .loc 1 922 7 is_stmt 1 view .LVU383 1236 .loc 1 922 20 is_stmt 0 view .LVU384 1237 0072 B0FBF3F0 udiv r0, r0, r3 1238 .LVL81: 923:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 1239 .loc 1 923 7 is_stmt 1 view .LVU385 1240 0076 25E0 b .L109 1241 .LVL82: 1242 .L111: 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1243 .loc 1 918 9 view .LVU386 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1244 .loc 1 918 70 is_stmt 0 view .LVU387 1245 0078 134B ldr r3, .L116 1246 007a 5968 ldr r1, [r3, #4] 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1247 .loc 1 918 55 view .LVU388 1248 007c C1F3881C ubfx ip, r1, #6, #9 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1249 .loc 1 918 52 view .LVU389 1250 0080 4FEA4C11 lsl r1, ip, #5 1251 0084 B1EB0C00 subs r0, r1, ip 1252 0088 6EEB0E0E sbc lr, lr, lr 1253 008c 4FEA8E13 lsl r3, lr, #6 1254 0090 43EA9063 orr r3, r3, r0, lsr #26 1255 0094 8101 lsls r1, r0, #6 1256 0096 091A subs r1, r1, r0 1257 0098 63EB0E03 sbc r3, r3, lr 1258 009c DB00 lsls r3, r3, #3 1259 009e 43EA5173 orr r3, r3, r1, lsr #29 1260 00a2 C900 lsls r1, r1, #3 1261 00a4 11EB0C0C adds ip, r1, ip 1262 00a8 43F10003 adc r3, r3, #0 1263 00ac 9902 lsls r1, r3, #10 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1264 .loc 1 918 128 view .LVU390 1265 00ae 0023 movs r3, #0 1266 00b0 4FEA8C20 lsl r0, ip, #10 1267 00b4 41EA9C51 orr r1, r1, ip, lsr #22 1268 00b8 FFF7FEFF bl __aeabi_uldivmod 1269 .LVL83: 918:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1270 .loc 1 918 128 view .LVU391 1271 00bc D3E7 b .L112 1272 .LVL84: 1273 .L113: ARM GAS /tmp/ccnj6RPV.s page 42 902:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 1274 .loc 1 902 20 view .LVU392 1275 00be 0348 ldr r0, .L116+4 1276 00c0 00E0 b .L109 1277 .L114: 893:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1278 .loc 1 893 3 view .LVU393 1279 00c2 0348 ldr r0, .L116+8 1280 .LVL85: 924:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 925:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** default: 926:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 927:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; 928:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** break; 929:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 930:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 931:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return sysclockfreq; 1281 .loc 1 931 3 is_stmt 1 view .LVU394 1282 .L109: 932:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1283 .loc 1 932 1 is_stmt 0 view .LVU395 1284 00c4 08BD pop {r3, pc} 1285 .L117: 1286 00c6 00BF .align 2 1287 .L116: 1288 00c8 00380240 .word 1073887232 1289 00cc 00127A00 .word 8000000 1290 00d0 0024F400 .word 16000000 1291 .cfi_endproc 1292 .LFE140: 1294 .section .text.HAL_RCC_ClockConfig,"ax",%progbits 1295 .align 1 1296 .global HAL_RCC_ClockConfig 1297 .syntax unified 1298 .thumb 1299 .thumb_func 1300 .fpu fpv4-sp-d16 1302 HAL_RCC_ClockConfig: 1303 .LVL86: 1304 .LFB136: 592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 1305 .loc 1 592 1 is_stmt 1 view -0 1306 .cfi_startproc 1307 @ args = 0, pretend = 0, frame = 0 1308 @ frame_needed = 0, uses_anonymous_args = 0 593:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1309 .loc 1 593 3 view .LVU397 596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1310 .loc 1 596 3 view .LVU398 596:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1311 .loc 1 596 6 is_stmt 0 view .LVU399 1312 0000 0028 cmp r0, #0 1313 0002 00F09B80 beq .L133 592:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t tickstart; 1314 .loc 1 592 1 view .LVU400 1315 0006 70B5 push {r4, r5, r6, lr} 1316 .LCFI11: ARM GAS /tmp/ccnj6RPV.s page 43 1317 .cfi_def_cfa_offset 16 1318 .cfi_offset 4, -16 1319 .cfi_offset 5, -12 1320 .cfi_offset 6, -8 1321 .cfi_offset 14, -4 1322 0008 0D46 mov r5, r1 1323 000a 0446 mov r4, r0 602:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); 1324 .loc 1 602 3 is_stmt 1 view .LVU401 603:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1325 .loc 1 603 3 view .LVU402 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1326 .loc 1 610 3 view .LVU403 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1327 .loc 1 610 18 is_stmt 0 view .LVU404 1328 000c 4F4B ldr r3, .L146 1329 000e 1B68 ldr r3, [r3] 1330 0010 03F00703 and r3, r3, #7 610:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1331 .loc 1 610 6 view .LVU405 1332 0014 8B42 cmp r3, r1 1333 0016 08D2 bcs .L120 613:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1334 .loc 1 613 5 is_stmt 1 view .LVU406 1335 0018 CBB2 uxtb r3, r1 1336 001a 4C4A ldr r2, .L146 1337 001c 1370 strb r3, [r2] 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1338 .loc 1 617 5 view .LVU407 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1339 .loc 1 617 9 is_stmt 0 view .LVU408 1340 001e 1368 ldr r3, [r2] 1341 0020 03F00703 and r3, r3, #7 617:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1342 .loc 1 617 8 view .LVU409 1343 0024 8B42 cmp r3, r1 1344 0026 40F08B80 bne .L134 1345 .L120: 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1346 .loc 1 624 3 is_stmt 1 view .LVU410 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1347 .loc 1 624 26 is_stmt 0 view .LVU411 1348 002a 2368 ldr r3, [r4] 624:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1349 .loc 1 624 6 view .LVU412 1350 002c 13F0020F tst r3, #2 1351 0030 17D0 beq .L121 628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1352 .loc 1 628 5 is_stmt 1 view .LVU413 628:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1353 .loc 1 628 8 is_stmt 0 view .LVU414 1354 0032 13F0040F tst r3, #4 1355 0036 04D0 beq .L122 630:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1356 .loc 1 630 7 is_stmt 1 view .LVU415 1357 0038 454A ldr r2, .L146+4 1358 003a 9368 ldr r3, [r2, #8] ARM GAS /tmp/ccnj6RPV.s page 44 1359 003c 43F4E053 orr r3, r3, #7168 1360 0040 9360 str r3, [r2, #8] 1361 .L122: 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1362 .loc 1 633 5 view .LVU416 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1363 .loc 1 633 28 is_stmt 0 view .LVU417 1364 0042 2368 ldr r3, [r4] 633:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1365 .loc 1 633 8 view .LVU418 1366 0044 13F0080F tst r3, #8 1367 0048 04D0 beq .L123 635:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1368 .loc 1 635 7 is_stmt 1 view .LVU419 1369 004a 414A ldr r2, .L146+4 1370 004c 9368 ldr r3, [r2, #8] 1371 004e 43F46043 orr r3, r3, #57344 1372 0052 9360 str r3, [r2, #8] 1373 .L123: 638:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 1374 .loc 1 638 5 view .LVU420 639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1375 .loc 1 639 5 view .LVU421 1376 0054 3E4A ldr r2, .L146+4 1377 0056 9368 ldr r3, [r2, #8] 1378 0058 23F0F003 bic r3, r3, #240 1379 005c A168 ldr r1, [r4, #8] 1380 .LVL87: 639:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1381 .loc 1 639 5 is_stmt 0 view .LVU422 1382 005e 0B43 orrs r3, r3, r1 1383 0060 9360 str r3, [r2, #8] 1384 .L121: 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1385 .loc 1 643 3 is_stmt 1 view .LVU423 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1386 .loc 1 643 26 is_stmt 0 view .LVU424 1387 0062 2368 ldr r3, [r4] 643:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1388 .loc 1 643 6 view .LVU425 1389 0064 13F0010F tst r3, #1 1390 0068 32D0 beq .L124 645:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1391 .loc 1 645 5 is_stmt 1 view .LVU426 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1392 .loc 1 648 5 view .LVU427 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1393 .loc 1 648 26 is_stmt 0 view .LVU428 1394 006a 6368 ldr r3, [r4, #4] 648:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1395 .loc 1 648 8 view .LVU429 1396 006c 012B cmp r3, #1 1397 006e 21D0 beq .L144 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 1398 .loc 1 657 10 is_stmt 1 view .LVU430 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 1399 .loc 1 657 77 is_stmt 0 view .LVU431 ARM GAS /tmp/ccnj6RPV.s page 45 1400 0070 9A1E subs r2, r3, #2 657:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 1401 .loc 1 657 13 view .LVU432 1402 0072 012A cmp r2, #1 1403 0074 25D9 bls .L145 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1404 .loc 1 670 7 is_stmt 1 view .LVU433 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1405 .loc 1 670 11 is_stmt 0 view .LVU434 1406 0076 364A ldr r2, .L146+4 1407 0078 1268 ldr r2, [r2] 670:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1408 .loc 1 670 10 view .LVU435 1409 007a 12F0020F tst r2, #2 1410 007e 61D0 beq .L137 1411 .L126: 676:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1412 .loc 1 676 5 is_stmt 1 view .LVU436 1413 0080 3349 ldr r1, .L146+4 1414 0082 8A68 ldr r2, [r1, #8] 1415 0084 22F00302 bic r2, r2, #3 1416 0088 1343 orrs r3, r3, r2 1417 008a 8B60 str r3, [r1, #8] 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1418 .loc 1 679 5 view .LVU437 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1419 .loc 1 679 17 is_stmt 0 view .LVU438 1420 008c FFF7FEFF bl HAL_GetTick 1421 .LVL88: 679:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1422 .loc 1 679 17 view .LVU439 1423 0090 0646 mov r6, r0 1424 .LVL89: 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1425 .loc 1 681 5 is_stmt 1 view .LVU440 1426 .L128: 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1427 .loc 1 681 11 view .LVU441 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1428 .loc 1 681 12 is_stmt 0 view .LVU442 1429 0092 2F4B ldr r3, .L146+4 1430 0094 9B68 ldr r3, [r3, #8] 1431 0096 03F00C03 and r3, r3, #12 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1432 .loc 1 681 63 view .LVU443 1433 009a 6268 ldr r2, [r4, #4] 681:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1434 .loc 1 681 11 view .LVU444 1435 009c B3EB820F cmp r3, r2, lsl #2 1436 00a0 16D0 beq .L124 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1437 .loc 1 683 7 is_stmt 1 view .LVU445 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1438 .loc 1 683 12 is_stmt 0 view .LVU446 1439 00a2 FFF7FEFF bl HAL_GetTick 1440 .LVL90: 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { ARM GAS /tmp/ccnj6RPV.s page 46 1441 .loc 1 683 26 view .LVU447 1442 00a6 801B subs r0, r0, r6 683:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1443 .loc 1 683 10 view .LVU448 1444 00a8 41F28833 movw r3, #5000 1445 00ac 9842 cmp r0, r3 1446 00ae F0D9 bls .L128 685:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1447 .loc 1 685 16 view .LVU449 1448 00b0 0320 movs r0, #3 1449 00b2 42E0 b .L119 1450 .LVL91: 1451 .L144: 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1452 .loc 1 651 7 is_stmt 1 view .LVU450 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1453 .loc 1 651 11 is_stmt 0 view .LVU451 1454 00b4 264A ldr r2, .L146+4 1455 00b6 1268 ldr r2, [r2] 651:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1456 .loc 1 651 10 view .LVU452 1457 00b8 12F4003F tst r2, #131072 1458 00bc E0D1 bne .L126 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1459 .loc 1 653 16 view .LVU453 1460 00be 0120 movs r0, #1 1461 .LVL92: 653:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1462 .loc 1 653 16 view .LVU454 1463 00c0 3BE0 b .L119 1464 .LVL93: 1465 .L145: 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1466 .loc 1 661 7 is_stmt 1 view .LVU455 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1467 .loc 1 661 11 is_stmt 0 view .LVU456 1468 00c2 234A ldr r2, .L146+4 1469 00c4 1268 ldr r2, [r2] 661:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1470 .loc 1 661 10 view .LVU457 1471 00c6 12F0007F tst r2, #33554432 1472 00ca D9D1 bne .L126 663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1473 .loc 1 663 16 view .LVU458 1474 00cc 0120 movs r0, #1 1475 .LVL94: 663:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1476 .loc 1 663 16 view .LVU459 1477 00ce 34E0 b .L119 1478 .L124: 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1479 .loc 1 691 3 is_stmt 1 view .LVU460 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1480 .loc 1 691 18 is_stmt 0 view .LVU461 1481 00d0 1E4B ldr r3, .L146 1482 00d2 1B68 ldr r3, [r3] 1483 00d4 03F00703 and r3, r3, #7 ARM GAS /tmp/ccnj6RPV.s page 47 691:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1484 .loc 1 691 6 view .LVU462 1485 00d8 AB42 cmp r3, r5 1486 00da 07D9 bls .L130 694:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1487 .loc 1 694 5 is_stmt 1 view .LVU463 1488 00dc EAB2 uxtb r2, r5 1489 00de 1B4B ldr r3, .L146 1490 00e0 1A70 strb r2, [r3] 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1491 .loc 1 698 5 view .LVU464 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1492 .loc 1 698 9 is_stmt 0 view .LVU465 1493 00e2 1B68 ldr r3, [r3] 1494 00e4 03F00703 and r3, r3, #7 698:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1495 .loc 1 698 8 view .LVU466 1496 00e8 AB42 cmp r3, r5 1497 00ea 2DD1 bne .L139 1498 .L130: 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1499 .loc 1 705 3 is_stmt 1 view .LVU467 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1500 .loc 1 705 26 is_stmt 0 view .LVU468 1501 00ec 2368 ldr r3, [r4] 705:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1502 .loc 1 705 6 view .LVU469 1503 00ee 13F0040F tst r3, #4 1504 00f2 06D0 beq .L131 707:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 1505 .loc 1 707 5 is_stmt 1 view .LVU470 708:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1506 .loc 1 708 5 view .LVU471 1507 00f4 164A ldr r2, .L146+4 1508 00f6 9368 ldr r3, [r2, #8] 1509 00f8 23F4E053 bic r3, r3, #7168 1510 00fc E168 ldr r1, [r4, #12] 1511 00fe 0B43 orrs r3, r3, r1 1512 0100 9360 str r3, [r2, #8] 1513 .L131: 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1514 .loc 1 712 3 view .LVU472 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1515 .loc 1 712 26 is_stmt 0 view .LVU473 1516 0102 2368 ldr r3, [r4] 712:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1517 .loc 1 712 6 view .LVU474 1518 0104 13F0080F tst r3, #8 1519 0108 07D0 beq .L132 714:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 1520 .loc 1 714 5 is_stmt 1 view .LVU475 715:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1521 .loc 1 715 5 view .LVU476 1522 010a 114A ldr r2, .L146+4 1523 010c 9368 ldr r3, [r2, #8] 1524 010e 23F46043 bic r3, r3, #57344 1525 0112 2169 ldr r1, [r4, #16] ARM GAS /tmp/ccnj6RPV.s page 48 1526 0114 43EAC103 orr r3, r3, r1, lsl #3 1527 0118 9360 str r3, [r2, #8] 1528 .L132: 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1529 .loc 1 719 3 view .LVU477 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1530 .loc 1 719 21 is_stmt 0 view .LVU478 1531 011a FFF7FEFF bl HAL_RCC_GetSysClockFreq 1532 .LVL95: 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1533 .loc 1 719 68 view .LVU479 1534 011e 0C4B ldr r3, .L146+4 1535 0120 9B68 ldr r3, [r3, #8] 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1536 .loc 1 719 92 view .LVU480 1537 0122 C3F30313 ubfx r3, r3, #4, #4 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1538 .loc 1 719 63 view .LVU481 1539 0126 0B4A ldr r2, .L146+8 1540 0128 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1541 .loc 1 719 47 view .LVU482 1542 012a D840 lsrs r0, r0, r3 719:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1543 .loc 1 719 19 view .LVU483 1544 012c 0A4B ldr r3, .L146+12 1545 012e 1860 str r0, [r3] 722:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1546 .loc 1 722 3 is_stmt 1 view .LVU484 1547 0130 0A4B ldr r3, .L146+16 1548 0132 1868 ldr r0, [r3] 1549 0134 FFF7FEFF bl HAL_InitTick 1550 .LVL96: 724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1551 .loc 1 724 3 view .LVU485 724:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1552 .loc 1 724 10 is_stmt 0 view .LVU486 1553 0138 0020 movs r0, #0 1554 .L119: 725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1555 .loc 1 725 1 view .LVU487 1556 013a 70BD pop {r4, r5, r6, pc} 1557 .LVL97: 1558 .L133: 1559 .LCFI12: 1560 .cfi_def_cfa_offset 0 1561 .cfi_restore 4 1562 .cfi_restore 5 1563 .cfi_restore 6 1564 .cfi_restore 14 598:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1565 .loc 1 598 12 view .LVU488 1566 013c 0120 movs r0, #1 1567 .LVL98: 725:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1568 .loc 1 725 1 view .LVU489 1569 013e 7047 bx lr ARM GAS /tmp/ccnj6RPV.s page 49 1570 .LVL99: 1571 .L134: 1572 .LCFI13: 1573 .cfi_def_cfa_offset 16 1574 .cfi_offset 4, -16 1575 .cfi_offset 5, -12 1576 .cfi_offset 6, -8 1577 .cfi_offset 14, -4 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1578 .loc 1 619 14 view .LVU490 1579 0140 0120 movs r0, #1 1580 .LVL100: 619:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1581 .loc 1 619 14 view .LVU491 1582 0142 FAE7 b .L119 1583 .LVL101: 1584 .L137: 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1585 .loc 1 672 16 view .LVU492 1586 0144 0120 movs r0, #1 1587 .LVL102: 672:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1588 .loc 1 672 16 view .LVU493 1589 0146 F8E7 b .L119 1590 .L139: 700:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1591 .loc 1 700 14 view .LVU494 1592 0148 0120 movs r0, #1 1593 014a F6E7 b .L119 1594 .L147: 1595 .align 2 1596 .L146: 1597 014c 003C0240 .word 1073888256 1598 0150 00380240 .word 1073887232 1599 0154 00000000 .word AHBPrescTable 1600 0158 00000000 .word SystemCoreClock 1601 015c 00000000 .word uwTickPrio 1602 .cfi_endproc 1603 .LFE136: 1605 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits 1606 .align 1 1607 .global HAL_RCC_GetHCLKFreq 1608 .syntax unified 1609 .thumb 1610 .thumb_func 1611 .fpu fpv4-sp-d16 1613 HAL_RCC_GetHCLKFreq: 1614 .LFB141: 933:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 934:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 935:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the HCLK frequency 936:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the 937:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect 938:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * 939:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency 940:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * and updated within this function 941:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval HCLK frequency ARM GAS /tmp/ccnj6RPV.s page 50 942:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 943:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) 944:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1615 .loc 1 944 1 is_stmt 1 view -0 1616 .cfi_startproc 1617 @ args = 0, pretend = 0, frame = 0 1618 @ frame_needed = 0, uses_anonymous_args = 0 1619 @ link register save eliminated. 945:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return SystemCoreClock; 1620 .loc 1 945 3 view .LVU496 946:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1621 .loc 1 946 1 is_stmt 0 view .LVU497 1622 0000 014B ldr r3, .L149 1623 0002 1868 ldr r0, [r3] 1624 0004 7047 bx lr 1625 .L150: 1626 0006 00BF .align 2 1627 .L149: 1628 0008 00000000 .word SystemCoreClock 1629 .cfi_endproc 1630 .LFE141: 1632 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits 1633 .align 1 1634 .global HAL_RCC_GetPCLK1Freq 1635 .syntax unified 1636 .thumb 1637 .thumb_func 1638 .fpu fpv4-sp-d16 1640 HAL_RCC_GetPCLK1Freq: 1641 .LFB142: 947:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 948:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 949:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency 950:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the 951:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec 952:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK1 frequency 953:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 954:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) 955:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1642 .loc 1 955 1 is_stmt 1 view -0 1643 .cfi_startproc 1644 @ args = 0, pretend = 0, frame = 0 1645 @ frame_needed = 0, uses_anonymous_args = 0 1646 0000 08B5 push {r3, lr} 1647 .LCFI14: 1648 .cfi_def_cfa_offset 8 1649 .cfi_offset 3, -8 1650 .cfi_offset 14, -4 956:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ 957:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos 1651 .loc 1 957 3 view .LVU499 1652 .loc 1 957 11 is_stmt 0 view .LVU500 1653 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq 1654 .LVL103: 1655 .loc 1 957 54 view .LVU501 1656 0006 044B ldr r3, .L153 1657 0008 9B68 ldr r3, [r3, #8] ARM GAS /tmp/ccnj6RPV.s page 51 1658 .loc 1 957 79 view .LVU502 1659 000a C3F38223 ubfx r3, r3, #10, #3 1660 .loc 1 957 49 view .LVU503 1661 000e 034A ldr r2, .L153+4 1662 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 958:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1663 .loc 1 958 1 view .LVU504 1664 0012 D840 lsrs r0, r0, r3 1665 0014 08BD pop {r3, pc} 1666 .L154: 1667 0016 00BF .align 2 1668 .L153: 1669 0018 00380240 .word 1073887232 1670 001c 00000000 .word APBPrescTable 1671 .cfi_endproc 1672 .LFE142: 1674 .section .text.HAL_RCC_GetPCLK2Freq,"ax",%progbits 1675 .align 1 1676 .global HAL_RCC_GetPCLK2Freq 1677 .syntax unified 1678 .thumb 1679 .thumb_func 1680 .fpu fpv4-sp-d16 1682 HAL_RCC_GetPCLK2Freq: 1683 .LFB143: 959:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 960:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 961:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency 962:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the 963:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec 964:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval PCLK2 frequency 965:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 966:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK2Freq(void) 967:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1684 .loc 1 967 1 is_stmt 1 view -0 1685 .cfi_startproc 1686 @ args = 0, pretend = 0, frame = 0 1687 @ frame_needed = 0, uses_anonymous_args = 0 1688 0000 08B5 push {r3, lr} 1689 .LCFI15: 1690 .cfi_def_cfa_offset 8 1691 .cfi_offset 3, -8 1692 .cfi_offset 14, -4 968:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ 969:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos 1693 .loc 1 969 3 view .LVU506 1694 .loc 1 969 11 is_stmt 0 view .LVU507 1695 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq 1696 .LVL104: 1697 .loc 1 969 54 view .LVU508 1698 0006 044B ldr r3, .L157 1699 0008 9B68 ldr r3, [r3, #8] 1700 .loc 1 969 79 view .LVU509 1701 000a C3F34233 ubfx r3, r3, #13, #3 1702 .loc 1 969 49 view .LVU510 1703 000e 034A ldr r2, .L157+4 1704 0010 D35C ldrb r3, [r2, r3] @ zero_extendqisi2 ARM GAS /tmp/ccnj6RPV.s page 52 970:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1705 .loc 1 970 1 view .LVU511 1706 0012 D840 lsrs r0, r0, r3 1707 0014 08BD pop {r3, pc} 1708 .L158: 1709 0016 00BF .align 2 1710 .L157: 1711 0018 00380240 .word 1073887232 1712 001c 00000000 .word APBPrescTable 1713 .cfi_endproc 1714 .LFE143: 1716 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits 1717 .align 1 1718 .weak HAL_RCC_GetOscConfig 1719 .syntax unified 1720 .thumb 1721 .thumb_func 1722 .fpu fpv4-sp-d16 1724 HAL_RCC_GetOscConfig: 1725 .LVL105: 1726 .LFB144: 971:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 972:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 973:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal 974:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers. 975:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 976:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured. 977:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 978:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 979:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) 980:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1727 .loc 1 980 1 is_stmt 1 view -0 1728 .cfi_startproc 1729 @ args = 0, pretend = 0, frame = 0 1730 @ frame_needed = 0, uses_anonymous_args = 0 1731 @ link register save eliminated. 981:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ 982:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLA 1732 .loc 1 982 3 view .LVU513 1733 .loc 1 982 37 is_stmt 0 view .LVU514 1734 0000 0F23 movs r3, #15 1735 0002 0360 str r3, [r0] 983:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 984:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ 985:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CR & RCC_CR_HSEBYP) == RCC_CR_HSEBYP) 1736 .loc 1 985 3 is_stmt 1 view .LVU515 1737 .loc 1 985 11 is_stmt 0 view .LVU516 1738 0004 304B ldr r3, .L172 1739 0006 1B68 ldr r3, [r3] 1740 .loc 1 985 6 view .LVU517 1741 0008 13F4802F tst r3, #262144 1742 000c 3BD0 beq .L160 986:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 987:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; 1743 .loc 1 987 5 is_stmt 1 view .LVU518 1744 .loc 1 987 33 is_stmt 0 view .LVU519 1745 000e 4FF4A023 mov r3, #327680 ARM GAS /tmp/ccnj6RPV.s page 53 1746 0012 4360 str r3, [r0, #4] 1747 .L161: 988:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if ((RCC->CR & RCC_CR_HSEON) == RCC_CR_HSEON) 990:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; 992:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 993:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 994:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; 996:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 997:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 998:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ 999:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CR & RCC_CR_HSION) == RCC_CR_HSION) 1748 .loc 1 999 3 is_stmt 1 view .LVU520 1749 .loc 1 999 11 is_stmt 0 view .LVU521 1750 0014 2C4B ldr r3, .L172 1751 0016 1B68 ldr r3, [r3] 1752 .loc 1 999 6 view .LVU522 1753 0018 13F0010F tst r3, #1 1754 001c 3FD0 beq .L163 1000:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1001:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; 1755 .loc 1 1001 5 is_stmt 1 view .LVU523 1756 .loc 1 1001 33 is_stmt 0 view .LVU524 1757 001e 0123 movs r3, #1 1758 0020 C360 str r3, [r0, #12] 1759 .L164: 1002:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1003:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1004:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; 1006:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1007:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1008:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR & RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_ 1760 .loc 1 1008 3 is_stmt 1 view .LVU525 1761 .loc 1 1008 59 is_stmt 0 view .LVU526 1762 0022 294A ldr r2, .L172 1763 0024 1368 ldr r3, [r2] 1764 .loc 1 1008 44 view .LVU527 1765 0026 C3F3C403 ubfx r3, r3, #3, #5 1766 .loc 1 1008 42 view .LVU528 1767 002a 0361 str r3, [r0, #16] 1009:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1010:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ 1011:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->BDCR & RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) 1768 .loc 1 1011 3 is_stmt 1 view .LVU529 1769 .loc 1 1011 11 is_stmt 0 view .LVU530 1770 002c 136F ldr r3, [r2, #112] 1771 .loc 1 1011 6 view .LVU531 1772 002e 13F0040F tst r3, #4 1773 0032 37D0 beq .L165 1012:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1013:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; 1774 .loc 1 1013 5 is_stmt 1 view .LVU532 1775 .loc 1 1013 33 is_stmt 0 view .LVU533 1776 0034 0523 movs r3, #5 ARM GAS /tmp/ccnj6RPV.s page 54 1777 0036 8360 str r3, [r0, #8] 1778 .L166: 1014:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else if ((RCC->BDCR & RCC_BDCR_LSEON) == RCC_BDCR_LSEON) 1016:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; 1018:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1019:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1020:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; 1022:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1023:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1024:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ 1025:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CSR & RCC_CSR_LSION) == RCC_CSR_LSION) 1779 .loc 1 1025 3 is_stmt 1 view .LVU534 1780 .loc 1 1025 11 is_stmt 0 view .LVU535 1781 0038 234B ldr r3, .L172 1782 003a 5B6F ldr r3, [r3, #116] 1783 .loc 1 1025 6 view .LVU536 1784 003c 13F0010F tst r3, #1 1785 0040 3BD0 beq .L168 1026:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1027:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; 1786 .loc 1 1027 5 is_stmt 1 view .LVU537 1787 .loc 1 1027 33 is_stmt 0 view .LVU538 1788 0042 0123 movs r3, #1 1789 0044 4361 str r3, [r0, #20] 1790 .L169: 1028:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1029:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1030:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; 1032:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1033:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1034:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ 1035:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if ((RCC->CR & RCC_CR_PLLON) == RCC_CR_PLLON) 1791 .loc 1 1035 3 is_stmt 1 view .LVU539 1792 .loc 1 1035 11 is_stmt 0 view .LVU540 1793 0046 204B ldr r3, .L172 1794 0048 1B68 ldr r3, [r3] 1795 .loc 1 1035 6 view .LVU541 1796 004a 13F0807F tst r3, #16777216 1797 004e 37D0 beq .L170 1036:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1037:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; 1798 .loc 1 1037 5 is_stmt 1 view .LVU542 1799 .loc 1 1037 37 is_stmt 0 view .LVU543 1800 0050 0223 movs r3, #2 1801 0052 8361 str r3, [r0, #24] 1802 .L171: 1038:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1039:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** else 1040:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; 1042:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1043:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); 1803 .loc 1 1043 3 is_stmt 1 view .LVU544 ARM GAS /tmp/ccnj6RPV.s page 55 1804 .loc 1 1043 52 is_stmt 0 view .LVU545 1805 0054 1C4A ldr r2, .L172 1806 0056 5368 ldr r3, [r2, #4] 1807 .loc 1 1043 38 view .LVU546 1808 0058 03F48003 and r3, r3, #4194304 1809 .loc 1 1043 36 view .LVU547 1810 005c C361 str r3, [r0, #28] 1044:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLM = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM); 1811 .loc 1 1044 3 is_stmt 1 view .LVU548 1812 .loc 1 1044 47 is_stmt 0 view .LVU549 1813 005e 5368 ldr r3, [r2, #4] 1814 .loc 1 1044 33 view .LVU550 1815 0060 03F03F03 and r3, r3, #63 1816 .loc 1 1044 31 view .LVU551 1817 0064 0362 str r3, [r0, #32] 1045:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLN = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Po 1818 .loc 1 1045 3 is_stmt 1 view .LVU552 1819 .loc 1 1045 48 is_stmt 0 view .LVU553 1820 0066 5368 ldr r3, [r2, #4] 1821 .loc 1 1045 33 view .LVU554 1822 0068 C3F38813 ubfx r3, r3, #6, #9 1823 .loc 1 1045 31 view .LVU555 1824 006c 4362 str r3, [r0, #36] 1046:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLP = (uint32_t)((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) + RCC_PLLCFGR_PLLP_0 1825 .loc 1 1046 3 is_stmt 1 view .LVU556 1826 .loc 1 1046 50 is_stmt 0 view .LVU557 1827 006e 5368 ldr r3, [r2, #4] 1828 .loc 1 1046 60 view .LVU558 1829 0070 03F44033 and r3, r3, #196608 1830 .loc 1 1046 80 view .LVU559 1831 0074 03F58033 add r3, r3, #65536 1832 .loc 1 1046 33 view .LVU560 1833 0078 DB0B lsrs r3, r3, #15 1834 .loc 1 1046 31 view .LVU561 1835 007a 8362 str r3, [r0, #40] 1047:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLQ = (uint32_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ) >> RCC_PLLCFGR_PLLQ_Po 1836 .loc 1 1047 3 is_stmt 1 view .LVU562 1837 .loc 1 1047 48 is_stmt 0 view .LVU563 1838 007c 5368 ldr r3, [r2, #4] 1839 .loc 1 1047 33 view .LVU564 1840 007e C3F30363 ubfx r3, r3, #24, #4 1841 .loc 1 1047 31 view .LVU565 1842 0082 C362 str r3, [r0, #44] 1048:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1843 .loc 1 1048 1 view .LVU566 1844 0084 7047 bx lr 1845 .L160: 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1846 .loc 1 989 8 is_stmt 1 view .LVU567 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1847 .loc 1 989 16 is_stmt 0 view .LVU568 1848 0086 104B ldr r3, .L172 1849 0088 1B68 ldr r3, [r3] 989:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1850 .loc 1 989 11 view .LVU569 1851 008a 13F4803F tst r3, #65536 1852 008e 03D0 beq .L162 ARM GAS /tmp/ccnj6RPV.s page 56 991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1853 .loc 1 991 5 is_stmt 1 view .LVU570 991:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1854 .loc 1 991 33 is_stmt 0 view .LVU571 1855 0090 4FF48033 mov r3, #65536 1856 0094 4360 str r3, [r0, #4] 1857 0096 BDE7 b .L161 1858 .L162: 995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1859 .loc 1 995 5 is_stmt 1 view .LVU572 995:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1860 .loc 1 995 33 is_stmt 0 view .LVU573 1861 0098 0023 movs r3, #0 1862 009a 4360 str r3, [r0, #4] 1863 009c BAE7 b .L161 1864 .L163: 1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1865 .loc 1 1005 5 is_stmt 1 view .LVU574 1005:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1866 .loc 1 1005 33 is_stmt 0 view .LVU575 1867 009e 0023 movs r3, #0 1868 00a0 C360 str r3, [r0, #12] 1869 00a2 BEE7 b .L164 1870 .L165: 1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1871 .loc 1 1015 8 is_stmt 1 view .LVU576 1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1872 .loc 1 1015 16 is_stmt 0 view .LVU577 1873 00a4 084B ldr r3, .L172 1874 00a6 1B6F ldr r3, [r3, #112] 1015:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1875 .loc 1 1015 11 view .LVU578 1876 00a8 13F0010F tst r3, #1 1877 00ac 02D0 beq .L167 1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1878 .loc 1 1017 5 is_stmt 1 view .LVU579 1017:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1879 .loc 1 1017 33 is_stmt 0 view .LVU580 1880 00ae 0123 movs r3, #1 1881 00b0 8360 str r3, [r0, #8] 1882 00b2 C1E7 b .L166 1883 .L167: 1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1884 .loc 1 1021 5 is_stmt 1 view .LVU581 1021:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1885 .loc 1 1021 33 is_stmt 0 view .LVU582 1886 00b4 0023 movs r3, #0 1887 00b6 8360 str r3, [r0, #8] 1888 00b8 BEE7 b .L166 1889 .L168: 1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1890 .loc 1 1031 5 is_stmt 1 view .LVU583 1031:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1891 .loc 1 1031 33 is_stmt 0 view .LVU584 1892 00ba 0023 movs r3, #0 1893 00bc 4361 str r3, [r0, #20] 1894 00be C2E7 b .L169 ARM GAS /tmp/ccnj6RPV.s page 57 1895 .L170: 1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1896 .loc 1 1041 5 is_stmt 1 view .LVU585 1041:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1897 .loc 1 1041 37 is_stmt 0 view .LVU586 1898 00c0 0123 movs r3, #1 1899 00c2 8361 str r3, [r0, #24] 1900 00c4 C6E7 b .L171 1901 .L173: 1902 00c6 00BF .align 2 1903 .L172: 1904 00c8 00380240 .word 1073887232 1905 .cfi_endproc 1906 .LFE144: 1908 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits 1909 .align 1 1910 .global HAL_RCC_GetClockConfig 1911 .syntax unified 1912 .thumb 1913 .thumb_func 1914 .fpu fpv4-sp-d16 1916 HAL_RCC_GetClockConfig: 1917 .LVL106: 1918 .LFB145: 1049:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1050:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1051:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief Configures the RCC_ClkInitStruct according to the internal 1052:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * RCC configuration registers. 1053:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 1054:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * will be configured. 1055:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. 1056:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1057:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1058:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) 1059:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1919 .loc 1 1059 1 is_stmt 1 view -0 1920 .cfi_startproc 1921 @ args = 0, pretend = 0, frame = 0 1922 @ frame_needed = 0, uses_anonymous_args = 0 1923 @ link register save eliminated. 1060:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ 1061:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | 1924 .loc 1 1061 3 view .LVU588 1925 .loc 1 1061 32 is_stmt 0 view .LVU589 1926 0000 0F23 movs r3, #15 1927 0002 0360 str r3, [r0] 1062:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1063:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ 1064:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); 1928 .loc 1 1064 3 is_stmt 1 view .LVU590 1929 .loc 1 1064 51 is_stmt 0 view .LVU591 1930 0004 0B4B ldr r3, .L175 1931 0006 9A68 ldr r2, [r3, #8] 1932 .loc 1 1064 37 view .LVU592 1933 0008 02F00302 and r2, r2, #3 1934 .loc 1 1064 35 view .LVU593 1935 000c 4260 str r2, [r0, #4] ARM GAS /tmp/ccnj6RPV.s page 58 1065:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1066:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ 1067:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 1936 .loc 1 1067 3 is_stmt 1 view .LVU594 1937 .loc 1 1067 52 is_stmt 0 view .LVU595 1938 000e 9A68 ldr r2, [r3, #8] 1939 .loc 1 1067 38 view .LVU596 1940 0010 02F0F002 and r2, r2, #240 1941 .loc 1 1067 36 view .LVU597 1942 0014 8260 str r2, [r0, #8] 1068:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1069:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ 1070:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); 1943 .loc 1 1070 3 is_stmt 1 view .LVU598 1944 .loc 1 1070 53 is_stmt 0 view .LVU599 1945 0016 9A68 ldr r2, [r3, #8] 1946 .loc 1 1070 39 view .LVU600 1947 0018 02F4E052 and r2, r2, #7168 1948 .loc 1 1070 37 view .LVU601 1949 001c C260 str r2, [r0, #12] 1071:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1072:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/ 1073:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3U); 1950 .loc 1 1073 3 is_stmt 1 view .LVU602 1951 .loc 1 1073 54 is_stmt 0 view .LVU603 1952 001e 9B68 ldr r3, [r3, #8] 1953 .loc 1 1073 39 view .LVU604 1954 0020 DB08 lsrs r3, r3, #3 1955 0022 03F4E053 and r3, r3, #7168 1956 .loc 1 1073 37 view .LVU605 1957 0026 0361 str r3, [r0, #16] 1074:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1075:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ 1076:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 1958 .loc 1 1076 3 is_stmt 1 view .LVU606 1959 .loc 1 1076 32 is_stmt 0 view .LVU607 1960 0028 034B ldr r3, .L175+4 1961 002a 1B68 ldr r3, [r3] 1962 .loc 1 1076 16 view .LVU608 1963 002c 03F00703 and r3, r3, #7 1964 .loc 1 1076 14 view .LVU609 1965 0030 0B60 str r3, [r1] 1077:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1966 .loc 1 1077 1 view .LVU610 1967 0032 7047 bx lr 1968 .L176: 1969 .align 2 1970 .L175: 1971 0034 00380240 .word 1073887232 1972 0038 003C0240 .word 1073888256 1973 .cfi_endproc 1974 .LFE145: 1976 .section .text.HAL_RCC_CSSCallback,"ax",%progbits 1977 .align 1 1978 .weak HAL_RCC_CSSCallback 1979 .syntax unified 1980 .thumb ARM GAS /tmp/ccnj6RPV.s page 59 1981 .thumb_func 1982 .fpu fpv4-sp-d16 1984 HAL_RCC_CSSCallback: 1985 .LFB147: 1078:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1079:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1080:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. 1081:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). 1082:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1083:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1084:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) 1085:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1086:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */ 1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** if (__HAL_RCC_GET_IT(RCC_IT_CSS)) 1088:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1089:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ 1090:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** HAL_RCC_CSSCallback(); 1091:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1092:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ 1093:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); 1094:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1095:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1096:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 1097:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /** 1098:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback 1099:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** * @retval None 1100:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1101:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) 1102:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 1986 .loc 1 1102 1 is_stmt 1 view -0 1987 .cfi_startproc 1988 @ args = 0, pretend = 0, frame = 0 1989 @ frame_needed = 0, uses_anonymous_args = 0 1990 @ link register save eliminated. 1103:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, 1104:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file 1105:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** */ 1106:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 1991 .loc 1 1106 1 view .LVU612 1992 0000 7047 bx lr 1993 .cfi_endproc 1994 .LFE147: 1996 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits 1997 .align 1 1998 .global HAL_RCC_NMI_IRQHandler 1999 .syntax unified 2000 .thumb 2001 .thumb_func 2002 .fpu fpv4-sp-d16 2004 HAL_RCC_NMI_IRQHandler: 2005 .LFB146: 1085:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** /* Check RCC CSSF flag */ 2006 .loc 1 1085 1 view -0 2007 .cfi_startproc 2008 @ args = 0, pretend = 0, frame = 0 2009 @ frame_needed = 0, uses_anonymous_args = 0 2010 0000 08B5 push {r3, lr} ARM GAS /tmp/ccnj6RPV.s page 60 2011 .LCFI16: 2012 .cfi_def_cfa_offset 8 2013 .cfi_offset 3, -8 2014 .cfi_offset 14, -4 1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 2015 .loc 1 1087 3 view .LVU614 1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 2016 .loc 1 1087 7 is_stmt 0 view .LVU615 2017 0002 064B ldr r3, .L182 2018 0004 DB68 ldr r3, [r3, #12] 1087:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** { 2019 .loc 1 1087 6 view .LVU616 2020 0006 13F0800F tst r3, #128 2021 000a 00D1 bne .L181 2022 .L178: 1095:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 2023 .loc 1 1095 1 view .LVU617 2024 000c 08BD pop {r3, pc} 2025 .L181: 1090:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 2026 .loc 1 1090 5 is_stmt 1 view .LVU618 2027 000e FFF7FEFF bl HAL_RCC_CSSCallback 2028 .LVL107: 1093:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** } 2029 .loc 1 1093 5 view .LVU619 2030 0012 024B ldr r3, .L182 2031 0014 8022 movs r2, #128 2032 0016 9A73 strb r2, [r3, #14] 1095:Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c **** 2033 .loc 1 1095 1 is_stmt 0 view .LVU620 2034 0018 F8E7 b .L178 2035 .L183: 2036 001a 00BF .align 2 2037 .L182: 2038 001c 00380240 .word 1073887232 2039 .cfi_endproc 2040 .LFE146: 2042 .text 2043 .Letext0: 2044 .file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h" 2045 .file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h" 2046 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h" 2047 .file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h" 2048 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" 2049 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" 2050 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" 2051 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 2052 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" ARM GAS /tmp/ccnj6RPV.s page 61 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_hal_rcc.c /tmp/ccnj6RPV.s:18 .text.HAL_RCC_DeInit:0000000000000000 $t /tmp/ccnj6RPV.s:26 .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit /tmp/ccnj6RPV.s:42 .text.HAL_RCC_OscConfig:0000000000000000 $t /tmp/ccnj6RPV.s:49 .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig /tmp/ccnj6RPV.s:595 .text.HAL_RCC_OscConfig:0000000000000294 $d /tmp/ccnj6RPV.s:601 .text.HAL_RCC_OscConfig:00000000000002a0 $t /tmp/ccnj6RPV.s:914 .text.HAL_RCC_OscConfig:00000000000003f0 $d /tmp/ccnj6RPV.s:920 .text.HAL_RCC_MCOConfig:0000000000000000 $t /tmp/ccnj6RPV.s:927 .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig /tmp/ccnj6RPV.s:1083 .text.HAL_RCC_MCOConfig:0000000000000090 $d /tmp/ccnj6RPV.s:1090 .text.HAL_RCC_EnableCSS:0000000000000000 $t /tmp/ccnj6RPV.s:1097 .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS /tmp/ccnj6RPV.s:1114 .text.HAL_RCC_EnableCSS:0000000000000008 $d /tmp/ccnj6RPV.s:1119 .text.HAL_RCC_DisableCSS:0000000000000000 $t /tmp/ccnj6RPV.s:1126 .text.HAL_RCC_DisableCSS:0000000000000000 HAL_RCC_DisableCSS /tmp/ccnj6RPV.s:1143 .text.HAL_RCC_DisableCSS:0000000000000008 $d /tmp/ccnj6RPV.s:1149 .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t /tmp/ccnj6RPV.s:1156 .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq /tmp/ccnj6RPV.s:1288 .text.HAL_RCC_GetSysClockFreq:00000000000000c8 $d /tmp/ccnj6RPV.s:1295 .text.HAL_RCC_ClockConfig:0000000000000000 $t /tmp/ccnj6RPV.s:1302 .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig /tmp/ccnj6RPV.s:1597 .text.HAL_RCC_ClockConfig:000000000000014c $d /tmp/ccnj6RPV.s:1606 .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t /tmp/ccnj6RPV.s:1613 .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq /tmp/ccnj6RPV.s:1628 .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d /tmp/ccnj6RPV.s:1633 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t /tmp/ccnj6RPV.s:1640 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq /tmp/ccnj6RPV.s:1669 .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d /tmp/ccnj6RPV.s:1675 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 $t /tmp/ccnj6RPV.s:1682 .text.HAL_RCC_GetPCLK2Freq:0000000000000000 HAL_RCC_GetPCLK2Freq /tmp/ccnj6RPV.s:1711 .text.HAL_RCC_GetPCLK2Freq:0000000000000018 $d /tmp/ccnj6RPV.s:1717 .text.HAL_RCC_GetOscConfig:0000000000000000 $t /tmp/ccnj6RPV.s:1724 .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig /tmp/ccnj6RPV.s:1904 .text.HAL_RCC_GetOscConfig:00000000000000c8 $d /tmp/ccnj6RPV.s:1909 .text.HAL_RCC_GetClockConfig:0000000000000000 $t /tmp/ccnj6RPV.s:1916 .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig /tmp/ccnj6RPV.s:1971 .text.HAL_RCC_GetClockConfig:0000000000000034 $d /tmp/ccnj6RPV.s:1977 .text.HAL_RCC_CSSCallback:0000000000000000 $t /tmp/ccnj6RPV.s:1984 .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback /tmp/ccnj6RPV.s:1997 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t /tmp/ccnj6RPV.s:2004 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler /tmp/ccnj6RPV.s:2038 .text.HAL_RCC_NMI_IRQHandler:000000000000001c $d UNDEFINED SYMBOLS HAL_GetTick HAL_GPIO_Init __aeabi_uldivmod HAL_InitTick AHBPrescTable SystemCoreClock uwTickPrio APBPrescTable