From: ayabusa Date: Fri, 5 Sep 2025 15:32:53 +0000 (+0200) Subject: Finished Programmer X-Git-Url: https://git.ayabusa.dev/?a=commitdiff_plain;h=abdf2d58f0d4352691cb5ed551b628e66d6f3223;p=eeprom_programmer.git Finished Programmer --- diff --git a/.vscode/settings.json b/.vscode/settings.json index fe52345..4698bf7 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -2,6 +2,7 @@ "C_Cpp.errorSquiggles": "disabled", "files.associations": { "stm32f4xx_hal.h": "c", - "functional": "c" + "functional": "c", + "cstddef": "c" } } \ No newline at end of file diff --git a/Core/Inc/main.h b/Core/Inc/main.h index 7434a08..4340947 100644 --- a/Core/Inc/main.h +++ b/Core/Inc/main.h @@ -45,6 +45,10 @@ void Write_Command_Pins(int CE, int OE, int WE); void Write_Command(int addr, int data); int Flash_ReadByte(int addr); void Enter_Device_ID(int *manufacturer, int *device); +void Dump_Flash_UART(int visual_format); +void Chip_Erase(void); +void Chip_Program_Byte(int addr, int data); +void Flash_From_UART(void); void debug_print(const char *msg); diff --git a/Core/Src/main.c b/Core/Src/main.c index bf42bfa..afa1b41 100644 --- a/Core/Src/main.c +++ b/Core/Src/main.c @@ -62,16 +62,41 @@ int main(void) sprintf(manufacturer, "0x%02X \r\n", man_id); sprintf(device, "0x%02X \r\n", dev_id); + debug_print("==========================================\r\n"); debug_print("Manufacturer ID = \r\n"); debug_print(manufacturer); debug_print("Device ID = \r\n"); debug_print(device); - + debug_print("==========================================\r\n"); /* Infinite loop */ while (1) { - //debug_print("Hello from STM32!\r\n"); + debug_print("Hello welcome to the EEPROM programmer! What would you like to do?\r\n"); + debug_print("[1] Dump Rom as char\r\n"); + debug_print("[2] Erase chip\r\n"); + debug_print("[3] Program chip via UART\r\n"); + uint8_t resp; + HAL_UART_Receive(&huart2, &resp, 1, HAL_MAX_DELAY); + + switch (resp) + { + case 0x31: + debug_print("Dumping ROM...\r\n"); + Dump_Flash_UART(1); + break; + case 0x32: + debug_print("Erasing Chip...\r\n"); + Chip_Erase(); + break; + case 0x33: + debug_print("Launching programming sequence...\r\n"); + Flash_From_UART(); + break; + default: + debug_print("Invalid input!\r\n"); + break; + } } } @@ -168,6 +193,57 @@ void Enter_Device_ID(int *manufacturer, int *device){ Write_Command(0x5555, 0xF0); } +void Dump_Flash_UART(int visual_format){ + uint8_t byte; + char buf[8]; + + for (int addr = 0; addr < 0x80000; addr++) { // 512 KB + byte = Flash_ReadByte(addr); + + if(visual_format==0){ + // Send as raw byte: + HAL_UART_Transmit(&huart2, &byte, 1, HAL_MAX_DELAY); + }else{ + // Send as str + sprintf(buf, "%02X ", byte); + HAL_UART_Transmit(&huart2, (uint8_t*)buf, strlen(buf), HAL_MAX_DELAY); + if ((addr & 0x0F) == 0x0F) { + char newline[] = "\r\n"; + HAL_UART_Transmit(&huart2, (uint8_t*)newline, 2, HAL_MAX_DELAY); + } + } + } +} + +void Chip_Erase(void){ + // Erase sequence + Write_Command(0x5555, 0xAA); + Write_Command(0x2AAA, 0x55); + Write_Command(0x5555, 0x80); + Write_Command(0x5555, 0xAA); + Write_Command(0x2AAA, 0x55); + Write_Command(0x5555, 0x10); + + HAL_Delay(150); // it's 100ms max but by precaution +} + +void Chip_Program_Byte(int addr, int data){ + Write_Command(0x5555, 0xAA); + Write_Command(0x2AAA, 0x55); + Write_Command(0x5555, 0xA0); + Write_Command(addr, data); +} + +void Flash_From_UART(void){ + debug_print("Waiting for file to flash...\r\n"); + uint8_t byte; + for(int i=0; i<8; i++){ + HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + Chip_Program_Byte(i, (int)byte); + } + debug_print("finished\r\n"); +} + /** * @brief System Clock Configuration * @retval None diff --git a/build/EEPROM_programmer.bin b/build/EEPROM_programmer.bin index 5fc51cb..76d803e 100755 Binary files a/build/EEPROM_programmer.bin and b/build/EEPROM_programmer.bin differ diff --git a/build/EEPROM_programmer.elf b/build/EEPROM_programmer.elf index 73c10d3..1e47e80 100755 Binary files a/build/EEPROM_programmer.elf and b/build/EEPROM_programmer.elf differ diff --git a/build/EEPROM_programmer.hex b/build/EEPROM_programmer.hex index 6608e45..56bb2ac 100644 --- a/build/EEPROM_programmer.hex +++ b/build/EEPROM_programmer.hex @@ -1,44 +1,44 @@ :020000040800F2 -:10000000008001201D2700082D1900082F19000865 -:1000100031190008331900083519000800000000E4 -:100020000000000000000000000000003719000878 -:1000300039190008000000003B1900083D190008AC -:100040006D2700086D2700086D2700086D27000840 -:100050006D2700086D2700086D2700086D27000830 -:100060006D2700086D2700086D2700086D27000820 -:100070006D2700086D2700086D2700086D27000810 -:100080006D2700086D2700086D270008000000009C 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+:102C3800496E76616C696420696E707574210D0A3D +:102C48000000000000000000000000000102030472 +:102C5800060708090000000001020304232D302B99 +:102C680020000000686C4C00656667454647000018 +:102C780030313233343536373839414243444546AA +:102C8800000000003031323334353637383961626C +:082C98006364656600000000A2 +:082CA000FCE4FF7F01000000CD +:042CA80029020008F5 +:042CAC000102000819 +:102CB00004000020000000000000000000000000F0 +:102CC0000000000000000000000000000000000004 +:102CD00000000000000000000000000000000000F4 +:102CE00000000000000000000000000000000000E4 +:102CF00000000000000000000000000000000000D4 +:102D000000000000000000000000000000000000C3 +:102D10000000000001000000100000000024F4008A +:04000005080029EDD9 :00000001FF diff --git a/build/EEPROM_programmer.map b/build/EEPROM_programmer.map index 97ea3d9..4165524 100644 --- a/build/EEPROM_programmer.map +++ b/build/EEPROM_programmer.map @@ -105,8 +105,6 @@ Discarded input sections 0x0000000000000000 0x2 build/stm32f4xx_hal_uart.o .text.HAL_UART_DeInit 0x0000000000000000 0x34 build/stm32f4xx_hal_uart.o - .text.HAL_UART_Receive - 0x0000000000000000 0xd2 build/stm32f4xx_hal_uart.o .text.HAL_UART_Transmit_IT 0x0000000000000000 0x38 build/stm32f4xx_hal_uart.o .text.HAL_UART_Transmit_DMA @@ -591,8 +589,6 @@ Discarded input sections 0x0000000000000000 0x2c build/stm32f4xx_hal.o .text.HAL_GetTickFreq 0x0000000000000000 0xc build/stm32f4xx_hal.o - .text.HAL_Delay - 0x0000000000000000 0x28 build/stm32f4xx_hal.o .text.HAL_SuspendTick 0x0000000000000000 0xe build/stm32f4xx_hal.o .text.HAL_ResumeTick @@ -887,7 +883,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o 0x0000000008000000 g_pfnVectors 0x0000000008000194 . = ALIGN (0x4) -.text 0x00000000080001c0 0x25c8 +.text 0x00000000080001c0 0x2898 0x00000000080001c0 . = ALIGN (0x4) *(.text) .text 0x00000000080001c0 0x88 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o @@ -963,285 +959,309 @@ LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o .text.Write_Command 0x0000000008001690 0x46 build/main.o 0x0000000008001690 Write_Command + .text.Chip_Erase + 0x00000000080016d6 0x46 build/main.o + 0x00000000080016d6 Chip_Erase + .text.Chip_Program_Byte + 0x000000000800171c 0x2e build/main.o + 0x000000000800171c Chip_Program_Byte .text.Flash_ReadByte - 0x00000000080016d6 0x2a build/main.o - 0x00000000080016d6 Flash_ReadByte + 0x000000000800174a 0x2a build/main.o + 0x000000000800174a Flash_ReadByte .text.Enter_Device_ID - 0x0000000008001700 0x40 build/main.o - 0x0000000008001700 Enter_Device_ID + 0x0000000008001774 0x40 build/main.o + 0x0000000008001774 Enter_Device_ID + .text.Dump_Flash_UART + 0x00000000080017b4 0x88 build/main.o + 0x00000000080017b4 Dump_Flash_UART .text.Address_Pins_Init - 0x0000000008001740 0x4c build/main.o - 0x0000000008001740 Address_Pins_Init + 0x000000000800183c 0x4c build/main.o + 0x000000000800183c Address_Pins_Init .text.Command_Pins_Init - 0x000000000800178c 0x30 build/main.o - 0x000000000800178c Command_Pins_Init + 0x0000000008001888 0x30 build/main.o + 0x0000000008001888 Command_Pins_Init .text.debug_print - 0x00000000080017bc 0x1c build/main.o - 0x00000000080017bc debug_print + 0x00000000080018b8 0x1c build/main.o + 0x00000000080018b8 debug_print + .text.Flash_From_UART + 0x00000000080018d4 0x44 build/main.o + 0x00000000080018d4 Flash_From_UART .text.Error_Handler - 0x00000000080017d8 0x4 build/main.o - 0x00000000080017d8 Error_Handler + 0x0000000008001918 0x4 build/main.o + 0x0000000008001918 Error_Handler .text.MX_USART2_UART_Init - 0x00000000080017dc 0x34 build/main.o + 0x000000000800191c 0x34 build/main.o .text.SystemClock_Config - 0x0000000008001810 0xa4 build/main.o - 0x0000000008001810 SystemClock_Config - .text.main 0x00000000080018b4 0x78 build/main.o - 0x00000000080018b4 main + 0x0000000008001950 0xa4 build/main.o + 0x0000000008001950 SystemClock_Config + .text.main 0x00000000080019f4 0x110 build/main.o + 0x00000000080019f4 main .text.NMI_Handler - 0x000000000800192c 0x2 build/stm32f4xx_it.o - 0x000000000800192c NMI_Handler + 0x0000000008001b04 0x2 build/stm32f4xx_it.o + 0x0000000008001b04 NMI_Handler .text.HardFault_Handler - 0x000000000800192e 0x2 build/stm32f4xx_it.o - 0x000000000800192e HardFault_Handler + 0x0000000008001b06 0x2 build/stm32f4xx_it.o + 0x0000000008001b06 HardFault_Handler .text.MemManage_Handler - 0x0000000008001930 0x2 build/stm32f4xx_it.o - 0x0000000008001930 MemManage_Handler + 0x0000000008001b08 0x2 build/stm32f4xx_it.o + 0x0000000008001b08 MemManage_Handler .text.BusFault_Handler - 0x0000000008001932 0x2 build/stm32f4xx_it.o - 0x0000000008001932 BusFault_Handler + 0x0000000008001b0a 0x2 build/stm32f4xx_it.o + 0x0000000008001b0a BusFault_Handler .text.UsageFault_Handler - 0x0000000008001934 0x2 build/stm32f4xx_it.o - 0x0000000008001934 UsageFault_Handler + 0x0000000008001b0c 0x2 build/stm32f4xx_it.o + 0x0000000008001b0c UsageFault_Handler .text.SVC_Handler - 0x0000000008001936 0x2 build/stm32f4xx_it.o - 0x0000000008001936 SVC_Handler + 0x0000000008001b0e 0x2 build/stm32f4xx_it.o + 0x0000000008001b0e SVC_Handler .text.DebugMon_Handler - 0x0000000008001938 0x2 build/stm32f4xx_it.o - 0x0000000008001938 DebugMon_Handler + 0x0000000008001b10 0x2 build/stm32f4xx_it.o + 0x0000000008001b10 DebugMon_Handler .text.PendSV_Handler - 0x000000000800193a 0x2 build/stm32f4xx_it.o - 0x000000000800193a PendSV_Handler + 0x0000000008001b12 0x2 build/stm32f4xx_it.o + 0x0000000008001b12 PendSV_Handler .text.SysTick_Handler - 0x000000000800193c 0x8 build/stm32f4xx_it.o - 0x000000000800193c SysTick_Handler + 0x0000000008001b14 0x8 build/stm32f4xx_it.o + 0x0000000008001b14 SysTick_Handler .text.HAL_MspInit - 0x0000000008001944 0x38 build/stm32f4xx_hal_msp.o - 0x0000000008001944 HAL_MspInit + 0x0000000008001b1c 0x38 build/stm32f4xx_hal_msp.o + 0x0000000008001b1c HAL_MspInit .text.HAL_UART_MspInit - 0x000000000800197c 0x6c build/stm32f4xx_hal_msp.o - 0x000000000800197c HAL_UART_MspInit + 0x0000000008001b54 0x6c build/stm32f4xx_hal_msp.o + 0x0000000008001b54 HAL_UART_MspInit .text.UART_EndRxTransfer - 0x00000000080019e8 0x5c build/stm32f4xx_hal_uart.o + 0x0000000008001bc0 0x5c build/stm32f4xx_hal_uart.o .text.UART_SetConfig - 0x0000000008001a44 0x110 build/stm32f4xx_hal_uart.o + 0x0000000008001c1c 0x110 build/stm32f4xx_hal_uart.o .text.UART_WaitOnFlagUntilTimeout - 0x0000000008001b54 0x8a build/stm32f4xx_hal_uart.o + 0x0000000008001d2c 0x8a build/stm32f4xx_hal_uart.o .text.HAL_UART_Init - 0x0000000008001bde 0x60 build/stm32f4xx_hal_uart.o - 0x0000000008001bde HAL_UART_Init + 0x0000000008001db6 0x60 build/stm32f4xx_hal_uart.o + 0x0000000008001db6 HAL_UART_Init .text.HAL_UART_Transmit - 0x0000000008001c3e 0xcc build/stm32f4xx_hal_uart.o - 0x0000000008001c3e HAL_UART_Transmit - *fill* 0x0000000008001d0a 0x2 + 0x0000000008001e16 0xcc build/stm32f4xx_hal_uart.o + 0x0000000008001e16 HAL_UART_Transmit + .text.HAL_UART_Receive + 0x0000000008001ee2 0xd2 build/stm32f4xx_hal_uart.o + 0x0000000008001ee2 HAL_UART_Receive .text.HAL_RCC_OscConfig - 0x0000000008001d0c 0x3f8 build/stm32f4xx_hal_rcc.o - 0x0000000008001d0c HAL_RCC_OscConfig + 0x0000000008001fb4 0x3f8 build/stm32f4xx_hal_rcc.o + 0x0000000008001fb4 HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x0000000008002104 0xd4 build/stm32f4xx_hal_rcc.o - 0x0000000008002104 HAL_RCC_GetSysClockFreq + 0x00000000080023ac 0xd4 build/stm32f4xx_hal_rcc.o + 0x00000000080023ac HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x00000000080021d8 0x160 build/stm32f4xx_hal_rcc.o - 0x00000000080021d8 HAL_RCC_ClockConfig + 0x0000000008002480 0x160 build/stm32f4xx_hal_rcc.o + 0x0000000008002480 HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x0000000008002338 0xc build/stm32f4xx_hal_rcc.o - 0x0000000008002338 HAL_RCC_GetHCLKFreq + 0x00000000080025e0 0xc build/stm32f4xx_hal_rcc.o + 0x00000000080025e0 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x0000000008002344 0x20 build/stm32f4xx_hal_rcc.o - 0x0000000008002344 HAL_RCC_GetPCLK1Freq + 0x00000000080025ec 0x20 build/stm32f4xx_hal_rcc.o + 0x00000000080025ec HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x0000000008002364 0x20 build/stm32f4xx_hal_rcc.o - 0x0000000008002364 HAL_RCC_GetPCLK2Freq + 0x000000000800260c 0x20 build/stm32f4xx_hal_rcc.o + 0x000000000800260c HAL_RCC_GetPCLK2Freq .text.HAL_GPIO_Init - 0x0000000008002384 0x1c0 build/stm32f4xx_hal_gpio.o - 0x0000000008002384 HAL_GPIO_Init + 0x000000000800262c 0x1c0 build/stm32f4xx_hal_gpio.o + 0x000000000800262c HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x0000000008002544 0xe build/stm32f4xx_hal_gpio.o - 0x0000000008002544 HAL_GPIO_ReadPin + 0x00000000080027ec 0xe build/stm32f4xx_hal_gpio.o + 0x00000000080027ec HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x0000000008002552 0xc build/stm32f4xx_hal_gpio.o - 0x0000000008002552 HAL_GPIO_WritePin - *fill* 0x000000000800255e 0x2 + 0x00000000080027fa 0xc build/stm32f4xx_hal_gpio.o + 0x00000000080027fa HAL_GPIO_WritePin + *fill* 0x0000000008002806 0x2 .text.HAL_NVIC_SetPriorityGrouping - 0x0000000008002560 0x24 build/stm32f4xx_hal_cortex.o - 0x0000000008002560 HAL_NVIC_SetPriorityGrouping + 0x0000000008002808 0x24 build/stm32f4xx_hal_cortex.o + 0x0000000008002808 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x0000000008002584 0x70 build/stm32f4xx_hal_cortex.o - 0x0000000008002584 HAL_NVIC_SetPriority + 0x000000000800282c 0x70 build/stm32f4xx_hal_cortex.o + 0x000000000800282c HAL_NVIC_SetPriority .text.HAL_SYSTICK_Config - 0x00000000080025f4 0x28 build/stm32f4xx_hal_cortex.o - 0x00000000080025f4 HAL_SYSTICK_Config + 0x000000000800289c 0x28 build/stm32f4xx_hal_cortex.o + 0x000000000800289c HAL_SYSTICK_Config .text.HAL_InitTick - 0x000000000800261c 0x4c build/stm32f4xx_hal.o - 0x000000000800261c HAL_InitTick + 0x00000000080028c4 0x4c build/stm32f4xx_hal.o + 0x00000000080028c4 HAL_InitTick .text.HAL_Init - 0x0000000008002668 0x34 build/stm32f4xx_hal.o - 0x0000000008002668 HAL_Init + 0x0000000008002910 0x34 build/stm32f4xx_hal.o + 0x0000000008002910 HAL_Init .text.HAL_IncTick - 0x000000000800269c 0x18 build/stm32f4xx_hal.o - 0x000000000800269c HAL_IncTick + 0x0000000008002944 0x18 build/stm32f4xx_hal.o + 0x0000000008002944 HAL_IncTick .text.HAL_GetTick - 0x00000000080026b4 0xc build/stm32f4xx_hal.o - 0x00000000080026b4 HAL_GetTick + 0x000000000800295c 0xc build/stm32f4xx_hal.o + 0x000000000800295c HAL_GetTick + .text.HAL_Delay + 0x0000000008002968 0x28 build/stm32f4xx_hal.o + 0x0000000008002968 HAL_Delay .text.SystemInit - 0x00000000080026c0 0x14 build/system_stm32f4xx.o - 0x00000000080026c0 SystemInit - .text._sbrk 0x00000000080026d4 0x48 build/sysmem.o - 0x00000000080026d4 _sbrk + 0x0000000008002990 0x14 build/system_stm32f4xx.o + 0x0000000008002990 SystemInit + .text._sbrk 0x00000000080029a4 0x48 build/sysmem.o + 0x00000000080029a4 _sbrk .text.Reset_Handler - 0x000000000800271c 0x50 build/startup_stm32f401xe.o - 0x000000000800271c Reset_Handler + 0x00000000080029ec 0x50 build/startup_stm32f401xe.o + 0x00000000080029ec Reset_Handler .text.Default_Handler - 0x000000000800276c 0x2 build/startup_stm32f401xe.o - 0x000000000800276c RTC_Alarm_IRQHandler - 0x000000000800276c EXTI2_IRQHandler - 0x000000000800276c SPI4_IRQHandler - 0x000000000800276c TIM1_CC_IRQHandler - 0x000000000800276c DMA2_Stream5_IRQHandler - 0x000000000800276c DMA1_Stream5_IRQHandler - 0x000000000800276c PVD_IRQHandler - 0x000000000800276c SDIO_IRQHandler - 0x000000000800276c TAMP_STAMP_IRQHandler - 0x000000000800276c EXTI3_IRQHandler - 0x000000000800276c TIM1_UP_TIM10_IRQHandler - 0x000000000800276c I2C3_ER_IRQHandler - 0x000000000800276c EXTI0_IRQHandler - 0x000000000800276c I2C2_EV_IRQHandler - 0x000000000800276c DMA1_Stream2_IRQHandler - 0x000000000800276c FPU_IRQHandler - 0x000000000800276c DMA2_Stream2_IRQHandler - 0x000000000800276c SPI1_IRQHandler - 0x000000000800276c TIM1_BRK_TIM9_IRQHandler - 0x000000000800276c DMA2_Stream3_IRQHandler - 0x000000000800276c USART6_IRQHandler - 0x000000000800276c DMA2_Stream0_IRQHandler - 0x000000000800276c TIM4_IRQHandler - 0x000000000800276c I2C1_EV_IRQHandler - 0x000000000800276c DMA1_Stream6_IRQHandler - 0x000000000800276c DMA1_Stream1_IRQHandler - 0x000000000800276c TIM3_IRQHandler - 0x000000000800276c RCC_IRQHandler - 0x000000000800276c Default_Handler - 0x000000000800276c EXTI15_10_IRQHandler - 0x000000000800276c ADC_IRQHandler - 0x000000000800276c DMA1_Stream7_IRQHandler - 0x000000000800276c TIM5_IRQHandler - 0x000000000800276c DMA2_Stream7_IRQHandler - 0x000000000800276c I2C3_EV_IRQHandler - 0x000000000800276c EXTI9_5_IRQHandler - 0x000000000800276c RTC_WKUP_IRQHandler - 0x000000000800276c SPI2_IRQHandler - 0x000000000800276c DMA1_Stream0_IRQHandler - 0x000000000800276c EXTI4_IRQHandler - 0x000000000800276c WWDG_IRQHandler - 0x000000000800276c TIM2_IRQHandler - 0x000000000800276c OTG_FS_WKUP_IRQHandler - 0x000000000800276c TIM1_TRG_COM_TIM11_IRQHandler - 0x000000000800276c EXTI1_IRQHandler - 0x000000000800276c USART2_IRQHandler - 0x000000000800276c I2C2_ER_IRQHandler - 0x000000000800276c DMA2_Stream1_IRQHandler - 0x000000000800276c FLASH_IRQHandler - 0x000000000800276c DMA2_Stream4_IRQHandler - 0x000000000800276c USART1_IRQHandler - 0x000000000800276c OTG_FS_IRQHandler - 0x000000000800276c SPI3_IRQHandler - 0x000000000800276c DMA1_Stream4_IRQHandler - 0x000000000800276c I2C1_ER_IRQHandler - 0x000000000800276c DMA2_Stream6_IRQHandler - 0x000000000800276c DMA1_Stream3_IRQHandler + 0x0000000008002a3c 0x2 build/startup_stm32f401xe.o + 0x0000000008002a3c RTC_Alarm_IRQHandler + 0x0000000008002a3c EXTI2_IRQHandler + 0x0000000008002a3c SPI4_IRQHandler + 0x0000000008002a3c TIM1_CC_IRQHandler + 0x0000000008002a3c DMA2_Stream5_IRQHandler + 0x0000000008002a3c DMA1_Stream5_IRQHandler + 0x0000000008002a3c PVD_IRQHandler + 0x0000000008002a3c SDIO_IRQHandler + 0x0000000008002a3c TAMP_STAMP_IRQHandler + 0x0000000008002a3c EXTI3_IRQHandler + 0x0000000008002a3c TIM1_UP_TIM10_IRQHandler + 0x0000000008002a3c I2C3_ER_IRQHandler + 0x0000000008002a3c EXTI0_IRQHandler + 0x0000000008002a3c I2C2_EV_IRQHandler + 0x0000000008002a3c DMA1_Stream2_IRQHandler + 0x0000000008002a3c FPU_IRQHandler + 0x0000000008002a3c DMA2_Stream2_IRQHandler + 0x0000000008002a3c SPI1_IRQHandler + 0x0000000008002a3c TIM1_BRK_TIM9_IRQHandler + 0x0000000008002a3c DMA2_Stream3_IRQHandler + 0x0000000008002a3c USART6_IRQHandler + 0x0000000008002a3c DMA2_Stream0_IRQHandler + 0x0000000008002a3c TIM4_IRQHandler + 0x0000000008002a3c I2C1_EV_IRQHandler + 0x0000000008002a3c DMA1_Stream6_IRQHandler + 0x0000000008002a3c DMA1_Stream1_IRQHandler + 0x0000000008002a3c TIM3_IRQHandler + 0x0000000008002a3c RCC_IRQHandler + 0x0000000008002a3c Default_Handler + 0x0000000008002a3c EXTI15_10_IRQHandler + 0x0000000008002a3c ADC_IRQHandler + 0x0000000008002a3c DMA1_Stream7_IRQHandler + 0x0000000008002a3c TIM5_IRQHandler + 0x0000000008002a3c DMA2_Stream7_IRQHandler + 0x0000000008002a3c I2C3_EV_IRQHandler + 0x0000000008002a3c EXTI9_5_IRQHandler + 0x0000000008002a3c RTC_WKUP_IRQHandler + 0x0000000008002a3c SPI2_IRQHandler + 0x0000000008002a3c DMA1_Stream0_IRQHandler + 0x0000000008002a3c EXTI4_IRQHandler + 0x0000000008002a3c WWDG_IRQHandler + 0x0000000008002a3c TIM2_IRQHandler + 0x0000000008002a3c OTG_FS_WKUP_IRQHandler + 0x0000000008002a3c TIM1_TRG_COM_TIM11_IRQHandler + 0x0000000008002a3c EXTI1_IRQHandler + 0x0000000008002a3c USART2_IRQHandler + 0x0000000008002a3c I2C2_ER_IRQHandler + 0x0000000008002a3c DMA2_Stream1_IRQHandler + 0x0000000008002a3c FLASH_IRQHandler + 0x0000000008002a3c DMA2_Stream4_IRQHandler + 0x0000000008002a3c USART1_IRQHandler + 0x0000000008002a3c OTG_FS_IRQHandler + 0x0000000008002a3c SPI3_IRQHandler + 0x0000000008002a3c DMA1_Stream4_IRQHandler + 0x0000000008002a3c I2C1_ER_IRQHandler + 0x0000000008002a3c DMA2_Stream6_IRQHandler + 0x0000000008002a3c DMA1_Stream3_IRQHandler *(.glue_7) - .glue_7 0x000000000800276e 0x0 linker stubs + .glue_7 0x0000000008002a3e 0x0 linker stubs *(.glue_7t) - .glue_7t 0x000000000800276e 0x0 linker stubs + .glue_7t 0x0000000008002a3e 0x0 linker stubs *(.eh_frame) - *fill* 0x000000000800276e 0x2 - .eh_frame 0x0000000008002770 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o + *fill* 0x0000000008002a3e 0x2 + .eh_frame 0x0000000008002a40 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o *(.init) - .init 0x0000000008002770 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crti.o - 0x0000000008002770 _init - .init 0x0000000008002774 0x8 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o + .init 0x0000000008002a40 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crti.o + 0x0000000008002a40 _init + .init 0x0000000008002a44 0x8 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o *(.fini) - .fini 0x000000000800277c 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crti.o - 0x000000000800277c _fini - .fini 0x0000000008002780 0x8 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o - 0x0000000008002788 . = ALIGN (0x4) - 0x0000000008002788 _etext = . + .fini 0x0000000008002a4c 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crti.o + 0x0000000008002a4c _fini + .fini 0x0000000008002a50 0x8 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o + 0x0000000008002a58 . = ALIGN (0x4) + 0x0000000008002a58 _etext = . -.vfp11_veneer 0x0000000008002788 0x0 - .vfp11_veneer 0x0000000008002788 0x0 linker stubs +.vfp11_veneer 0x0000000008002a58 0x0 + .vfp11_veneer 0x0000000008002a58 0x0 linker stubs -.v4_bx 0x0000000008002788 0x0 - .v4_bx 0x0000000008002788 0x0 linker stubs +.v4_bx 0x0000000008002a58 0x0 + .v4_bx 0x0000000008002a58 0x0 linker stubs -.iplt 0x0000000008002788 0x0 - .iplt 0x0000000008002788 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.iplt 0x0000000008002a58 0x0 + .iplt 0x0000000008002a58 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.rodata 0x0000000008002788 0xf4 - 0x0000000008002788 . = ALIGN (0x4) +.rodata 0x0000000008002a58 0x248 + 0x0000000008002a58 . = ALIGN (0x4) *(.rodata) - .rodata 0x0000000008002788 0x6c build/main.o + .rodata 0x0000000008002a58 0x6c build/main.o *(.rodata*) + .rodata.Dump_Flash_UART.str1.4 + 0x0000000008002ac4 0x6 build/main.o + 0xb (size before relaxing) + *fill* 0x0000000008002aca 0x2 + .rodata.Flash_From_UART.str1.4 + 0x0000000008002acc 0x2b build/main.o + *fill* 0x0000000008002af7 0x1 .rodata.main.str1.4 - 0x00000000080027f4 0x33 build/main.o - *fill* 0x0000000008002827 0x1 + 0x0000000008002af8 0x151 build/main.o + *fill* 0x0000000008002c49 0x3 .rodata.AHBPrescTable - 0x0000000008002828 0x10 build/system_stm32f4xx.o - 0x0000000008002828 AHBPrescTable + 0x0000000008002c4c 0x10 build/system_stm32f4xx.o + 0x0000000008002c4c AHBPrescTable .rodata.APBPrescTable - 0x0000000008002838 0x8 build/system_stm32f4xx.o - 0x0000000008002838 APBPrescTable + 0x0000000008002c5c 0x8 build/system_stm32f4xx.o + 0x0000000008002c5c APBPrescTable .rodata.str1.4 - 0x0000000008002840 0x13 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-nano-svfprintf.o) - *fill* 0x0000000008002853 0x1 + 0x0000000008002c64 0x13 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-nano-svfprintf.o) + *fill* 0x0000000008002c77 0x1 .rodata.str1.4 - 0x0000000008002854 0x25 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o) - 0x000000000800287c . = ALIGN (0x4) - *fill* 0x0000000008002879 0x3 + 0x0000000008002c78 0x25 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-nano-vfprintf_i.o) + 0x0000000008002ca0 . = ALIGN (0x4) + *fill* 0x0000000008002c9d 0x3 -.ARM.extab 0x000000000800287c 0x0 - 0x000000000800287c . = ALIGN (0x4) +.ARM.extab 0x0000000008002ca0 0x0 + 0x0000000008002ca0 . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x000000000800287c . = ALIGN (0x4) + 0x0000000008002ca0 . = ALIGN (0x4) -.ARM 0x000000000800287c 0x8 - 0x000000000800287c . = ALIGN (0x4) - 0x000000000800287c __exidx_start = . +.ARM 0x0000000008002ca0 0x8 + 0x0000000008002ca0 . = ALIGN (0x4) + 0x0000000008002ca0 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x000000000800287c 0x8 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) - 0x0000000008002884 __exidx_end = . - 0x0000000008002884 . = ALIGN (0x4) + .ARM.exidx 0x0000000008002ca0 0x8 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) + 0x0000000008002ca8 __exidx_end = . + 0x0000000008002ca8 . = ALIGN (0x4) -.preinit_array 0x0000000008002884 0x0 - 0x0000000008002884 . = ALIGN (0x4) - 0x0000000008002884 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0000000008002ca8 0x0 + 0x0000000008002ca8 . = ALIGN (0x4) + 0x0000000008002ca8 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0000000008002884 PROVIDE (__preinit_array_end = .) - 0x0000000008002884 . = ALIGN (0x4) + 0x0000000008002ca8 PROVIDE (__preinit_array_end = .) + 0x0000000008002ca8 . = ALIGN (0x4) -.init_array 0x0000000008002884 0x4 - 0x0000000008002884 . = ALIGN (0x4) - 0x0000000008002884 PROVIDE (__init_array_start = .) +.init_array 0x0000000008002ca8 0x4 + 0x0000000008002ca8 . = ALIGN (0x4) + 0x0000000008002ca8 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0000000008002884 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x0000000008002888 PROVIDE (__init_array_end = .) - 0x0000000008002888 . = ALIGN (0x4) + .init_array 0x0000000008002ca8 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x0000000008002cac PROVIDE (__init_array_end = .) + 0x0000000008002cac . = ALIGN (0x4) -.fini_array 0x0000000008002888 0x4 - 0x0000000008002888 . = ALIGN (0x4) - 0x0000000008002888 PROVIDE (__fini_array_start = .) +.fini_array 0x0000000008002cac 0x4 + 0x0000000008002cac . = ALIGN (0x4) + 0x0000000008002cac PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0000000008002888 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o - 0x000000000800288c PROVIDE (__fini_array_end = .) - 0x000000000800288c . = ALIGN (0x4) - 0x000000000800288c _sidata = LOADADDR (.data) + .fini_array 0x0000000008002cac 0x4 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o + 0x0000000008002cb0 PROVIDE (__fini_array_end = .) + 0x0000000008002cb0 . = ALIGN (0x4) + 0x0000000008002cb0 _sidata = LOADADDR (.data) -.rel.dyn 0x000000000800288c 0x0 - .rel.iplt 0x000000000800288c 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o +.rel.dyn 0x0000000008002cb0 0x0 + .rel.iplt 0x0000000008002cb0 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o -.data 0x0000000020000000 0x70 load address 0x000000000800288c +.data 0x0000000020000000 0x70 load address 0x0000000008002cb0 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -1264,17 +1284,17 @@ LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o 0x0000000020000070 _edata = . .tm_clone_table - 0x0000000020000070 0x0 load address 0x00000000080028fc + 0x0000000020000070 0x0 load address 0x0000000008002d20 .tm_clone_table 0x0000000020000070 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o .tm_clone_table 0x0000000020000070 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtend.o -.igot.plt 0x0000000020000070 0x0 load address 0x00000000080028fc +.igot.plt 0x0000000020000070 0x0 load address 0x0000000008002d20 .igot.plt 0x0000000020000070 0x0 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtbegin.o 0x0000000020000070 . = ALIGN (0x4) -.bss 0x0000000020000070 0x78 load address 0x00000000080028fc +.bss 0x0000000020000070 0x78 load address 0x0000000008002d20 0x0000000020000070 _sbss = . 0x0000000020000070 __bss_start__ = _sbss *(.bss) @@ -1297,7 +1317,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtn.o 0x00000000200000e8 __bss_end__ = _ebss ._user_heap_stack - 0x00000000200000e8 0x600 load address 0x00000000080028fc + 0x00000000200000e8 0x600 load address 0x0000000008002d20 0x00000000200000e8 . = ALIGN (0x8) [!provide] PROVIDE (end = .) 0x00000000200000e8 PROVIDE (_end = .) @@ -1426,318 +1446,318 @@ LOAD /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a .comment 0x0000000000000033 0x34 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) .comment 0x0000000000000033 0x34 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/crtend.o -.debug_info 0x0000000000000000 0x127ad - .debug_info 0x0000000000000000 0x1674 build/main.o - .debug_info 0x0000000000001674 0x15a build/stm32f4xx_it.o - .debug_info 0x00000000000017ce 0xa9a build/stm32f4xx_hal_msp.o - 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/usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-reent.o) + .debug_frame 0x00000000000012ac 0x40 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-memmove.o) + .debug_frame 0x00000000000012ec 0x38 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-nano-reallocr.o) + .debug_frame 0x0000000000001324 0x20 /usr/lib/gcc/arm-none-eabi/10.3.1/../../../arm-none-eabi/lib/thumb/v7e-m+fp/hard/libc_nano.a(lib_a-nano-msizer.o) + .debug_frame 0x0000000000001344 0x2c /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_frame 0x0000000000001370 0x34 /usr/lib/gcc/arm-none-eabi/10.3.1/thumb/v7e-m+fp/hard/libgcc.a(_udivmoddi4.o) Cross Reference Table @@ -1749,6 +1769,8 @@ APBPrescTable build/system_stm32f4xx.o build/stm32f4xx_hal_rcc.o Address_Pins_Init build/main.o BusFault_Handler build/stm32f4xx_it.o +Chip_Erase build/main.o +Chip_Program_Byte build/main.o Command_Pins_Init build/main.o DMA1_Stream0_IRQHandler build/startup_stm32f401xe.o DMA1_Stream1_IRQHandler build/startup_stm32f401xe.o @@ -1769,6 +1791,7 @@ DMA2_Stream7_IRQHandler build/startup_stm32f401xe.o Data_Pins_Init build/main.o DebugMon_Handler build/stm32f4xx_it.o Default_Handler build/startup_stm32f401xe.o +Dump_Flash_UART build/main.o EXTI0_IRQHandler build/startup_stm32f401xe.o EXTI15_10_IRQHandler build/startup_stm32f401xe.o EXTI1_IRQHandler build/startup_stm32f401xe.o @@ -1786,6 +1809,7 @@ FLASH_IRQHandler build/startup_stm32f401xe.o FLASH_WaitForLastOperation build/stm32f4xx_hal_flash.o build/stm32f4xx_hal_flash_ex.o FPU_IRQHandler build/startup_stm32f401xe.o +Flash_From_UART build/main.o Flash_ReadByte build/main.o HAL_CORTEX_ClearEvent build/stm32f4xx_hal_cortex.o HAL_DBGMCU_DisableDBGSleepMode build/stm32f4xx_hal.o @@ -1815,6 +1839,7 @@ HAL_DMA_Start_IT build/stm32f4xx_hal_dma.o HAL_DMA_UnRegisterCallback build/stm32f4xx_hal_dma.o HAL_DeInit build/stm32f4xx_hal.o HAL_Delay build/stm32f4xx_hal.o + build/main.o HAL_DisableCompensationCell build/stm32f4xx_hal.o HAL_EXTI_ClearConfigLine build/stm32f4xx_hal_exti.o HAL_EXTI_ClearPending build/stm32f4xx_hal_exti.o @@ -1995,6 +2020,7 @@ HAL_UART_Init build/stm32f4xx_hal_uart.o HAL_UART_MspDeInit build/stm32f4xx_hal_msp.o HAL_UART_MspInit build/stm32f4xx_hal_msp.o HAL_UART_Receive build/stm32f4xx_hal_uart.o + build/main.o HAL_UART_Receive_DMA build/stm32f4xx_hal_uart.o HAL_UART_Receive_IT build/stm32f4xx_hal_uart.o HAL_UART_RxCpltCallback build/stm32f4xx_hal_uart.o diff --git a/build/main.lst b/build/main.lst index f1656ab..89fe2f9 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccg6eVgO.s page 1 +ARM GAS /tmp/ccPiCTjg.s page 1 1 .cpu cortex-m4 @@ -25,7 +25,7 @@ ARM GAS /tmp/ccg6eVgO.s page 1 22 .thumb_func 23 .fpu fpv4-sp-d16 25 MX_GPIO_Init: - 26 .LFB151: + 26 .LFB155: 27 .file 1 "Core/Src/main.c" 1:Core/Src/main.c **** /** 2:Core/Src/main.c **** ****************************************************************************** @@ -58,7 +58,7 @@ ARM GAS /tmp/ccg6eVgO.s page 1 29:Core/Src/main.c **** void SystemClock_Config(void); 30:Core/Src/main.c **** static void MX_GPIO_Init(void); 31:Core/Src/main.c **** static void MX_USART2_UART_Init(void); - ARM GAS /tmp/ccg6eVgO.s page 2 + ARM GAS /tmp/ccPiCTjg.s page 2 32:Core/Src/main.c **** @@ -94,254 +94,336 @@ ARM GAS /tmp/ccg6eVgO.s page 1 62:Core/Src/main.c **** sprintf(manufacturer, "0x%02X \r\n", man_id); 63:Core/Src/main.c **** sprintf(device, "0x%02X \r\n", dev_id); 64:Core/Src/main.c **** - 65:Core/Src/main.c **** debug_print("Manufacturer ID = \r\n"); - 66:Core/Src/main.c **** debug_print(manufacturer); - 67:Core/Src/main.c **** debug_print("Device ID = \r\n"); - 68:Core/Src/main.c **** debug_print(device); - 69:Core/Src/main.c **** - 70:Core/Src/main.c **** - 71:Core/Src/main.c **** /* Infinite loop */ - 72:Core/Src/main.c **** while (1) - 73:Core/Src/main.c **** { - 74:Core/Src/main.c **** //debug_print("Hello from STM32!\r\n"); - 75:Core/Src/main.c **** } - 76:Core/Src/main.c **** - 77:Core/Src/main.c **** } - 78:Core/Src/main.c **** - 79:Core/Src/main.c **** void Write_Address(int address){ - 80:Core/Src/main.c **** int pin_array[] = { - 81:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, - 82:Core/Src/main.c **** GPIO_PIN_4, GPIO_PIN_5, GPIO_PIN_6, GPIO_PIN_7, - 83:Core/Src/main.c **** GPIO_PIN_8, GPIO_PIN_9, GPIO_PIN_10, GPIO_PIN_11, - 84:Core/Src/main.c **** GPIO_PIN_12, GPIO_PIN_13, - 85:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, GPIO_PIN_4 // These last 3 are our PB pins not - 86:Core/Src/main.c **** }; - 87:Core/Src/main.c **** for(int i=0; i<19; i++){ - 88:Core/Src/main.c **** if(i<14){ - ARM GAS /tmp/ccg6eVgO.s page 3 - - - 89:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_SET); - 90:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); - 91:Core/Src/main.c **** } - 92:Core/Src/main.c **** else{ - 93:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_SET); - 94:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); - 95:Core/Src/main.c **** } - 96:Core/Src/main.c **** } - 97:Core/Src/main.c **** } - 98:Core/Src/main.c **** - 99:Core/Src/main.c **** int Receive_Data(void){ - 100:Core/Src/main.c **** Data_Pins_Init(0); // We make sure it's in input mode - 101:Core/Src/main.c **** int result = 0; - 102:Core/Src/main.c **** int pin_array[] = { - 103:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, - 104:Core/Src/main.c **** GPIO_PIN_4, GPIO_PIN_5, GPIO_PIN_6, GPIO_PIN_7, - 105:Core/Src/main.c **** }; - 106:Core/Src/main.c **** for(int i=0; i<8; i++){ - 107:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 108:Core/Src/main.c **** result += 1 << i; - 109:Core/Src/main.c **** } - 110:Core/Src/main.c **** } - 111:Core/Src/main.c **** return result; - 112:Core/Src/main.c **** } - 113:Core/Src/main.c **** - 114:Core/Src/main.c **** void Write_Data(int value){ - 115:Core/Src/main.c **** Data_Pins_Init(1); // We make sure it's in output mode - 116:Core/Src/main.c **** int pin_array[] = { - 117:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, - 118:Core/Src/main.c **** GPIO_PIN_4, GPIO_PIN_5, GPIO_PIN_6, GPIO_PIN_7, - 119:Core/Src/main.c **** }; - 120:Core/Src/main.c **** for(int i=0; i<8; i++){ - 121:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 122:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); - 123:Core/Src/main.c **** } - 124:Core/Src/main.c **** } - 125:Core/Src/main.c **** - 126:Core/Src/main.c **** // All arguments must be 0 (low) or 1 (high) - 127:Core/Src/main.c **** void Write_Command_Pins(int CE, int OE, int WE){ - 128:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, (CE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 129:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 130:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10,(WE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 131:Core/Src/main.c **** } - 132:Core/Src/main.c **** - 133:Core/Src/main.c **** void Write_Command(int addr, int data) { - 134:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); - 135:Core/Src/main.c **** Write_Address(addr); - 136:Core/Src/main.c **** Write_Data(data); - 137:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); - 138:Core/Src/main.c **** // 4. Pulse WE# low to latch data - 139:Core/Src/main.c **** Write_Command_Pins(0, 1, 0); // WE low - 140:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); // WE high - 141:Core/Src/main.c **** - 142:Core/Src/main.c **** // 5. Deassert CE# - 143:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); - 144:Core/Src/main.c **** } - 145:Core/Src/main.c **** - ARM GAS /tmp/ccg6eVgO.s page 4 - - - 146:Core/Src/main.c **** int Flash_ReadByte(int addr) { - 147:Core/Src/main.c **** Write_Address(addr); - 148:Core/Src/main.c **** Data_Pins_Init(0); - 149:Core/Src/main.c **** Write_Command_Pins(0, 0, 1); - 150:Core/Src/main.c **** int data = Receive_Data(); - 151:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); - 152:Core/Src/main.c **** return data; - 153:Core/Src/main.c **** } - 154:Core/Src/main.c **** - 155:Core/Src/main.c **** void Enter_Device_ID(int *manufacturer, int *device){ - 156:Core/Src/main.c **** // Enter ID mode - 157:Core/Src/main.c **** Write_Command(0x5555, 0xAA); - 158:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); - 159:Core/Src/main.c **** Write_Command(0x5555, 0x90); - 160:Core/Src/main.c **** - 161:Core/Src/main.c **** // Read Manufacturer ID (it should be 0xBF) - 162:Core/Src/main.c **** *manufacturer = Flash_ReadByte(0x0000); - 163:Core/Src/main.c **** - 164:Core/Src/main.c **** // Read Device ID (it should be 0xB7 for the SST39SF040) - 165:Core/Src/main.c **** *device = Flash_ReadByte(0x0001); + 65:Core/Src/main.c **** debug_print("==========================================\r\n"); + 66:Core/Src/main.c **** debug_print("Manufacturer ID = \r\n"); + 67:Core/Src/main.c **** debug_print(manufacturer); + 68:Core/Src/main.c **** debug_print("Device ID = \r\n"); + 69:Core/Src/main.c **** debug_print(device); + 70:Core/Src/main.c **** debug_print("==========================================\r\n"); + 71:Core/Src/main.c **** + 72:Core/Src/main.c **** /* Infinite loop */ + 73:Core/Src/main.c **** while (1) + 74:Core/Src/main.c **** { + 75:Core/Src/main.c **** debug_print("Hello welcome to the EEPROM programmer! What would you like to do?\r\n"); + 76:Core/Src/main.c **** debug_print("[1] Dump Rom as char\r\n"); + 77:Core/Src/main.c **** debug_print("[2] Erase chip\r\n"); + 78:Core/Src/main.c **** debug_print("[3] Program chip via UART\r\n"); + 79:Core/Src/main.c **** uint8_t resp; + 80:Core/Src/main.c **** HAL_UART_Receive(&huart2, &resp, 1, HAL_MAX_DELAY); + 81:Core/Src/main.c **** + 82:Core/Src/main.c **** switch (resp) + 83:Core/Src/main.c **** { + 84:Core/Src/main.c **** case 0x31: + 85:Core/Src/main.c **** debug_print("Dumping ROM...\r\n"); + 86:Core/Src/main.c **** Dump_Flash_UART(1); + 87:Core/Src/main.c **** break; + 88:Core/Src/main.c **** case 0x32: + ARM GAS /tmp/ccPiCTjg.s page 3 + + + 89:Core/Src/main.c **** debug_print("Erasing Chip...\r\n"); + 90:Core/Src/main.c **** Chip_Erase(); + 91:Core/Src/main.c **** break; + 92:Core/Src/main.c **** case 0x33: + 93:Core/Src/main.c **** debug_print("Launching programming sequence...\r\n"); + 94:Core/Src/main.c **** Flash_From_UART(); + 95:Core/Src/main.c **** break; + 96:Core/Src/main.c **** default: + 97:Core/Src/main.c **** debug_print("Invalid input!\r\n"); + 98:Core/Src/main.c **** break; + 99:Core/Src/main.c **** } + 100:Core/Src/main.c **** } + 101:Core/Src/main.c **** + 102:Core/Src/main.c **** } + 103:Core/Src/main.c **** + 104:Core/Src/main.c **** void Write_Address(int address){ + 105:Core/Src/main.c **** int pin_array[] = { + 106:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, + 107:Core/Src/main.c **** GPIO_PIN_4, GPIO_PIN_5, GPIO_PIN_6, GPIO_PIN_7, + 108:Core/Src/main.c **** GPIO_PIN_8, GPIO_PIN_9, GPIO_PIN_10, GPIO_PIN_11, + 109:Core/Src/main.c **** GPIO_PIN_12, GPIO_PIN_13, + 110:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, GPIO_PIN_4 // These last 3 are our PB pins not + 111:Core/Src/main.c **** }; + 112:Core/Src/main.c **** for(int i=0; i<19; i++){ + 113:Core/Src/main.c **** if(i<14){ + 114:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_SET); + 115:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); + 116:Core/Src/main.c **** } + 117:Core/Src/main.c **** else{ + 118:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_SET); + 119:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); + 120:Core/Src/main.c **** } + 121:Core/Src/main.c **** } + 122:Core/Src/main.c **** } + 123:Core/Src/main.c **** + 124:Core/Src/main.c **** int Receive_Data(void){ + 125:Core/Src/main.c **** Data_Pins_Init(0); // We make sure it's in input mode + 126:Core/Src/main.c **** int result = 0; + 127:Core/Src/main.c **** int pin_array[] = { + 128:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, + 129:Core/Src/main.c **** GPIO_PIN_4, GPIO_PIN_5, GPIO_PIN_6, GPIO_PIN_7, + 130:Core/Src/main.c **** }; + 131:Core/Src/main.c **** for(int i=0; i<8; i++){ + 132:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 133:Core/Src/main.c **** result += 1 << i; + 134:Core/Src/main.c **** } + 135:Core/Src/main.c **** } + 136:Core/Src/main.c **** return result; + 137:Core/Src/main.c **** } + 138:Core/Src/main.c **** + 139:Core/Src/main.c **** void Write_Data(int value){ + 140:Core/Src/main.c **** Data_Pins_Init(1); // We make sure it's in output mode + 141:Core/Src/main.c **** int pin_array[] = { + 142:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, + 143:Core/Src/main.c **** GPIO_PIN_4, GPIO_PIN_5, GPIO_PIN_6, GPIO_PIN_7, + 144:Core/Src/main.c **** }; + 145:Core/Src/main.c **** for(int i=0; i<8; i++){ + ARM GAS /tmp/ccPiCTjg.s page 4 + + + 146:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 147:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); + 148:Core/Src/main.c **** } + 149:Core/Src/main.c **** } + 150:Core/Src/main.c **** + 151:Core/Src/main.c **** // All arguments must be 0 (low) or 1 (high) + 152:Core/Src/main.c **** void Write_Command_Pins(int CE, int OE, int WE){ + 153:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, (CE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 154:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 155:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10,(WE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 156:Core/Src/main.c **** } + 157:Core/Src/main.c **** + 158:Core/Src/main.c **** void Write_Command(int addr, int data) { + 159:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); + 160:Core/Src/main.c **** Write_Address(addr); + 161:Core/Src/main.c **** Write_Data(data); + 162:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); + 163:Core/Src/main.c **** // 4. Pulse WE# low to latch data + 164:Core/Src/main.c **** Write_Command_Pins(0, 1, 0); // WE low + 165:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); // WE high 166:Core/Src/main.c **** - 167:Core/Src/main.c **** // Exit ID mode - 168:Core/Src/main.c **** Write_Command(0x5555, 0xF0); + 167:Core/Src/main.c **** // 5. Deassert CE# + 168:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); 169:Core/Src/main.c **** } 170:Core/Src/main.c **** - 171:Core/Src/main.c **** /** - 172:Core/Src/main.c **** * @brief System Clock Configuration - 173:Core/Src/main.c **** * @retval None - 174:Core/Src/main.c **** */ - 175:Core/Src/main.c **** void SystemClock_Config(void) - 176:Core/Src/main.c **** { - 177:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 178:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 171:Core/Src/main.c **** int Flash_ReadByte(int addr) { + 172:Core/Src/main.c **** Write_Address(addr); + 173:Core/Src/main.c **** Data_Pins_Init(0); + 174:Core/Src/main.c **** Write_Command_Pins(0, 0, 1); + 175:Core/Src/main.c **** int data = Receive_Data(); + 176:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); + 177:Core/Src/main.c **** return data; + 178:Core/Src/main.c **** } 179:Core/Src/main.c **** - 180:Core/Src/main.c **** /** Configure the main internal regulator output voltage - 181:Core/Src/main.c **** */ - 182:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); - 183:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - 184:Core/Src/main.c **** - 185:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters - 186:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. - 187:Core/Src/main.c **** */ - 188:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; - 189:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 190:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 191:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 192:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 193:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 16; - 194:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 195:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; - 196:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 197:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 198:Core/Src/main.c **** { - 199:Core/Src/main.c **** Error_Handler(); - 200:Core/Src/main.c **** } - 201:Core/Src/main.c **** - 202:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks - ARM GAS /tmp/ccg6eVgO.s page 5 - - - 203:Core/Src/main.c **** */ - 204:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 205:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 206:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 207:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 208:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 209:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 210:Core/Src/main.c **** - 211:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) - 212:Core/Src/main.c **** { - 213:Core/Src/main.c **** Error_Handler(); - 214:Core/Src/main.c **** } - 215:Core/Src/main.c **** } - 216:Core/Src/main.c **** - 217:Core/Src/main.c **** /** - 218:Core/Src/main.c **** * @brief USART2 Initialization Function - 219:Core/Src/main.c **** * @param None - 220:Core/Src/main.c **** * @retval None - 221:Core/Src/main.c **** */ - 222:Core/Src/main.c **** static void MX_USART2_UART_Init(void) - 223:Core/Src/main.c **** { - 224:Core/Src/main.c **** huart2.Instance = USART2; - 225:Core/Src/main.c **** huart2.Init.BaudRate = 115200; - 226:Core/Src/main.c **** huart2.Init.WordLength = UART_WORDLENGTH_8B; - 227:Core/Src/main.c **** huart2.Init.StopBits = UART_STOPBITS_1; - 228:Core/Src/main.c **** huart2.Init.Parity = UART_PARITY_NONE; - 229:Core/Src/main.c **** huart2.Init.Mode = UART_MODE_TX_RX; - 230:Core/Src/main.c **** huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 231:Core/Src/main.c **** huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 232:Core/Src/main.c **** if (HAL_UART_Init(&huart2) != HAL_OK) - 233:Core/Src/main.c **** { - 234:Core/Src/main.c **** Error_Handler(); - 235:Core/Src/main.c **** } + 180:Core/Src/main.c **** void Enter_Device_ID(int *manufacturer, int *device){ + 181:Core/Src/main.c **** // Enter ID mode + 182:Core/Src/main.c **** Write_Command(0x5555, 0xAA); + 183:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 184:Core/Src/main.c **** Write_Command(0x5555, 0x90); + 185:Core/Src/main.c **** + 186:Core/Src/main.c **** // Read Manufacturer ID (it should be 0xBF) + 187:Core/Src/main.c **** *manufacturer = Flash_ReadByte(0x0000); + 188:Core/Src/main.c **** + 189:Core/Src/main.c **** // Read Device ID (it should be 0xB7 for the SST39SF040) + 190:Core/Src/main.c **** *device = Flash_ReadByte(0x0001); + 191:Core/Src/main.c **** + 192:Core/Src/main.c **** // Exit ID mode + 193:Core/Src/main.c **** Write_Command(0x5555, 0xF0); + 194:Core/Src/main.c **** } + 195:Core/Src/main.c **** + 196:Core/Src/main.c **** void Dump_Flash_UART(int visual_format){ + 197:Core/Src/main.c **** uint8_t byte; + 198:Core/Src/main.c **** char buf[8]; + 199:Core/Src/main.c **** + 200:Core/Src/main.c **** for (int addr = 0; addr < 0x80000; addr++) { // 512 KB + 201:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 202:Core/Src/main.c **** + ARM GAS /tmp/ccPiCTjg.s page 5 + + + 203:Core/Src/main.c **** if(visual_format==0){ + 204:Core/Src/main.c **** // Send as raw byte: + 205:Core/Src/main.c **** HAL_UART_Transmit(&huart2, &byte, 1, HAL_MAX_DELAY); + 206:Core/Src/main.c **** }else{ + 207:Core/Src/main.c **** // Send as str + 208:Core/Src/main.c **** sprintf(buf, "%02X ", byte); + 209:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)buf, strlen(buf), HAL_MAX_DELAY); + 210:Core/Src/main.c **** if ((addr & 0x0F) == 0x0F) { + 211:Core/Src/main.c **** char newline[] = "\r\n"; + 212:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)newline, 2, HAL_MAX_DELAY); + 213:Core/Src/main.c **** } + 214:Core/Src/main.c **** } + 215:Core/Src/main.c **** } + 216:Core/Src/main.c **** } + 217:Core/Src/main.c **** + 218:Core/Src/main.c **** void Chip_Erase(void){ + 219:Core/Src/main.c **** // Erase sequence + 220:Core/Src/main.c **** Write_Command(0x5555, 0xAA); + 221:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 222:Core/Src/main.c **** Write_Command(0x5555, 0x80); + 223:Core/Src/main.c **** Write_Command(0x5555, 0xAA); + 224:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 225:Core/Src/main.c **** Write_Command(0x5555, 0x10); + 226:Core/Src/main.c **** + 227:Core/Src/main.c **** HAL_Delay(150); // it's 100ms max but by precaution + 228:Core/Src/main.c **** } + 229:Core/Src/main.c **** + 230:Core/Src/main.c **** void Chip_Program_Byte(int addr, int data){ + 231:Core/Src/main.c **** Write_Command(0x5555, 0xAA); + 232:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 233:Core/Src/main.c **** Write_Command(0x5555, 0xA0); + 234:Core/Src/main.c **** Write_Command(addr, data); + 235:Core/Src/main.c **** } 236:Core/Src/main.c **** - 237:Core/Src/main.c **** } - 238:Core/Src/main.c **** - 239:Core/Src/main.c **** // The argument must be 0 (input) or 1 (output) - 240:Core/Src/main.c **** void Data_Pins_Init(int as_output){ - 241:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; - 242:Core/Src/main.c **** - 243:Core/Src/main.c **** // Configure PA0..PA7 as push-pull outputs - 244:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_11 | GPIO_PIN_12 | - 245:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; - 246:Core/Src/main.c **** if(as_output == 1){ - 247:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 248:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 249:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 250:Core/Src/main.c **** }else{ - 251:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; // Input mode - 252:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; // No pull-up/down - 253:Core/Src/main.c **** } - 254:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 255:Core/Src/main.c **** } - 256:Core/Src/main.c **** - 257:Core/Src/main.c **** void Address_Pins_Init(void){ - 258:Core/Src/main.c **** GPIO_InitTypeDef GPIOC_InitStruct = {0}; - 259:Core/Src/main.c **** // Configure PC0..PC15 as push-pull outputs - ARM GAS /tmp/ccg6eVgO.s page 6 - - - 260:Core/Src/main.c **** GPIOC_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | - 261:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | - 262:Core/Src/main.c **** GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10| GPIO_PIN_11| - 263:Core/Src/main.c **** GPIO_PIN_12| GPIO_PIN_13| GPIO_PIN_14| GPIO_PIN_15; - 264:Core/Src/main.c **** GPIOC_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 265:Core/Src/main.c **** GPIOC_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 266:Core/Src/main.c **** GPIOC_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 267:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIOC_InitStruct); - 268:Core/Src/main.c **** - 269:Core/Src/main.c **** // Then we do the same for the remaining - 270:Core/Src/main.c **** GPIO_InitTypeDef GPIOB_InitStruct = {0}; - 271:Core/Src/main.c **** // Configure PB0..PB2 as push-pull outputs - 272:Core/Src/main.c **** GPIOB_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4; - 273:Core/Src/main.c **** GPIOB_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 274:Core/Src/main.c **** GPIOB_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 275:Core/Src/main.c **** GPIOB_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 276:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIOB_InitStruct); - 277:Core/Src/main.c **** } - 278:Core/Src/main.c **** - 279:Core/Src/main.c **** void Command_Pins_Init(void){ - 280:Core/Src/main.c **** // PA8-10 as outputs pins - 281:Core/Src/main.c **** GPIO_InitTypeDef GPIOA_InitStruct = {0}; - 282:Core/Src/main.c **** GPIOA_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10; - 283:Core/Src/main.c **** GPIOA_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 284:Core/Src/main.c **** GPIOA_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 285:Core/Src/main.c **** GPIOA_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 286:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIOA_InitStruct); - 287:Core/Src/main.c **** } - 288:Core/Src/main.c **** - 289:Core/Src/main.c **** void debug_print(const char *msg) { - 290:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY); + 237:Core/Src/main.c **** void Flash_From_UART(void){ + 238:Core/Src/main.c **** debug_print("Waiting for file to flash...\r\n"); + 239:Core/Src/main.c **** uint8_t byte; + 240:Core/Src/main.c **** for(int i=0; i<8; i++){ + 241:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 242:Core/Src/main.c **** Chip_Program_Byte(i, (int)byte); + 243:Core/Src/main.c **** } + 244:Core/Src/main.c **** debug_print("finished\r\n"); + 245:Core/Src/main.c **** } + 246:Core/Src/main.c **** + 247:Core/Src/main.c **** /** + 248:Core/Src/main.c **** * @brief System Clock Configuration + 249:Core/Src/main.c **** * @retval None + 250:Core/Src/main.c **** */ + 251:Core/Src/main.c **** void SystemClock_Config(void) + 252:Core/Src/main.c **** { + 253:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 254:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 255:Core/Src/main.c **** + 256:Core/Src/main.c **** /** Configure the main internal regulator output voltage + 257:Core/Src/main.c **** */ + 258:Core/Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 259:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + ARM GAS /tmp/ccPiCTjg.s page 6 + + + 260:Core/Src/main.c **** + 261:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 262:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. + 263:Core/Src/main.c **** */ + 264:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; + 265:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 266:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 267:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 268:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + 269:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 16; + 270:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 271:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + 272:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 273:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 274:Core/Src/main.c **** { + 275:Core/Src/main.c **** Error_Handler(); + 276:Core/Src/main.c **** } + 277:Core/Src/main.c **** + 278:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 279:Core/Src/main.c **** */ + 280:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 281:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 282:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 283:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 284:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + 285:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 286:Core/Src/main.c **** + 287:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) + 288:Core/Src/main.c **** { + 289:Core/Src/main.c **** Error_Handler(); + 290:Core/Src/main.c **** } 291:Core/Src/main.c **** } 292:Core/Src/main.c **** 293:Core/Src/main.c **** /** - 294:Core/Src/main.c **** * @brief GPIO Initialization Function + 294:Core/Src/main.c **** * @brief USART2 Initialization Function 295:Core/Src/main.c **** * @param None 296:Core/Src/main.c **** * @retval None 297:Core/Src/main.c **** */ - 298:Core/Src/main.c **** static void MX_GPIO_Init(void) + 298:Core/Src/main.c **** static void MX_USART2_UART_Init(void) 299:Core/Src/main.c **** { - 28 .loc 1 299 1 view -0 + 300:Core/Src/main.c **** huart2.Instance = USART2; + 301:Core/Src/main.c **** huart2.Init.BaudRate = 115200; + 302:Core/Src/main.c **** huart2.Init.WordLength = UART_WORDLENGTH_8B; + 303:Core/Src/main.c **** huart2.Init.StopBits = UART_STOPBITS_1; + 304:Core/Src/main.c **** huart2.Init.Parity = UART_PARITY_NONE; + 305:Core/Src/main.c **** huart2.Init.Mode = UART_MODE_TX_RX; + 306:Core/Src/main.c **** huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 307:Core/Src/main.c **** huart2.Init.OverSampling = UART_OVERSAMPLING_16; + 308:Core/Src/main.c **** if (HAL_UART_Init(&huart2) != HAL_OK) + 309:Core/Src/main.c **** { + 310:Core/Src/main.c **** Error_Handler(); + 311:Core/Src/main.c **** } + 312:Core/Src/main.c **** + 313:Core/Src/main.c **** } + 314:Core/Src/main.c **** + 315:Core/Src/main.c **** // The argument must be 0 (input) or 1 (output) + 316:Core/Src/main.c **** void Data_Pins_Init(int as_output){ + ARM GAS /tmp/ccPiCTjg.s page 7 + + + 317:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 318:Core/Src/main.c **** + 319:Core/Src/main.c **** // Configure PA0..PA7 as push-pull outputs + 320:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_11 | GPIO_PIN_12 | + 321:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; + 322:Core/Src/main.c **** if(as_output == 1){ + 323:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 324:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 325:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 326:Core/Src/main.c **** }else{ + 327:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; // Input mode + 328:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; // No pull-up/down + 329:Core/Src/main.c **** } + 330:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 331:Core/Src/main.c **** } + 332:Core/Src/main.c **** + 333:Core/Src/main.c **** void Address_Pins_Init(void){ + 334:Core/Src/main.c **** GPIO_InitTypeDef GPIOC_InitStruct = {0}; + 335:Core/Src/main.c **** // Configure PC0..PC15 as push-pull outputs + 336:Core/Src/main.c **** GPIOC_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | + 337:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | + 338:Core/Src/main.c **** GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10| GPIO_PIN_11| + 339:Core/Src/main.c **** GPIO_PIN_12| GPIO_PIN_13| GPIO_PIN_14| GPIO_PIN_15; + 340:Core/Src/main.c **** GPIOC_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 341:Core/Src/main.c **** GPIOC_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 342:Core/Src/main.c **** GPIOC_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 343:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIOC_InitStruct); + 344:Core/Src/main.c **** + 345:Core/Src/main.c **** // Then we do the same for the remaining + 346:Core/Src/main.c **** GPIO_InitTypeDef GPIOB_InitStruct = {0}; + 347:Core/Src/main.c **** // Configure PB0..PB2 as push-pull outputs + 348:Core/Src/main.c **** GPIOB_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4; + 349:Core/Src/main.c **** GPIOB_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 350:Core/Src/main.c **** GPIOB_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 351:Core/Src/main.c **** GPIOB_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 352:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIOB_InitStruct); + 353:Core/Src/main.c **** } + 354:Core/Src/main.c **** + 355:Core/Src/main.c **** void Command_Pins_Init(void){ + 356:Core/Src/main.c **** // PA8-10 as outputs pins + 357:Core/Src/main.c **** GPIO_InitTypeDef GPIOA_InitStruct = {0}; + 358:Core/Src/main.c **** GPIOA_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10; + 359:Core/Src/main.c **** GPIOA_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 360:Core/Src/main.c **** GPIOA_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 361:Core/Src/main.c **** GPIOA_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 362:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIOA_InitStruct); + 363:Core/Src/main.c **** } + 364:Core/Src/main.c **** + 365:Core/Src/main.c **** void debug_print(const char *msg) { + 366:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY); + 367:Core/Src/main.c **** } + 368:Core/Src/main.c **** + 369:Core/Src/main.c **** /** + 370:Core/Src/main.c **** * @brief GPIO Initialization Function + 371:Core/Src/main.c **** * @param None + 372:Core/Src/main.c **** * @retval None + 373:Core/Src/main.c **** */ + ARM GAS /tmp/ccPiCTjg.s page 8 + + + 374:Core/Src/main.c **** static void MX_GPIO_Init(void) + 375:Core/Src/main.c **** { + 28 .loc 1 375 1 view -0 29 .cfi_startproc 30 @ args = 0, pretend = 0, frame = 16 31 @ frame_needed = 0, uses_anonymous_args = 0 @@ -349,101 +431,98 @@ ARM GAS /tmp/ccg6eVgO.s page 1 33 0000 84B0 sub sp, sp, #16 34 .LCFI0: 35 .cfi_def_cfa_offset 16 - 300:Core/Src/main.c **** /* GPIO Ports Clock Enable */ - 301:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); - 36 .loc 1 301 3 view .LVU1 + 376:Core/Src/main.c **** /* GPIO Ports Clock Enable */ + 377:Core/Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); + 36 .loc 1 377 3 view .LVU1 37 .LBB4: - 38 .loc 1 301 3 view .LVU2 + 38 .loc 1 377 3 view .LVU2 39 0002 0022 movs r2, #0 40 0004 0092 str r2, [sp] - 41 .loc 1 301 3 view .LVU3 + 41 .loc 1 377 3 view .LVU3 42 0006 154B ldr r3, .L3 - ARM GAS /tmp/ccg6eVgO.s page 7 - - 43 0008 196B ldr r1, [r3, #48] 44 000a 41F00401 orr r1, r1, #4 45 000e 1963 str r1, [r3, #48] - 46 .loc 1 301 3 view .LVU4 + 46 .loc 1 377 3 view .LVU4 47 0010 196B ldr r1, [r3, #48] 48 0012 01F00401 and r1, r1, #4 49 0016 0091 str r1, [sp] - 50 .loc 1 301 3 view .LVU5 + 50 .loc 1 377 3 view .LVU5 51 0018 0099 ldr r1, [sp] 52 .LBE4: - 53 .loc 1 301 3 view .LVU6 - 302:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); - 54 .loc 1 302 3 view .LVU7 + 53 .loc 1 377 3 view .LVU6 + 378:Core/Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); + 54 .loc 1 378 3 view .LVU7 55 .LBB5: - 56 .loc 1 302 3 view .LVU8 + 56 .loc 1 378 3 view .LVU8 57 001a 0192 str r2, [sp, #4] - 58 .loc 1 302 3 view .LVU9 + 58 .loc 1 378 3 view .LVU9 59 001c 196B ldr r1, [r3, #48] 60 001e 41F08001 orr r1, r1, #128 61 0022 1963 str r1, [r3, #48] - 62 .loc 1 302 3 view .LVU10 + 62 .loc 1 378 3 view .LVU10 63 0024 196B ldr r1, [r3, #48] 64 0026 01F08001 and r1, r1, #128 65 002a 0191 str r1, [sp, #4] - 66 .loc 1 302 3 view .LVU11 + 66 .loc 1 378 3 view .LVU11 67 002c 0199 ldr r1, [sp, #4] 68 .LBE5: - 69 .loc 1 302 3 view .LVU12 - 303:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); - 70 .loc 1 303 3 view .LVU13 + 69 .loc 1 378 3 view .LVU12 + 379:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 70 .loc 1 379 3 view .LVU13 71 .LBB6: - 72 .loc 1 303 3 view .LVU14 + 72 .loc 1 379 3 view .LVU14 73 002e 0292 str r2, [sp, #8] - 74 .loc 1 303 3 view .LVU15 + 74 .loc 1 379 3 view .LVU15 75 0030 196B ldr r1, [r3, #48] 76 0032 41F00101 orr r1, r1, #1 77 0036 1963 str r1, [r3, #48] - 78 .loc 1 303 3 view .LVU16 + 78 .loc 1 379 3 view .LVU16 + ARM GAS /tmp/ccPiCTjg.s page 9 + + 79 0038 196B ldr r1, [r3, #48] 80 003a 01F00101 and r1, r1, #1 81 003e 0291 str r1, [sp, #8] - 82 .loc 1 303 3 view .LVU17 + 82 .loc 1 379 3 view .LVU17 83 0040 0299 ldr r1, [sp, #8] 84 .LBE6: - 85 .loc 1 303 3 view .LVU18 - 304:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); - 86 .loc 1 304 3 view .LVU19 + 85 .loc 1 379 3 view .LVU18 + 380:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 86 .loc 1 380 3 view .LVU19 87 .LBB7: - 88 .loc 1 304 3 view .LVU20 + 88 .loc 1 380 3 view .LVU20 89 0042 0392 str r2, [sp, #12] - 90 .loc 1 304 3 view .LVU21 + 90 .loc 1 380 3 view .LVU21 91 0044 1A6B ldr r2, [r3, #48] 92 0046 42F00202 orr r2, r2, #2 93 004a 1A63 str r2, [r3, #48] - 94 .loc 1 304 3 view .LVU22 + 94 .loc 1 380 3 view .LVU22 95 004c 1B6B ldr r3, [r3, #48] 96 004e 03F00203 and r3, r3, #2 - ARM GAS /tmp/ccg6eVgO.s page 8 - - 97 0052 0393 str r3, [sp, #12] - 98 .loc 1 304 3 view .LVU23 + 98 .loc 1 380 3 view .LVU23 99 0054 039B ldr r3, [sp, #12] 100 .LBE7: - 101 .loc 1 304 3 view .LVU24 - 305:Core/Src/main.c **** - 306:Core/Src/main.c **** /*Configure GPIO pin Output Level */ - 307:Core/Src/main.c **** // HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); - 308:Core/Src/main.c **** - 309:Core/Src/main.c **** /*Configure GPIO pin : B1_Pin */ - 310:Core/Src/main.c **** // GPIO_InitStruct.Pin = B1_Pin; - 311:Core/Src/main.c **** // GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; - 312:Core/Src/main.c **** // GPIO_InitStruct.Pull = GPIO_NOPULL; - 313:Core/Src/main.c **** // HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); - 314:Core/Src/main.c **** - 315:Core/Src/main.c **** /*Configure GPIO pin : LD2_Pin */ - 316:Core/Src/main.c **** // GPIO_InitStruct.Pin = LD2_Pin; - 317:Core/Src/main.c **** // GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 318:Core/Src/main.c **** // GPIO_InitStruct.Pull = GPIO_NOPULL; - 319:Core/Src/main.c **** // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 320:Core/Src/main.c **** // HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); - 321:Core/Src/main.c **** } - 102 .loc 1 321 1 is_stmt 0 view .LVU25 + 101 .loc 1 380 3 view .LVU24 + 381:Core/Src/main.c **** + 382:Core/Src/main.c **** /*Configure GPIO pin Output Level */ + 383:Core/Src/main.c **** // HAL_GPIO_WritePin(LD2_GPIO_Port, LD2_Pin, GPIO_PIN_RESET); + 384:Core/Src/main.c **** + 385:Core/Src/main.c **** /*Configure GPIO pin : B1_Pin */ + 386:Core/Src/main.c **** // GPIO_InitStruct.Pin = B1_Pin; + 387:Core/Src/main.c **** // GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING; + 388:Core/Src/main.c **** // GPIO_InitStruct.Pull = GPIO_NOPULL; + 389:Core/Src/main.c **** // HAL_GPIO_Init(B1_GPIO_Port, &GPIO_InitStruct); + 390:Core/Src/main.c **** + 391:Core/Src/main.c **** /*Configure GPIO pin : LD2_Pin */ + 392:Core/Src/main.c **** // GPIO_InitStruct.Pin = LD2_Pin; + 393:Core/Src/main.c **** // GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 394:Core/Src/main.c **** // GPIO_InitStruct.Pull = GPIO_NOPULL; + 395:Core/Src/main.c **** // GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 396:Core/Src/main.c **** // HAL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct); + 397:Core/Src/main.c **** } + 102 .loc 1 397 1 is_stmt 0 view .LVU25 103 0056 04B0 add sp, sp, #16 104 .LCFI1: 105 .cfi_def_cfa_offset 0 @@ -454,64 +533,64 @@ ARM GAS /tmp/ccg6eVgO.s page 1 110 .L3: 111 005c 00380240 .word 1073887232 112 .cfi_endproc - 113 .LFE151: + 113 .LFE155: 115 .section .text.Write_Address,"ax",%progbits 116 .align 1 117 .global Write_Address 118 .syntax unified + ARM GAS /tmp/ccPiCTjg.s page 10 + + 119 .thumb 120 .thumb_func 121 .fpu fpv4-sp-d16 123 Write_Address: 124 .LVL0: 125 .LFB138: - 79:Core/Src/main.c **** int pin_array[] = { - 126 .loc 1 79 32 is_stmt 1 view -0 + 104:Core/Src/main.c **** int pin_array[] = { + 126 .loc 1 104 32 is_stmt 1 view -0 127 .cfi_startproc 128 @ args = 0, pretend = 0, frame = 80 129 @ frame_needed = 0, uses_anonymous_args = 0 - 79:Core/Src/main.c **** int pin_array[] = { - 130 .loc 1 79 32 is_stmt 0 view .LVU27 + 104:Core/Src/main.c **** int pin_array[] = { + 130 .loc 1 104 32 is_stmt 0 view .LVU27 131 0000 30B5 push {r4, r5, lr} 132 .LCFI2: 133 .cfi_def_cfa_offset 12 134 .cfi_offset 4, -12 135 .cfi_offset 5, -8 136 .cfi_offset 14, -4 - ARM GAS /tmp/ccg6eVgO.s page 9 - - 137 0002 95B0 sub sp, sp, #84 138 .LCFI3: 139 .cfi_def_cfa_offset 96 140 0004 0546 mov r5, r0 - 80:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, - 141 .loc 1 80 3 is_stmt 1 view .LVU28 - 80:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, - 142 .loc 1 80 7 is_stmt 0 view .LVU29 + 105:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, + 141 .loc 1 105 3 is_stmt 1 view .LVU28 + 105:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, + 142 .loc 1 105 7 is_stmt 0 view .LVU29 143 0006 4C22 movs r2, #76 144 0008 1E49 ldr r1, .L14 145 000a 01A8 add r0, sp, #4 146 .LVL1: - 80:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, - 147 .loc 1 80 7 view .LVU30 + 105:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_2, GPIO_PIN_3, + 147 .loc 1 105 7 view .LVU30 148 000c FFF7FEFF bl memcpy 149 .LVL2: - 87:Core/Src/main.c **** if(i<14){ - 150 .loc 1 87 3 is_stmt 1 view .LVU31 + 112:Core/Src/main.c **** if(i<14){ + 150 .loc 1 112 3 is_stmt 1 view .LVU31 151 .LBB8: - 87:Core/Src/main.c **** if(i<14){ - 152 .loc 1 87 7 view .LVU32 - 87:Core/Src/main.c **** if(i<14){ - 153 .loc 1 87 11 is_stmt 0 view .LVU33 + 112:Core/Src/main.c **** if(i<14){ + 152 .loc 1 112 7 view .LVU32 + 112:Core/Src/main.c **** if(i<14){ + 153 .loc 1 112 11 is_stmt 0 view .LVU33 154 0010 0024 movs r4, #0 - 87:Core/Src/main.c **** if(i<14){ - 155 .loc 1 87 3 view .LVU34 + 112:Core/Src/main.c **** if(i<14){ + 155 .loc 1 112 3 view .LVU34 156 0012 09E0 b .L6 157 .LVL3: 158 .L8: - 90:Core/Src/main.c **** } - 159 .loc 1 90 12 is_stmt 1 view .LVU35 + 115:Core/Src/main.c **** } + 159 .loc 1 115 12 is_stmt 1 view .LVU35 160 0014 0022 movs r2, #0 161 0016 14AB add r3, sp, #80 162 0018 03EB8403 add r3, r3, r4, lsl #2 @@ -519,40 +598,40 @@ ARM GAS /tmp/ccg6eVgO.s page 1 164 0020 1948 ldr r0, .L14+4 165 0022 FFF7FEFF bl HAL_GPIO_WritePin 166 .LVL4: + ARM GAS /tmp/ccPiCTjg.s page 11 + + 167 .L9: - 87:Core/Src/main.c **** if(i<14){ - 168 .loc 1 87 22 discriminator 2 view .LVU36 - 87:Core/Src/main.c **** if(i<14){ - 169 .loc 1 87 23 is_stmt 0 discriminator 2 view .LVU37 + 112:Core/Src/main.c **** if(i<14){ + 168 .loc 1 112 22 discriminator 2 view .LVU36 + 112:Core/Src/main.c **** if(i<14){ + 169 .loc 1 112 23 is_stmt 0 discriminator 2 view .LVU37 170 0026 0134 adds r4, r4, #1 171 .LVL5: 172 .L6: - 87:Core/Src/main.c **** if(i<14){ - 173 .loc 1 87 16 is_stmt 1 discriminator 1 view .LVU38 - 87:Core/Src/main.c **** if(i<14){ - 174 .loc 1 87 3 is_stmt 0 discriminator 1 view .LVU39 + 112:Core/Src/main.c **** if(i<14){ + 173 .loc 1 112 16 is_stmt 1 discriminator 1 view .LVU38 + 112:Core/Src/main.c **** if(i<14){ + 174 .loc 1 112 3 is_stmt 0 discriminator 1 view .LVU39 175 0028 122C cmp r4, #18 176 002a 29DC bgt .L13 - 88:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_SET); - 177 .loc 1 88 5 is_stmt 1 view .LVU40 - 88:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_SET); - 178 .loc 1 88 7 is_stmt 0 view .LVU41 + 113:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_SET); + 177 .loc 1 113 5 is_stmt 1 view .LVU40 + 113:Core/Src/main.c **** if((address >> i) & 1) HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_SET); + 178 .loc 1 113 7 is_stmt 0 view .LVU41 179 002c 0D2C cmp r4, #13 - ARM GAS /tmp/ccg6eVgO.s page 10 - - 180 002e 0EDC bgt .L7 - 89:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); - 181 .loc 1 89 7 is_stmt 1 view .LVU42 - 89:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); - 182 .loc 1 89 19 is_stmt 0 view .LVU43 + 114:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); + 181 .loc 1 114 7 is_stmt 1 view .LVU42 + 114:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); + 182 .loc 1 114 19 is_stmt 0 view .LVU43 183 0030 45FA04F3 asr r3, r5, r4 - 89:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); - 184 .loc 1 89 9 view .LVU44 + 114:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); + 184 .loc 1 114 9 view .LVU44 185 0034 13F0010F tst r3, #1 186 0038 ECD0 beq .L8 - 89:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); - 187 .loc 1 89 30 is_stmt 1 discriminator 1 view .LVU45 + 114:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOC, pin_array[i], GPIO_PIN_RESET); + 187 .loc 1 114 30 is_stmt 1 discriminator 1 view .LVU45 188 003a 0122 movs r2, #1 189 003c 14AB add r3, sp, #80 190 003e 03EB8403 add r3, r3, r4, lsl #2 @@ -562,28 +641,31 @@ ARM GAS /tmp/ccg6eVgO.s page 1 194 .LVL6: 195 004c EBE7 b .L9 196 .L7: - 93:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); - 197 .loc 1 93 7 view .LVU46 - 93:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); - 198 .loc 1 93 19 is_stmt 0 view .LVU47 + 118:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); + 197 .loc 1 118 7 view .LVU46 + 118:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); + 198 .loc 1 118 19 is_stmt 0 view .LVU47 199 004e 45FA04F3 asr r3, r5, r4 - 93:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); - 200 .loc 1 93 9 view .LVU48 + 118:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); + 200 .loc 1 118 9 view .LVU48 201 0052 13F0010F tst r3, #1 202 0056 09D0 beq .L10 - 93:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); - 203 .loc 1 93 30 is_stmt 1 discriminator 1 view .LVU49 + 118:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOB, pin_array[i], GPIO_PIN_RESET); + 203 .loc 1 118 30 is_stmt 1 discriminator 1 view .LVU49 204 0058 0122 movs r2, #1 205 005a 14AB add r3, sp, #80 206 005c 03EB8403 add r3, r3, r4, lsl #2 207 0060 33F84C1C ldrh r1, [r3, #-76] 208 0064 0948 ldr r0, .L14+8 209 0066 FFF7FEFF bl HAL_GPIO_WritePin + ARM GAS /tmp/ccPiCTjg.s page 12 + + 210 .LVL7: 211 006a DCE7 b .L9 212 .L10: - 94:Core/Src/main.c **** } - 213 .loc 1 94 12 view .LVU50 + 119:Core/Src/main.c **** } + 213 .loc 1 119 12 view .LVU50 214 006c 0022 movs r2, #0 215 006e 14AB add r3, sp, #80 216 0070 03EB8403 add r3, r3, r4, lsl #2 @@ -593,14 +675,11 @@ ARM GAS /tmp/ccg6eVgO.s page 1 220 .LVL8: 221 007e D2E7 b .L9 222 .L13: - 94:Core/Src/main.c **** } - 223 .loc 1 94 12 is_stmt 0 view .LVU51 + 119:Core/Src/main.c **** } + 223 .loc 1 119 12 is_stmt 0 view .LVU51 224 .LBE8: - 97:Core/Src/main.c **** - 225 .loc 1 97 1 view .LVU52 - ARM GAS /tmp/ccg6eVgO.s page 11 - - + 122:Core/Src/main.c **** + 225 .loc 1 122 1 view .LVU52 226 0080 15B0 add sp, sp, #84 227 .LCFI4: 228 .cfi_def_cfa_offset 12 @@ -608,8 +687,8 @@ ARM GAS /tmp/ccg6eVgO.s page 1 230 0082 30BD pop {r4, r5, pc} 231 .LVL9: 232 .L15: - 97:Core/Src/main.c **** - 233 .loc 1 97 1 view .LVU53 + 122:Core/Src/main.c **** + 233 .loc 1 122 1 view .LVU53 234 .align 2 235 .L14: 236 0084 00000000 .word .LANCHOR0 @@ -627,46 +706,46 @@ ARM GAS /tmp/ccg6eVgO.s page 1 250 Write_Command_Pins: 251 .LVL10: 252 .LFB141: - 127:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, (CE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 253 .loc 1 127 48 is_stmt 1 view -0 + 152:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, (CE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 253 .loc 1 152 48 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 0 256 @ frame_needed = 0, uses_anonymous_args = 0 - 127:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, (CE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 257 .loc 1 127 48 is_stmt 0 view .LVU55 + 152:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, (CE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 257 .loc 1 152 48 is_stmt 0 view .LVU55 258 0000 70B5 push {r4, r5, r6, lr} 259 .LCFI5: 260 .cfi_def_cfa_offset 16 261 .cfi_offset 4, -16 262 .cfi_offset 5, -12 + ARM GAS /tmp/ccPiCTjg.s page 13 + + 263 .cfi_offset 6, -8 264 .cfi_offset 14, -4 265 0002 0E46 mov r6, r1 266 0004 1546 mov r5, r2 - 128:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 267 .loc 1 128 3 is_stmt 1 view .LVU56 + 153:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 267 .loc 1 153 3 is_stmt 1 view .LVU56 268 0006 0D4C ldr r4, .L18 269 0008 021E subs r2, r0, #0 270 .LVL11: - 128:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 271 .loc 1 128 3 is_stmt 0 view .LVU57 + 153:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 271 .loc 1 153 3 is_stmt 0 view .LVU57 272 000a 18BF it ne 273 000c 0122 movne r2, #1 274 000e 4FF48071 mov r1, #256 275 .LVL12: - 128:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 276 .loc 1 128 3 view .LVU58 + 153:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 276 .loc 1 153 3 view .LVU58 277 0012 2046 mov r0, r4 278 .LVL13: - ARM GAS /tmp/ccg6eVgO.s page 12 - - - 128:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 279 .loc 1 128 3 view .LVU59 + 153:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, (OE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 279 .loc 1 153 3 view .LVU59 280 0014 FFF7FEFF bl HAL_GPIO_WritePin 281 .LVL14: - 129:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10,(WE) ? GPIO_PIN_SET : GPIO_PIN_RESET); - 282 .loc 1 129 3 is_stmt 1 view .LVU60 + 154:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_10,(WE) ? GPIO_PIN_SET : GPIO_PIN_RESET); + 282 .loc 1 154 3 is_stmt 1 view .LVU60 283 0018 321E subs r2, r6, #0 284 001a 18BF it ne 285 001c 0122 movne r2, #1 @@ -674,8 +753,8 @@ ARM GAS /tmp/ccg6eVgO.s page 1 287 0022 2046 mov r0, r4 288 0024 FFF7FEFF bl HAL_GPIO_WritePin 289 .LVL15: - 130:Core/Src/main.c **** } - 290 .loc 1 130 3 view .LVU61 + 155:Core/Src/main.c **** } + 290 .loc 1 155 3 view .LVU61 291 0028 2A1E subs r2, r5, #0 292 002a 18BF it ne 293 002c 0122 movne r2, #1 @@ -683,13 +762,13 @@ ARM GAS /tmp/ccg6eVgO.s page 1 295 0032 2046 mov r0, r4 296 0034 FFF7FEFF bl HAL_GPIO_WritePin 297 .LVL16: - 131:Core/Src/main.c **** - 298 .loc 1 131 1 is_stmt 0 view .LVU62 + 156:Core/Src/main.c **** + 298 .loc 1 156 1 is_stmt 0 view .LVU62 299 0038 70BD pop {r4, r5, r6, pc} 300 .LVL17: 301 .L19: - 131:Core/Src/main.c **** - 302 .loc 1 131 1 view .LVU63 + 156:Core/Src/main.c **** + 302 .loc 1 156 1 view .LVU63 303 003a 00BF .align 2 304 .L18: 305 003c 00000240 .word 1073872896 @@ -699,71 +778,74 @@ ARM GAS /tmp/ccg6eVgO.s page 1 310 .align 1 311 .global Data_Pins_Init 312 .syntax unified + ARM GAS /tmp/ccPiCTjg.s page 14 + + 313 .thumb 314 .thumb_func 315 .fpu fpv4-sp-d16 317 Data_Pins_Init: 318 .LVL18: - 319 .LFB147: - 240:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; - 320 .loc 1 240 35 is_stmt 1 view -0 + 319 .LFB151: + 316:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 320 .loc 1 316 35 is_stmt 1 view -0 321 .cfi_startproc 322 @ args = 0, pretend = 0, frame = 24 323 @ frame_needed = 0, uses_anonymous_args = 0 - 240:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; - 324 .loc 1 240 35 is_stmt 0 view .LVU65 + 316:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 324 .loc 1 316 35 is_stmt 0 view .LVU65 325 0000 00B5 push {lr} 326 .LCFI6: 327 .cfi_def_cfa_offset 4 328 .cfi_offset 14, -4 329 0002 87B0 sub sp, sp, #28 330 .LCFI7: - ARM GAS /tmp/ccg6eVgO.s page 13 - - 331 .cfi_def_cfa_offset 32 - 241:Core/Src/main.c **** - 332 .loc 1 241 3 is_stmt 1 view .LVU66 - 241:Core/Src/main.c **** - 333 .loc 1 241 20 is_stmt 0 view .LVU67 + 317:Core/Src/main.c **** + 332 .loc 1 317 3 is_stmt 1 view .LVU66 + 317:Core/Src/main.c **** + 333 .loc 1 317 20 is_stmt 0 view .LVU67 334 0004 0023 movs r3, #0 335 0006 0193 str r3, [sp, #4] 336 0008 0293 str r3, [sp, #8] 337 000a 0393 str r3, [sp, #12] 338 000c 0493 str r3, [sp, #16] 339 000e 0593 str r3, [sp, #20] - 244:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; - 340 .loc 1 244 3 is_stmt 1 view .LVU68 - 244:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; - 341 .loc 1 244 23 is_stmt 0 view .LVU69 + 320:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; + 340 .loc 1 320 3 is_stmt 1 view .LVU68 + 320:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7; + 341 .loc 1 320 23 is_stmt 0 view .LVU69 342 0010 41F6F303 movw r3, #6387 343 0014 0193 str r3, [sp, #4] - 246:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 344 .loc 1 246 3 is_stmt 1 view .LVU70 - 246:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 345 .loc 1 246 5 is_stmt 0 view .LVU71 + 322:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 344 .loc 1 322 3 is_stmt 1 view .LVU70 + 322:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 345 .loc 1 322 5 is_stmt 0 view .LVU71 346 0016 0128 cmp r0, #1 347 0018 08D0 beq .L24 - 251:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; // No pull-up/down - 348 .loc 1 251 5 is_stmt 1 view .LVU72 - 252:Core/Src/main.c **** } - 349 .loc 1 252 5 view .LVU73 - 252:Core/Src/main.c **** } - 350 .loc 1 252 26 is_stmt 0 view .LVU74 + 327:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLDOWN; // No pull-up/down + 348 .loc 1 327 5 is_stmt 1 view .LVU72 + 328:Core/Src/main.c **** } + 349 .loc 1 328 5 view .LVU73 + 328:Core/Src/main.c **** } + 350 .loc 1 328 26 is_stmt 0 view .LVU74 351 001a 0223 movs r3, #2 352 001c 0393 str r3, [sp, #12] 353 .L22: - 254:Core/Src/main.c **** } - 354 .loc 1 254 3 is_stmt 1 view .LVU75 + 330:Core/Src/main.c **** } + 354 .loc 1 330 3 is_stmt 1 view .LVU75 355 001e 01A9 add r1, sp, #4 356 0020 0548 ldr r0, .L25 357 .LVL19: - 254:Core/Src/main.c **** } - 358 .loc 1 254 3 is_stmt 0 view .LVU76 + 330:Core/Src/main.c **** } + ARM GAS /tmp/ccPiCTjg.s page 15 + + + 358 .loc 1 330 3 is_stmt 0 view .LVU76 359 0022 FFF7FEFF bl HAL_GPIO_Init 360 .LVL20: - 255:Core/Src/main.c **** - 361 .loc 1 255 1 view .LVU77 + 331:Core/Src/main.c **** + 361 .loc 1 331 1 view .LVU77 362 0026 07B0 add sp, sp, #28 363 .LCFI8: 364 .cfi_remember_state @@ -774,21 +856,18 @@ ARM GAS /tmp/ccg6eVgO.s page 1 369 .L24: 370 .LCFI9: 371 .cfi_restore_state - 247:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 372 .loc 1 247 5 is_stmt 1 view .LVU78 - 247:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 373 .loc 1 247 26 is_stmt 0 view .LVU79 - ARM GAS /tmp/ccg6eVgO.s page 14 - - + 323:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 372 .loc 1 323 5 is_stmt 1 view .LVU78 + 323:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 373 .loc 1 323 26 is_stmt 0 view .LVU79 374 002c 0123 movs r3, #1 375 002e 0293 str r3, [sp, #8] - 248:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 376 .loc 1 248 5 is_stmt 1 view .LVU80 - 249:Core/Src/main.c **** }else{ - 377 .loc 1 249 5 view .LVU81 - 249:Core/Src/main.c **** }else{ - 378 .loc 1 249 27 is_stmt 0 view .LVU82 + 324:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 376 .loc 1 324 5 is_stmt 1 view .LVU80 + 325:Core/Src/main.c **** }else{ + 377 .loc 1 325 5 view .LVU81 + 325:Core/Src/main.c **** }else{ + 378 .loc 1 325 27 is_stmt 0 view .LVU82 379 0030 0223 movs r3, #2 380 0032 0493 str r3, [sp, #16] 381 0034 F3E7 b .L22 @@ -797,7 +876,7 @@ ARM GAS /tmp/ccg6eVgO.s page 1 384 .L25: 385 0038 00000240 .word 1073872896 386 .cfi_endproc - 387 .LFE147: + 387 .LFE151: 389 .section .text.Receive_Data,"ax",%progbits 390 .align 1 391 .global Receive_Data @@ -807,8 +886,8 @@ ARM GAS /tmp/ccg6eVgO.s page 1 395 .fpu fpv4-sp-d16 397 Receive_Data: 398 .LFB139: - 99:Core/Src/main.c **** Data_Pins_Init(0); // We make sure it's in input mode - 399 .loc 1 99 23 is_stmt 1 view -0 + 124:Core/Src/main.c **** Data_Pins_Init(0); // We make sure it's in input mode + 399 .loc 1 124 23 is_stmt 1 view -0 400 .cfi_startproc 401 @ args = 0, pretend = 0, frame = 32 402 @ frame_needed = 0, uses_anonymous_args = 0 @@ -819,100 +898,100 @@ ARM GAS /tmp/ccg6eVgO.s page 1 407 .cfi_offset 5, -8 408 .cfi_offset 14, -4 409 0002 89B0 sub sp, sp, #36 + ARM GAS /tmp/ccPiCTjg.s page 16 + + 410 .LCFI11: 411 .cfi_def_cfa_offset 48 - 100:Core/Src/main.c **** int result = 0; - 412 .loc 1 100 3 view .LVU84 + 125:Core/Src/main.c **** int result = 0; + 412 .loc 1 125 3 view .LVU84 413 0004 0020 movs r0, #0 414 0006 FFF7FEFF bl Data_Pins_Init 415 .LVL22: - 101:Core/Src/main.c **** int pin_array[] = { - 416 .loc 1 101 3 view .LVU85 - 102:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, - 417 .loc 1 102 3 view .LVU86 - 102:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, - 418 .loc 1 102 7 is_stmt 0 view .LVU87 + 126:Core/Src/main.c **** int pin_array[] = { + 416 .loc 1 126 3 view .LVU85 + 127:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, + 417 .loc 1 127 3 view .LVU86 + 127:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, + 418 .loc 1 127 7 is_stmt 0 view .LVU87 419 000a 6C46 mov r4, sp 420 000c 0E4D ldr r5, .L33 421 000e 0FCD ldmia r5!, {r0, r1, r2, r3} 422 0010 0FC4 stmia r4!, {r0, r1, r2, r3} 423 0012 95E80F00 ldm r5, {r0, r1, r2, r3} 424 0016 84E80F00 stm r4, {r0, r1, r2, r3} - ARM GAS /tmp/ccg6eVgO.s page 15 - - - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 425 .loc 1 106 3 is_stmt 1 view .LVU88 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 425 .loc 1 131 3 is_stmt 1 view .LVU88 426 .LBB9: - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 427 .loc 1 106 7 view .LVU89 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 427 .loc 1 131 7 view .LVU89 428 .LVL23: - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 429 .loc 1 106 11 is_stmt 0 view .LVU90 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 429 .loc 1 131 11 is_stmt 0 view .LVU90 430 001a 0024 movs r4, #0 431 .LBE9: - 101:Core/Src/main.c **** int pin_array[] = { - 432 .loc 1 101 7 view .LVU91 + 126:Core/Src/main.c **** int pin_array[] = { + 432 .loc 1 126 7 view .LVU91 433 001c 2546 mov r5, r4 434 .LBB10: - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 435 .loc 1 106 3 view .LVU92 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 435 .loc 1 131 3 view .LVU92 436 001e 00E0 b .L28 437 .LVL24: 438 .L29: - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 439 .loc 1 106 21 is_stmt 1 discriminator 2 view .LVU93 - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 440 .loc 1 106 22 is_stmt 0 discriminator 2 view .LVU94 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 439 .loc 1 131 21 is_stmt 1 discriminator 2 view .LVU93 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 440 .loc 1 131 22 is_stmt 0 discriminator 2 view .LVU94 441 0020 0134 adds r4, r4, #1 442 .LVL25: 443 .L28: - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 444 .loc 1 106 16 is_stmt 1 discriminator 1 view .LVU95 - 106:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ - 445 .loc 1 106 3 is_stmt 0 discriminator 1 view .LVU96 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 444 .loc 1 131 16 is_stmt 1 discriminator 1 view .LVU95 + 131:Core/Src/main.c **** if(HAL_GPIO_ReadPin(GPIOA, pin_array[i]) == GPIO_PIN_SET){ + 445 .loc 1 131 3 is_stmt 0 discriminator 1 view .LVU96 446 0022 072C cmp r4, #7 447 0024 0DDC bgt .L32 - 107:Core/Src/main.c **** result += 1 << i; - 448 .loc 1 107 5 is_stmt 1 view .LVU97 - 107:Core/Src/main.c **** result += 1 << i; - 449 .loc 1 107 41 is_stmt 0 view .LVU98 + 132:Core/Src/main.c **** result += 1 << i; + 448 .loc 1 132 5 is_stmt 1 view .LVU97 + 132:Core/Src/main.c **** result += 1 << i; + 449 .loc 1 132 41 is_stmt 0 view .LVU98 450 0026 08AB add r3, sp, #32 451 0028 03EB8403 add r3, r3, r4, lsl #2 - 107:Core/Src/main.c **** result += 1 << i; - 452 .loc 1 107 8 view .LVU99 + ARM GAS /tmp/ccPiCTjg.s page 17 + + + 132:Core/Src/main.c **** result += 1 << i; + 452 .loc 1 132 8 view .LVU99 453 002c 33F8201C ldrh r1, [r3, #-32] 454 0030 0648 ldr r0, .L33+4 455 0032 FFF7FEFF bl HAL_GPIO_ReadPin 456 .LVL26: - 107:Core/Src/main.c **** result += 1 << i; - 457 .loc 1 107 7 view .LVU100 + 132:Core/Src/main.c **** result += 1 << i; + 457 .loc 1 132 7 view .LVU100 458 0036 0128 cmp r0, #1 459 0038 F2D1 bne .L29 - 108:Core/Src/main.c **** } - 460 .loc 1 108 7 is_stmt 1 view .LVU101 - 108:Core/Src/main.c **** } - 461 .loc 1 108 19 is_stmt 0 view .LVU102 + 133:Core/Src/main.c **** } + 460 .loc 1 133 7 is_stmt 1 view .LVU101 + 133:Core/Src/main.c **** } + 461 .loc 1 133 19 is_stmt 0 view .LVU102 462 003a 0123 movs r3, #1 463 003c A340 lsls r3, r3, r4 - 108:Core/Src/main.c **** } - 464 .loc 1 108 14 view .LVU103 + 133:Core/Src/main.c **** } + 464 .loc 1 133 14 view .LVU103 465 003e 1D44 add r5, r5, r3 - ARM GAS /tmp/ccg6eVgO.s page 16 - - 466 .LVL27: - 108:Core/Src/main.c **** } - 467 .loc 1 108 14 view .LVU104 + 133:Core/Src/main.c **** } + 467 .loc 1 133 14 view .LVU104 468 0040 EEE7 b .L29 469 .L32: - 108:Core/Src/main.c **** } - 470 .loc 1 108 14 view .LVU105 + 133:Core/Src/main.c **** } + 470 .loc 1 133 14 view .LVU105 471 .LBE10: - 111:Core/Src/main.c **** } - 472 .loc 1 111 3 is_stmt 1 view .LVU106 - 112:Core/Src/main.c **** - 473 .loc 1 112 1 is_stmt 0 view .LVU107 + 136:Core/Src/main.c **** } + 472 .loc 1 136 3 is_stmt 1 view .LVU106 + 137:Core/Src/main.c **** + 473 .loc 1 137 1 is_stmt 0 view .LVU107 474 0042 2846 mov r0, r5 475 0044 09B0 add sp, sp, #36 476 .LCFI12: @@ -921,8 +1000,8 @@ ARM GAS /tmp/ccg6eVgO.s page 1 479 0046 30BD pop {r4, r5, pc} 480 .LVL28: 481 .L34: - 112:Core/Src/main.c **** - 482 .loc 1 112 1 view .LVU108 + 137:Core/Src/main.c **** + 482 .loc 1 137 1 view .LVU108 483 .align 2 484 .L33: 485 0048 4C000000 .word .LANCHOR0+76 @@ -939,13 +1018,16 @@ ARM GAS /tmp/ccg6eVgO.s page 1 498 Write_Data: 499 .LVL29: 500 .LFB140: - 114:Core/Src/main.c **** Data_Pins_Init(1); // We make sure it's in output mode - 501 .loc 1 114 27 is_stmt 1 view -0 + ARM GAS /tmp/ccPiCTjg.s page 18 + + + 139:Core/Src/main.c **** Data_Pins_Init(1); // We make sure it's in output mode + 501 .loc 1 139 27 is_stmt 1 view -0 502 .cfi_startproc 503 @ args = 0, pretend = 0, frame = 32 504 @ frame_needed = 0, uses_anonymous_args = 0 - 114:Core/Src/main.c **** Data_Pins_Init(1); // We make sure it's in output mode - 505 .loc 1 114 27 is_stmt 0 view .LVU110 + 139:Core/Src/main.c **** Data_Pins_Init(1); // We make sure it's in output mode + 505 .loc 1 139 27 is_stmt 0 view .LVU110 506 0000 70B5 push {r4, r5, r6, lr} 507 .LCFI13: 508 .cfi_def_cfa_offset 16 @@ -957,78 +1039,75 @@ ARM GAS /tmp/ccg6eVgO.s page 1 514 .LCFI14: 515 .cfi_def_cfa_offset 48 516 0004 0646 mov r6, r0 - 115:Core/Src/main.c **** int pin_array[] = { - ARM GAS /tmp/ccg6eVgO.s page 17 - - - 517 .loc 1 115 3 is_stmt 1 view .LVU111 + 140:Core/Src/main.c **** int pin_array[] = { + 517 .loc 1 140 3 is_stmt 1 view .LVU111 518 0006 0120 movs r0, #1 519 .LVL30: - 115:Core/Src/main.c **** int pin_array[] = { - 520 .loc 1 115 3 is_stmt 0 view .LVU112 + 140:Core/Src/main.c **** int pin_array[] = { + 520 .loc 1 140 3 is_stmt 0 view .LVU112 521 0008 FFF7FEFF bl Data_Pins_Init 522 .LVL31: - 116:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, - 523 .loc 1 116 3 is_stmt 1 view .LVU113 - 116:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, - 524 .loc 1 116 7 is_stmt 0 view .LVU114 + 141:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, + 523 .loc 1 141 3 is_stmt 1 view .LVU113 + 141:Core/Src/main.c **** GPIO_PIN_0, GPIO_PIN_1, GPIO_PIN_11, GPIO_PIN_12, + 524 .loc 1 141 7 is_stmt 0 view .LVU114 525 000c 6C46 mov r4, sp 526 000e 134D ldr r5, .L42 527 0010 0FCD ldmia r5!, {r0, r1, r2, r3} 528 0012 0FC4 stmia r4!, {r0, r1, r2, r3} 529 0014 95E80F00 ldm r5, {r0, r1, r2, r3} 530 0018 84E80F00 stm r4, {r0, r1, r2, r3} - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 531 .loc 1 120 3 is_stmt 1 view .LVU115 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 531 .loc 1 145 3 is_stmt 1 view .LVU115 532 .LBB11: - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 533 .loc 1 120 7 view .LVU116 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 533 .loc 1 145 7 view .LVU116 534 .LVL32: - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 535 .loc 1 120 11 is_stmt 0 view .LVU117 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 535 .loc 1 145 11 is_stmt 0 view .LVU117 536 001c 0024 movs r4, #0 - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 537 .loc 1 120 3 view .LVU118 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 537 .loc 1 145 3 view .LVU118 538 001e 09E0 b .L36 539 .LVL33: 540 .L37: - 122:Core/Src/main.c **** } - 541 .loc 1 122 10 is_stmt 1 view .LVU119 + 147:Core/Src/main.c **** } + 541 .loc 1 147 10 is_stmt 1 view .LVU119 542 0020 0022 movs r2, #0 543 0022 08AB add r3, sp, #32 544 0024 03EB8403 add r3, r3, r4, lsl #2 545 0028 33F8201C ldrh r1, [r3, #-32] 546 002c 0C48 ldr r0, .L42+4 + ARM GAS /tmp/ccPiCTjg.s page 19 + + 547 002e FFF7FEFF bl HAL_GPIO_WritePin 548 .LVL34: 549 .L38: - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 550 .loc 1 120 21 discriminator 2 view .LVU120 - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 551 .loc 1 120 22 is_stmt 0 discriminator 2 view .LVU121 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 550 .loc 1 145 21 discriminator 2 view .LVU120 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 551 .loc 1 145 22 is_stmt 0 discriminator 2 view .LVU121 552 0032 0134 adds r4, r4, #1 553 .LVL35: 554 .L36: - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 555 .loc 1 120 16 is_stmt 1 discriminator 1 view .LVU122 - 120:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); - 556 .loc 1 120 3 is_stmt 0 discriminator 1 view .LVU123 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 555 .loc 1 145 16 is_stmt 1 discriminator 1 view .LVU122 + 145:Core/Src/main.c **** if((value >> i) & 1) HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_SET); + 556 .loc 1 145 3 is_stmt 0 discriminator 1 view .LVU123 557 0034 072C cmp r4, #7 558 0036 0EDC bgt .L41 - 121:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); - 559 .loc 1 121 5 is_stmt 1 view .LVU124 - 121:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); - ARM GAS /tmp/ccg6eVgO.s page 18 - - - 560 .loc 1 121 15 is_stmt 0 view .LVU125 + 146:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); + 559 .loc 1 146 5 is_stmt 1 view .LVU124 + 146:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); + 560 .loc 1 146 15 is_stmt 0 view .LVU125 561 0038 46FA04F3 asr r3, r6, r4 - 121:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); - 562 .loc 1 121 7 view .LVU126 + 146:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); + 562 .loc 1 146 7 view .LVU126 563 003c 13F0010F tst r3, #1 564 0040 EED0 beq .L37 - 121:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); - 565 .loc 1 121 26 is_stmt 1 discriminator 1 view .LVU127 + 146:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); + 565 .loc 1 146 26 is_stmt 1 discriminator 1 view .LVU127 566 0042 0122 movs r2, #1 567 0044 08AB add r3, sp, #32 568 0046 03EB8403 add r3, r3, r4, lsl #2 @@ -1038,11 +1117,11 @@ ARM GAS /tmp/ccg6eVgO.s page 1 572 .LVL36: 573 0054 EDE7 b .L38 574 .L41: - 121:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); - 575 .loc 1 121 26 is_stmt 0 discriminator 1 view .LVU128 + 146:Core/Src/main.c **** else HAL_GPIO_WritePin(GPIOA, pin_array[i], GPIO_PIN_RESET); + 575 .loc 1 146 26 is_stmt 0 discriminator 1 view .LVU128 576 .LBE11: - 124:Core/Src/main.c **** - 577 .loc 1 124 1 view .LVU129 + 149:Core/Src/main.c **** + 577 .loc 1 149 1 view .LVU129 578 0056 08B0 add sp, sp, #32 579 .LCFI15: 580 .cfi_def_cfa_offset 16 @@ -1050,8 +1129,8 @@ ARM GAS /tmp/ccg6eVgO.s page 1 582 0058 70BD pop {r4, r5, r6, pc} 583 .LVL37: 584 .L43: - 124:Core/Src/main.c **** - 585 .loc 1 124 1 view .LVU130 + 149:Core/Src/main.c **** + 585 .loc 1 149 1 view .LVU130 586 005a 00BF .align 2 587 .L42: 588 005c 4C000000 .word .LANCHOR0+76 @@ -1059,6 +1138,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 590 .cfi_endproc 591 .LFE140: 593 .section .text.Write_Command,"ax",%progbits + ARM GAS /tmp/ccPiCTjg.s page 20 + + 594 .align 1 595 .global Write_Command 596 .syntax unified @@ -1068,512 +1150,930 @@ ARM GAS /tmp/ccg6eVgO.s page 1 601 Write_Command: 602 .LVL38: 603 .LFB142: - 133:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); - 604 .loc 1 133 40 is_stmt 1 view -0 + 158:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); + 604 .loc 1 158 40 is_stmt 1 view -0 605 .cfi_startproc 606 @ args = 0, pretend = 0, frame = 0 607 @ frame_needed = 0, uses_anonymous_args = 0 - 133:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); - 608 .loc 1 133 40 is_stmt 0 view .LVU132 + 158:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); + 608 .loc 1 158 40 is_stmt 0 view .LVU132 609 0000 38B5 push {r3, r4, r5, lr} 610 .LCFI16: 611 .cfi_def_cfa_offset 16 - ARM GAS /tmp/ccg6eVgO.s page 19 - - 612 .cfi_offset 3, -16 613 .cfi_offset 4, -12 614 .cfi_offset 5, -8 615 .cfi_offset 14, -4 616 0002 0546 mov r5, r0 617 0004 0C46 mov r4, r1 - 134:Core/Src/main.c **** Write_Address(addr); - 618 .loc 1 134 5 is_stmt 1 view .LVU133 + 159:Core/Src/main.c **** Write_Address(addr); + 618 .loc 1 159 5 is_stmt 1 view .LVU133 619 0006 0122 movs r2, #1 620 0008 1146 mov r1, r2 621 .LVL39: - 134:Core/Src/main.c **** Write_Address(addr); - 622 .loc 1 134 5 is_stmt 0 view .LVU134 + 159:Core/Src/main.c **** Write_Address(addr); + 622 .loc 1 159 5 is_stmt 0 view .LVU134 623 000a 1046 mov r0, r2 624 .LVL40: - 134:Core/Src/main.c **** Write_Address(addr); - 625 .loc 1 134 5 view .LVU135 + 159:Core/Src/main.c **** Write_Address(addr); + 625 .loc 1 159 5 view .LVU135 626 000c FFF7FEFF bl Write_Command_Pins 627 .LVL41: - 135:Core/Src/main.c **** Write_Data(data); - 628 .loc 1 135 5 is_stmt 1 view .LVU136 + 160:Core/Src/main.c **** Write_Data(data); + 628 .loc 1 160 5 is_stmt 1 view .LVU136 629 0010 2846 mov r0, r5 630 0012 FFF7FEFF bl Write_Address 631 .LVL42: - 136:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); - 632 .loc 1 136 5 view .LVU137 + 161:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); + 632 .loc 1 161 5 view .LVU137 633 0016 2046 mov r0, r4 634 0018 FFF7FEFF bl Write_Data 635 .LVL43: - 137:Core/Src/main.c **** // 4. Pulse WE# low to latch data - 636 .loc 1 137 5 view .LVU138 + 162:Core/Src/main.c **** // 4. Pulse WE# low to latch data + 636 .loc 1 162 5 view .LVU138 637 001c 0122 movs r2, #1 638 001e 1146 mov r1, r2 639 0020 0020 movs r0, #0 640 0022 FFF7FEFF bl Write_Command_Pins 641 .LVL44: - 139:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); // WE high - 642 .loc 1 139 5 view .LVU139 + 164:Core/Src/main.c **** Write_Command_Pins(0, 1, 1); // WE high + 642 .loc 1 164 5 view .LVU139 + ARM GAS /tmp/ccPiCTjg.s page 21 + + 643 0026 0022 movs r2, #0 644 0028 0121 movs r1, #1 645 002a 1046 mov r0, r2 646 002c FFF7FEFF bl Write_Command_Pins 647 .LVL45: - 140:Core/Src/main.c **** - 648 .loc 1 140 5 view .LVU140 + 165:Core/Src/main.c **** + 648 .loc 1 165 5 view .LVU140 649 0030 0122 movs r2, #1 650 0032 1146 mov r1, r2 651 0034 0020 movs r0, #0 652 0036 FFF7FEFF bl Write_Command_Pins 653 .LVL46: - 143:Core/Src/main.c **** } - 654 .loc 1 143 5 view .LVU141 + 168:Core/Src/main.c **** } + 654 .loc 1 168 5 view .LVU141 655 003a 0122 movs r2, #1 656 003c 1146 mov r1, r2 657 003e 1046 mov r0, r2 658 0040 FFF7FEFF bl Write_Command_Pins 659 .LVL47: - ARM GAS /tmp/ccg6eVgO.s page 20 - - - 144:Core/Src/main.c **** - 660 .loc 1 144 1 is_stmt 0 view .LVU142 + 169:Core/Src/main.c **** + 660 .loc 1 169 1 is_stmt 0 view .LVU142 661 0044 38BD pop {r3, r4, r5, pc} - 144:Core/Src/main.c **** - 662 .loc 1 144 1 view .LVU143 + 169:Core/Src/main.c **** + 662 .loc 1 169 1 view .LVU143 663 .cfi_endproc 664 .LFE142: - 666 .section .text.Flash_ReadByte,"ax",%progbits + 666 .section .text.Chip_Erase,"ax",%progbits 667 .align 1 - 668 .global Flash_ReadByte + 668 .global Chip_Erase 669 .syntax unified 670 .thumb 671 .thumb_func 672 .fpu fpv4-sp-d16 - 674 Flash_ReadByte: - 675 .LVL48: - 676 .LFB143: - 146:Core/Src/main.c **** Write_Address(addr); - 677 .loc 1 146 30 is_stmt 1 view -0 - 678 .cfi_startproc - 679 @ args = 0, pretend = 0, frame = 0 - 680 @ frame_needed = 0, uses_anonymous_args = 0 - 146:Core/Src/main.c **** Write_Address(addr); - 681 .loc 1 146 30 is_stmt 0 view .LVU145 - 682 0000 10B5 push {r4, lr} - 683 .LCFI17: - 684 .cfi_def_cfa_offset 8 - 685 .cfi_offset 4, -8 - 686 .cfi_offset 14, -4 - 147:Core/Src/main.c **** Data_Pins_Init(0); - 687 .loc 1 147 5 is_stmt 1 view .LVU146 - 688 0002 FFF7FEFF bl Write_Address - 689 .LVL49: - 148:Core/Src/main.c **** Write_Command_Pins(0, 0, 1); - 690 .loc 1 148 5 view .LVU147 - 691 0006 0020 movs r0, #0 - 692 0008 FFF7FEFF bl Data_Pins_Init - 693 .LVL50: - 149:Core/Src/main.c **** int data = Receive_Data(); - 694 .loc 1 149 5 view .LVU148 - 695 000c 0122 movs r2, #1 - 696 000e 0021 movs r1, #0 - 697 0010 0846 mov r0, r1 - 698 0012 FFF7FEFF bl Write_Command_Pins - 699 .LVL51: - 150:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); - 700 .loc 1 150 5 view .LVU149 - 150:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); - 701 .loc 1 150 16 is_stmt 0 view .LVU150 - 702 0016 FFF7FEFF bl Receive_Data - 703 .LVL52: - 704 001a 0446 mov r4, r0 - 705 .LVL53: - 151:Core/Src/main.c **** return data; - 706 .loc 1 151 5 is_stmt 1 view .LVU151 - 707 001c 0122 movs r2, #1 - 708 001e 1146 mov r1, r2 - ARM GAS /tmp/ccg6eVgO.s page 21 - - - 709 0020 1046 mov r0, r2 - 710 .LVL54: - 151:Core/Src/main.c **** return data; - 711 .loc 1 151 5 is_stmt 0 view .LVU152 - 712 0022 FFF7FEFF bl Write_Command_Pins - 713 .LVL55: - 152:Core/Src/main.c **** } - 714 .loc 1 152 5 is_stmt 1 view .LVU153 - 153:Core/Src/main.c **** - 715 .loc 1 153 1 is_stmt 0 view .LVU154 - 716 0026 2046 mov r0, r4 - 717 0028 10BD pop {r4, pc} - 153:Core/Src/main.c **** - 718 .loc 1 153 1 view .LVU155 - 719 .cfi_endproc - 720 .LFE143: - 722 .section .text.Enter_Device_ID,"ax",%progbits - 723 .align 1 - 724 .global Enter_Device_ID - 725 .syntax unified - 726 .thumb - 727 .thumb_func - 728 .fpu fpv4-sp-d16 - 730 Enter_Device_ID: - 731 .LVL56: - 732 .LFB144: - 155:Core/Src/main.c **** // Enter ID mode - 733 .loc 1 155 53 is_stmt 1 view -0 - 734 .cfi_startproc - 735 @ args = 0, pretend = 0, frame = 0 - 736 @ frame_needed = 0, uses_anonymous_args = 0 - 155:Core/Src/main.c **** // Enter ID mode - 737 .loc 1 155 53 is_stmt 0 view .LVU157 - 738 0000 38B5 push {r3, r4, r5, lr} - 739 .LCFI18: - 740 .cfi_def_cfa_offset 16 - 741 .cfi_offset 3, -16 - 742 .cfi_offset 4, -12 - 743 .cfi_offset 5, -8 - 744 .cfi_offset 14, -4 - 745 0002 0546 mov r5, r0 - 746 0004 0C46 mov r4, r1 - 157:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); - 747 .loc 1 157 3 is_stmt 1 view .LVU158 - 748 0006 AA21 movs r1, #170 - 749 .LVL57: - 157:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); - 750 .loc 1 157 3 is_stmt 0 view .LVU159 - 751 0008 45F25550 movw r0, #21845 - 752 .LVL58: - 157:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); - 753 .loc 1 157 3 view .LVU160 - 754 000c FFF7FEFF bl Write_Command - 755 .LVL59: - 158:Core/Src/main.c **** Write_Command(0x5555, 0x90); - 756 .loc 1 158 3 is_stmt 1 view .LVU161 - 757 0010 5521 movs r1, #85 - ARM GAS /tmp/ccg6eVgO.s page 22 - - - 758 0012 42F6AA20 movw r0, #10922 - 759 0016 FFF7FEFF bl Write_Command - 760 .LVL60: - 159:Core/Src/main.c **** - 761 .loc 1 159 3 view .LVU162 - 762 001a 9021 movs r1, #144 - 763 001c 45F25550 movw r0, #21845 - 764 0020 FFF7FEFF bl Write_Command - 765 .LVL61: - 162:Core/Src/main.c **** - 766 .loc 1 162 3 view .LVU163 - 162:Core/Src/main.c **** - 767 .loc 1 162 19 is_stmt 0 view .LVU164 - 768 0024 0020 movs r0, #0 - 769 0026 FFF7FEFF bl Flash_ReadByte - 770 .LVL62: - 162:Core/Src/main.c **** - 771 .loc 1 162 17 view .LVU165 - 772 002a 2860 str r0, [r5] - 165:Core/Src/main.c **** - 773 .loc 1 165 3 is_stmt 1 view .LVU166 - 165:Core/Src/main.c **** - 774 .loc 1 165 13 is_stmt 0 view .LVU167 - 775 002c 0120 movs r0, #1 - 776 002e FFF7FEFF bl Flash_ReadByte - 777 .LVL63: - 165:Core/Src/main.c **** - 778 .loc 1 165 11 view .LVU168 - 779 0032 2060 str r0, [r4] - 168:Core/Src/main.c **** } - 780 .loc 1 168 3 is_stmt 1 view .LVU169 - 781 0034 F021 movs r1, #240 - 782 0036 45F25550 movw r0, #21845 - 783 003a FFF7FEFF bl Write_Command - 784 .LVL64: - 169:Core/Src/main.c **** - 785 .loc 1 169 1 is_stmt 0 view .LVU170 - 786 003e 38BD pop {r3, r4, r5, pc} - 169:Core/Src/main.c **** - 787 .loc 1 169 1 view .LVU171 - 788 .cfi_endproc - 789 .LFE144: - 791 .section .text.Address_Pins_Init,"ax",%progbits - 792 .align 1 - 793 .global Address_Pins_Init - 794 .syntax unified - 795 .thumb - 796 .thumb_func - 797 .fpu fpv4-sp-d16 - 799 Address_Pins_Init: - 800 .LFB148: - 257:Core/Src/main.c **** GPIO_InitTypeDef GPIOC_InitStruct = {0}; - 801 .loc 1 257 29 is_stmt 1 view -0 - 802 .cfi_startproc - 803 @ args = 0, pretend = 0, frame = 40 - 804 @ frame_needed = 0, uses_anonymous_args = 0 - 805 0000 70B5 push {r4, r5, r6, lr} - ARM GAS /tmp/ccg6eVgO.s page 23 - - - 806 .LCFI19: - 807 .cfi_def_cfa_offset 16 - 808 .cfi_offset 4, -16 - 809 .cfi_offset 5, -12 - 810 .cfi_offset 6, -8 - 811 .cfi_offset 14, -4 - 812 0002 8AB0 sub sp, sp, #40 - 813 .LCFI20: - 814 .cfi_def_cfa_offset 56 - 258:Core/Src/main.c **** // Configure PC0..PC15 as push-pull outputs - 815 .loc 1 258 3 view .LVU173 - 258:Core/Src/main.c **** // Configure PC0..PC15 as push-pull outputs - 816 .loc 1 258 20 is_stmt 0 view .LVU174 - 817 0004 0024 movs r4, #0 - 818 0006 0594 str r4, [sp, #20] - 819 0008 0694 str r4, [sp, #24] - 820 000a 0794 str r4, [sp, #28] - 821 000c 0894 str r4, [sp, #32] - 822 000e 0994 str r4, [sp, #36] - 260:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | - 823 .loc 1 260 3 is_stmt 1 view .LVU175 - 260:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | - 824 .loc 1 260 24 is_stmt 0 view .LVU176 - 825 0010 4FF6FF73 movw r3, #65535 - 826 0014 0593 str r3, [sp, #20] - 264:Core/Src/main.c **** GPIOC_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 827 .loc 1 264 3 is_stmt 1 view .LVU177 - 264:Core/Src/main.c **** GPIOC_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 828 .loc 1 264 25 is_stmt 0 view .LVU178 - 829 0016 0126 movs r6, #1 - 830 0018 0696 str r6, [sp, #24] - 265:Core/Src/main.c **** GPIOC_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 831 .loc 1 265 3 is_stmt 1 view .LVU179 - 266:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIOC_InitStruct); - 832 .loc 1 266 3 view .LVU180 - 266:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIOC_InitStruct); - 833 .loc 1 266 26 is_stmt 0 view .LVU181 - 834 001a 0225 movs r5, #2 - 835 001c 0895 str r5, [sp, #32] - 267:Core/Src/main.c **** - 836 .loc 1 267 3 is_stmt 1 view .LVU182 - 837 001e 05A9 add r1, sp, #20 - 838 0020 0848 ldr r0, .L52 - 839 0022 FFF7FEFF bl HAL_GPIO_Init - 840 .LVL65: - 270:Core/Src/main.c **** // Configure PB0..PB2 as push-pull outputs - 841 .loc 1 270 3 view .LVU183 - 270:Core/Src/main.c **** // Configure PB0..PB2 as push-pull outputs - 842 .loc 1 270 20 is_stmt 0 view .LVU184 - 843 0026 0094 str r4, [sp] - 844 0028 0194 str r4, [sp, #4] - 845 002a 0294 str r4, [sp, #8] - 846 002c 0394 str r4, [sp, #12] - 847 002e 0494 str r4, [sp, #16] - 272:Core/Src/main.c **** GPIOB_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 848 .loc 1 272 3 is_stmt 1 view .LVU185 - 272:Core/Src/main.c **** GPIOB_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - ARM GAS /tmp/ccg6eVgO.s page 24 - - - 849 .loc 1 272 24 is_stmt 0 view .LVU186 - 850 0030 1F23 movs r3, #31 - 851 0032 0093 str r3, [sp] - 273:Core/Src/main.c **** GPIOB_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 852 .loc 1 273 3 is_stmt 1 view .LVU187 - 273:Core/Src/main.c **** GPIOB_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 853 .loc 1 273 25 is_stmt 0 view .LVU188 - 854 0034 0196 str r6, [sp, #4] - 274:Core/Src/main.c **** GPIOB_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 855 .loc 1 274 3 is_stmt 1 view .LVU189 - 275:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIOB_InitStruct); - 856 .loc 1 275 3 view .LVU190 - 275:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIOB_InitStruct); - 857 .loc 1 275 26 is_stmt 0 view .LVU191 - 858 0036 0395 str r5, [sp, #12] - 276:Core/Src/main.c **** } - 859 .loc 1 276 3 is_stmt 1 view .LVU192 - 860 0038 6946 mov r1, sp - 861 003a 0348 ldr r0, .L52+4 - 862 003c FFF7FEFF bl HAL_GPIO_Init - 863 .LVL66: - 277:Core/Src/main.c **** - 864 .loc 1 277 1 is_stmt 0 view .LVU193 - 865 0040 0AB0 add sp, sp, #40 - 866 .LCFI21: - 867 .cfi_def_cfa_offset 16 - 868 @ sp needed - 869 0042 70BD pop {r4, r5, r6, pc} - 870 .L53: - 871 .align 2 - 872 .L52: - 873 0044 00080240 .word 1073874944 - 874 0048 00040240 .word 1073873920 - 875 .cfi_endproc - 876 .LFE148: - 878 .section .text.Command_Pins_Init,"ax",%progbits - 879 .align 1 - 880 .global Command_Pins_Init - 881 .syntax unified - 882 .thumb - 883 .thumb_func - 884 .fpu fpv4-sp-d16 - 886 Command_Pins_Init: - 887 .LFB149: - 279:Core/Src/main.c **** // PA8-10 as outputs pins - 888 .loc 1 279 29 is_stmt 1 view -0 - 889 .cfi_startproc - 890 @ args = 0, pretend = 0, frame = 24 - 891 @ frame_needed = 0, uses_anonymous_args = 0 - 892 0000 00B5 push {lr} - 893 .LCFI22: - 894 .cfi_def_cfa_offset 4 - 895 .cfi_offset 14, -4 - 896 0002 87B0 sub sp, sp, #28 - 897 .LCFI23: - 898 .cfi_def_cfa_offset 32 - 281:Core/Src/main.c **** GPIOA_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10; - ARM GAS /tmp/ccg6eVgO.s page 25 - - - 899 .loc 1 281 3 view .LVU195 - 281:Core/Src/main.c **** GPIOA_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10; - 900 .loc 1 281 20 is_stmt 0 view .LVU196 - 901 0004 0023 movs r3, #0 - 902 0006 0193 str r3, [sp, #4] - 903 0008 0293 str r3, [sp, #8] - 904 000a 0393 str r3, [sp, #12] - 905 000c 0493 str r3, [sp, #16] - 906 000e 0593 str r3, [sp, #20] - 282:Core/Src/main.c **** GPIOA_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 907 .loc 1 282 3 is_stmt 1 view .LVU197 - 282:Core/Src/main.c **** GPIOA_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output - 908 .loc 1 282 24 is_stmt 0 view .LVU198 - 909 0010 4FF4E063 mov r3, #1792 - 910 0014 0193 str r3, [sp, #4] - 283:Core/Src/main.c **** GPIOA_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 911 .loc 1 283 3 is_stmt 1 view .LVU199 - 283:Core/Src/main.c **** GPIOA_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down - 912 .loc 1 283 25 is_stmt 0 view .LVU200 - 913 0016 0123 movs r3, #1 - 914 0018 0293 str r3, [sp, #8] - 284:Core/Src/main.c **** GPIOA_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching - 915 .loc 1 284 3 is_stmt 1 view .LVU201 - 285:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIOA_InitStruct); - 916 .loc 1 285 3 view .LVU202 - 285:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIOA_InitStruct); - 917 .loc 1 285 26 is_stmt 0 view .LVU203 - 918 001a 0223 movs r3, #2 - 919 001c 0493 str r3, [sp, #16] - 286:Core/Src/main.c **** } - 920 .loc 1 286 3 is_stmt 1 view .LVU204 - 921 001e 01A9 add r1, sp, #4 - 922 0020 0248 ldr r0, .L56 - 923 0022 FFF7FEFF bl HAL_GPIO_Init - 924 .LVL67: - 287:Core/Src/main.c **** - 925 .loc 1 287 1 is_stmt 0 view .LVU205 - 926 0026 07B0 add sp, sp, #28 - 927 .LCFI24: - 928 .cfi_def_cfa_offset 4 - 929 @ sp needed - 930 0028 5DF804FB ldr pc, [sp], #4 - 931 .L57: - 932 .align 2 - 933 .L56: - 934 002c 00000240 .word 1073872896 - 935 .cfi_endproc - 936 .LFE149: - 938 .section .text.debug_print,"ax",%progbits - 939 .align 1 - 940 .global debug_print - 941 .syntax unified - 942 .thumb - 943 .thumb_func - 944 .fpu fpv4-sp-d16 - 946 debug_print: - 947 .LVL68: - ARM GAS /tmp/ccg6eVgO.s page 26 - - - 948 .LFB150: - 289:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY); - 949 .loc 1 289 35 is_stmt 1 view -0 - 950 .cfi_startproc - 951 @ args = 0, pretend = 0, frame = 0 - 952 @ frame_needed = 0, uses_anonymous_args = 0 - 289:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY); - 953 .loc 1 289 35 is_stmt 0 view .LVU207 - 954 0000 10B5 push {r4, lr} - 955 .LCFI25: - 956 .cfi_def_cfa_offset 8 - 957 .cfi_offset 4, -8 - 958 .cfi_offset 14, -4 - 959 0002 0446 mov r4, r0 - 290:Core/Src/main.c **** } - 960 .loc 1 290 3 is_stmt 1 view .LVU208 - 290:Core/Src/main.c **** } - 961 .loc 1 290 45 is_stmt 0 view .LVU209 - 962 0004 FFF7FEFF bl strlen - 963 .LVL69: - 290:Core/Src/main.c **** } - 964 .loc 1 290 3 view .LVU210 - 965 0008 4FF0FF33 mov r3, #-1 - 966 000c 82B2 uxth r2, r0 - 967 000e 2146 mov r1, r4 - 968 0010 0148 ldr r0, .L60 - 969 0012 FFF7FEFF bl HAL_UART_Transmit - 970 .LVL70: - 291:Core/Src/main.c **** - 971 .loc 1 291 1 view .LVU211 - 972 0016 10BD pop {r4, pc} - 973 .LVL71: - 974 .L61: - 291:Core/Src/main.c **** - 975 .loc 1 291 1 view .LVU212 - 976 .align 2 - 977 .L60: - 978 0018 00000000 .word .LANCHOR1 - 979 .cfi_endproc - 980 .LFE150: - 982 .section .text.Error_Handler,"ax",%progbits - 983 .align 1 - 984 .global Error_Handler - 985 .syntax unified - 986 .thumb - 987 .thumb_func - 988 .fpu fpv4-sp-d16 - 990 Error_Handler: - 991 .LFB152: - 322:Core/Src/main.c **** - 323:Core/Src/main.c **** - 324:Core/Src/main.c **** /** - 325:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. - 326:Core/Src/main.c **** * @retval None - 327:Core/Src/main.c **** */ - 328:Core/Src/main.c **** void Error_Handler(void) - 329:Core/Src/main.c **** { - ARM GAS /tmp/ccg6eVgO.s page 27 - - - 992 .loc 1 329 1 is_stmt 1 view -0 - 993 .cfi_startproc - 994 @ Volatile: function does not return. - 995 @ args = 0, pretend = 0, frame = 0 - 996 @ frame_needed = 0, uses_anonymous_args = 0 - 997 @ link register save eliminated. - 330:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ - 331:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ - 332:Core/Src/main.c **** __disable_irq(); - 998 .loc 1 332 3 view .LVU214 - 999 .LBB12: - 1000 .LBI12: - 1001 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" + 674 Chip_Erase: + 675 .LFB146: + 218:Core/Src/main.c **** // Erase sequence + 676 .loc 1 218 22 is_stmt 1 view -0 + 677 .cfi_startproc + 678 @ args = 0, pretend = 0, frame = 0 + 679 @ frame_needed = 0, uses_anonymous_args = 0 + 680 0000 08B5 push {r3, lr} + 681 .LCFI17: + 682 .cfi_def_cfa_offset 8 + 683 .cfi_offset 3, -8 + 684 .cfi_offset 14, -4 + 220:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 685 .loc 1 220 3 view .LVU145 + 686 0002 AA21 movs r1, #170 + 687 0004 45F25550 movw r0, #21845 + 688 0008 FFF7FEFF bl Write_Command + 689 .LVL48: + 221:Core/Src/main.c **** Write_Command(0x5555, 0x80); + 690 .loc 1 221 3 view .LVU146 + 691 000c 5521 movs r1, #85 + 692 000e 42F6AA20 movw r0, #10922 + 693 0012 FFF7FEFF bl Write_Command + 694 .LVL49: + ARM GAS /tmp/ccPiCTjg.s page 22 + + + 222:Core/Src/main.c **** Write_Command(0x5555, 0xAA); + 695 .loc 1 222 3 view .LVU147 + 696 0016 8021 movs r1, #128 + 697 0018 45F25550 movw r0, #21845 + 698 001c FFF7FEFF bl Write_Command + 699 .LVL50: + 223:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 700 .loc 1 223 3 view .LVU148 + 701 0020 AA21 movs r1, #170 + 702 0022 45F25550 movw r0, #21845 + 703 0026 FFF7FEFF bl Write_Command + 704 .LVL51: + 224:Core/Src/main.c **** Write_Command(0x5555, 0x10); + 705 .loc 1 224 3 view .LVU149 + 706 002a 5521 movs r1, #85 + 707 002c 42F6AA20 movw r0, #10922 + 708 0030 FFF7FEFF bl Write_Command + 709 .LVL52: + 225:Core/Src/main.c **** + 710 .loc 1 225 3 view .LVU150 + 711 0034 1021 movs r1, #16 + 712 0036 45F25550 movw r0, #21845 + 713 003a FFF7FEFF bl Write_Command + 714 .LVL53: + 227:Core/Src/main.c **** } + 715 .loc 1 227 3 view .LVU151 + 716 003e 9620 movs r0, #150 + 717 0040 FFF7FEFF bl HAL_Delay + 718 .LVL54: + 228:Core/Src/main.c **** + 719 .loc 1 228 1 is_stmt 0 view .LVU152 + 720 0044 08BD pop {r3, pc} + 721 .cfi_endproc + 722 .LFE146: + 724 .section .text.Chip_Program_Byte,"ax",%progbits + 725 .align 1 + 726 .global Chip_Program_Byte + 727 .syntax unified + 728 .thumb + 729 .thumb_func + 730 .fpu fpv4-sp-d16 + 732 Chip_Program_Byte: + 733 .LVL55: + 734 .LFB147: + 230:Core/Src/main.c **** Write_Command(0x5555, 0xAA); + 735 .loc 1 230 43 is_stmt 1 view -0 + 736 .cfi_startproc + 737 @ args = 0, pretend = 0, frame = 0 + 738 @ frame_needed = 0, uses_anonymous_args = 0 + 230:Core/Src/main.c **** Write_Command(0x5555, 0xAA); + 739 .loc 1 230 43 is_stmt 0 view .LVU154 + 740 0000 38B5 push {r3, r4, r5, lr} + 741 .LCFI18: + 742 .cfi_def_cfa_offset 16 + 743 .cfi_offset 3, -16 + 744 .cfi_offset 4, -12 + 745 .cfi_offset 5, -8 + ARM GAS /tmp/ccPiCTjg.s page 23 + + + 746 .cfi_offset 14, -4 + 747 0002 0446 mov r4, r0 + 748 0004 0D46 mov r5, r1 + 231:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 749 .loc 1 231 3 is_stmt 1 view .LVU155 + 750 0006 AA21 movs r1, #170 + 751 .LVL56: + 231:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 752 .loc 1 231 3 is_stmt 0 view .LVU156 + 753 0008 45F25550 movw r0, #21845 + 754 .LVL57: + 231:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 755 .loc 1 231 3 view .LVU157 + 756 000c FFF7FEFF bl Write_Command + 757 .LVL58: + 232:Core/Src/main.c **** Write_Command(0x5555, 0xA0); + 758 .loc 1 232 3 is_stmt 1 view .LVU158 + 759 0010 5521 movs r1, #85 + 760 0012 42F6AA20 movw r0, #10922 + 761 0016 FFF7FEFF bl Write_Command + 762 .LVL59: + 233:Core/Src/main.c **** Write_Command(addr, data); + 763 .loc 1 233 3 view .LVU159 + 764 001a A021 movs r1, #160 + 765 001c 45F25550 movw r0, #21845 + 766 0020 FFF7FEFF bl Write_Command + 767 .LVL60: + 234:Core/Src/main.c **** } + 768 .loc 1 234 3 view .LVU160 + 769 0024 2946 mov r1, r5 + 770 0026 2046 mov r0, r4 + 771 0028 FFF7FEFF bl Write_Command + 772 .LVL61: + 235:Core/Src/main.c **** + 773 .loc 1 235 1 is_stmt 0 view .LVU161 + 774 002c 38BD pop {r3, r4, r5, pc} + 235:Core/Src/main.c **** + 775 .loc 1 235 1 view .LVU162 + 776 .cfi_endproc + 777 .LFE147: + 779 .section .text.Flash_ReadByte,"ax",%progbits + 780 .align 1 + 781 .global Flash_ReadByte + 782 .syntax unified + 783 .thumb + 784 .thumb_func + 785 .fpu fpv4-sp-d16 + 787 Flash_ReadByte: + 788 .LVL62: + 789 .LFB143: + 171:Core/Src/main.c **** Write_Address(addr); + 790 .loc 1 171 30 is_stmt 1 view -0 + 791 .cfi_startproc + 792 @ args = 0, pretend = 0, frame = 0 + 793 @ frame_needed = 0, uses_anonymous_args = 0 + 171:Core/Src/main.c **** Write_Address(addr); + 794 .loc 1 171 30 is_stmt 0 view .LVU164 + ARM GAS /tmp/ccPiCTjg.s page 24 + + + 795 0000 10B5 push {r4, lr} + 796 .LCFI19: + 797 .cfi_def_cfa_offset 8 + 798 .cfi_offset 4, -8 + 799 .cfi_offset 14, -4 + 172:Core/Src/main.c **** Data_Pins_Init(0); + 800 .loc 1 172 5 is_stmt 1 view .LVU165 + 801 0002 FFF7FEFF bl Write_Address + 802 .LVL63: + 173:Core/Src/main.c **** Write_Command_Pins(0, 0, 1); + 803 .loc 1 173 5 view .LVU166 + 804 0006 0020 movs r0, #0 + 805 0008 FFF7FEFF bl Data_Pins_Init + 806 .LVL64: + 174:Core/Src/main.c **** int data = Receive_Data(); + 807 .loc 1 174 5 view .LVU167 + 808 000c 0122 movs r2, #1 + 809 000e 0021 movs r1, #0 + 810 0010 0846 mov r0, r1 + 811 0012 FFF7FEFF bl Write_Command_Pins + 812 .LVL65: + 175:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); + 813 .loc 1 175 5 view .LVU168 + 175:Core/Src/main.c **** Write_Command_Pins(1, 1, 1); + 814 .loc 1 175 16 is_stmt 0 view .LVU169 + 815 0016 FFF7FEFF bl Receive_Data + 816 .LVL66: + 817 001a 0446 mov r4, r0 + 818 .LVL67: + 176:Core/Src/main.c **** return data; + 819 .loc 1 176 5 is_stmt 1 view .LVU170 + 820 001c 0122 movs r2, #1 + 821 001e 1146 mov r1, r2 + 822 0020 1046 mov r0, r2 + 823 .LVL68: + 176:Core/Src/main.c **** return data; + 824 .loc 1 176 5 is_stmt 0 view .LVU171 + 825 0022 FFF7FEFF bl Write_Command_Pins + 826 .LVL69: + 177:Core/Src/main.c **** } + 827 .loc 1 177 5 is_stmt 1 view .LVU172 + 178:Core/Src/main.c **** + 828 .loc 1 178 1 is_stmt 0 view .LVU173 + 829 0026 2046 mov r0, r4 + 830 0028 10BD pop {r4, pc} + 178:Core/Src/main.c **** + 831 .loc 1 178 1 view .LVU174 + 832 .cfi_endproc + 833 .LFE143: + 835 .section .text.Enter_Device_ID,"ax",%progbits + 836 .align 1 + 837 .global Enter_Device_ID + 838 .syntax unified + 839 .thumb + 840 .thumb_func + 841 .fpu fpv4-sp-d16 + 843 Enter_Device_ID: + ARM GAS /tmp/ccPiCTjg.s page 25 + + + 844 .LVL70: + 845 .LFB144: + 180:Core/Src/main.c **** // Enter ID mode + 846 .loc 1 180 53 is_stmt 1 view -0 + 847 .cfi_startproc + 848 @ args = 0, pretend = 0, frame = 0 + 849 @ frame_needed = 0, uses_anonymous_args = 0 + 180:Core/Src/main.c **** // Enter ID mode + 850 .loc 1 180 53 is_stmt 0 view .LVU176 + 851 0000 38B5 push {r3, r4, r5, lr} + 852 .LCFI20: + 853 .cfi_def_cfa_offset 16 + 854 .cfi_offset 3, -16 + 855 .cfi_offset 4, -12 + 856 .cfi_offset 5, -8 + 857 .cfi_offset 14, -4 + 858 0002 0546 mov r5, r0 + 859 0004 0C46 mov r4, r1 + 182:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 860 .loc 1 182 3 is_stmt 1 view .LVU177 + 861 0006 AA21 movs r1, #170 + 862 .LVL71: + 182:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 863 .loc 1 182 3 is_stmt 0 view .LVU178 + 864 0008 45F25550 movw r0, #21845 + 865 .LVL72: + 182:Core/Src/main.c **** Write_Command(0x2AAA, 0x55); + 866 .loc 1 182 3 view .LVU179 + 867 000c FFF7FEFF bl Write_Command + 868 .LVL73: + 183:Core/Src/main.c **** Write_Command(0x5555, 0x90); + 869 .loc 1 183 3 is_stmt 1 view .LVU180 + 870 0010 5521 movs r1, #85 + 871 0012 42F6AA20 movw r0, #10922 + 872 0016 FFF7FEFF bl Write_Command + 873 .LVL74: + 184:Core/Src/main.c **** + 874 .loc 1 184 3 view .LVU181 + 875 001a 9021 movs r1, #144 + 876 001c 45F25550 movw r0, #21845 + 877 0020 FFF7FEFF bl Write_Command + 878 .LVL75: + 187:Core/Src/main.c **** + 879 .loc 1 187 3 view .LVU182 + 187:Core/Src/main.c **** + 880 .loc 1 187 19 is_stmt 0 view .LVU183 + 881 0024 0020 movs r0, #0 + 882 0026 FFF7FEFF bl Flash_ReadByte + 883 .LVL76: + 187:Core/Src/main.c **** + 884 .loc 1 187 17 view .LVU184 + 885 002a 2860 str r0, [r5] + 190:Core/Src/main.c **** + 886 .loc 1 190 3 is_stmt 1 view .LVU185 + 190:Core/Src/main.c **** + 887 .loc 1 190 13 is_stmt 0 view .LVU186 + 888 002c 0120 movs r0, #1 + ARM GAS /tmp/ccPiCTjg.s page 26 + + + 889 002e FFF7FEFF bl Flash_ReadByte + 890 .LVL77: + 190:Core/Src/main.c **** + 891 .loc 1 190 11 view .LVU187 + 892 0032 2060 str r0, [r4] + 193:Core/Src/main.c **** } + 893 .loc 1 193 3 is_stmt 1 view .LVU188 + 894 0034 F021 movs r1, #240 + 895 0036 45F25550 movw r0, #21845 + 896 003a FFF7FEFF bl Write_Command + 897 .LVL78: + 194:Core/Src/main.c **** + 898 .loc 1 194 1 is_stmt 0 view .LVU189 + 899 003e 38BD pop {r3, r4, r5, pc} + 194:Core/Src/main.c **** + 900 .loc 1 194 1 view .LVU190 + 901 .cfi_endproc + 902 .LFE144: + 904 .section .rodata.Dump_Flash_UART.str1.4,"aMS",%progbits,1 + 905 .align 2 + 906 .LC2: + 907 0000 25303258 .ascii "%02X \000" + 907 2000 + 908 0006 0000 .align 2 + 909 .LC3: + 910 0008 0D0A00 .ascii "\015\012\000" + 911 .section .text.Dump_Flash_UART,"ax",%progbits + 912 .align 1 + 913 .global Dump_Flash_UART + 914 .syntax unified + 915 .thumb + 916 .thumb_func + 917 .fpu fpv4-sp-d16 + 919 Dump_Flash_UART: + 920 .LVL79: + 921 .LFB145: + 196:Core/Src/main.c **** uint8_t byte; + 922 .loc 1 196 40 is_stmt 1 view -0 + 923 .cfi_startproc + 924 @ args = 0, pretend = 0, frame = 16 + 925 @ frame_needed = 0, uses_anonymous_args = 0 + 196:Core/Src/main.c **** uint8_t byte; + 926 .loc 1 196 40 is_stmt 0 view .LVU192 + 927 0000 30B5 push {r4, r5, lr} + 928 .LCFI21: + 929 .cfi_def_cfa_offset 12 + 930 .cfi_offset 4, -12 + 931 .cfi_offset 5, -8 + 932 .cfi_offset 14, -4 + 933 0002 85B0 sub sp, sp, #20 + 934 .LCFI22: + 935 .cfi_def_cfa_offset 32 + 936 0004 0546 mov r5, r0 + 197:Core/Src/main.c **** char buf[8]; + 937 .loc 1 197 3 is_stmt 1 view .LVU193 + 198:Core/Src/main.c **** + 938 .loc 1 198 3 view .LVU194 + ARM GAS /tmp/ccPiCTjg.s page 27 + + + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 939 .loc 1 200 3 view .LVU195 + 940 .LBB12: + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 941 .loc 1 200 8 view .LVU196 + 942 .LVL80: + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 943 .loc 1 200 12 is_stmt 0 view .LVU197 + 944 0006 0024 movs r4, #0 + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 945 .loc 1 200 3 view .LVU198 + 946 0008 12E0 b .L55 + 947 .LVL81: + 948 .L56: + 208:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)buf, strlen(buf), HAL_MAX_DELAY); + 949 .loc 1 208 7 is_stmt 1 view .LVU199 + 950 000a 1C49 ldr r1, .L62 + 951 000c 01A8 add r0, sp, #4 + 952 000e FFF7FEFF bl sprintf + 953 .LVL82: + 209:Core/Src/main.c **** if ((addr & 0x0F) == 0x0F) { + 954 .loc 1 209 7 view .LVU200 + 209:Core/Src/main.c **** if ((addr & 0x0F) == 0x0F) { + 955 .loc 1 209 49 is_stmt 0 view .LVU201 + 956 0012 01A8 add r0, sp, #4 + 957 0014 FFF7FEFF bl strlen + 958 .LVL83: + 209:Core/Src/main.c **** if ((addr & 0x0F) == 0x0F) { + 959 .loc 1 209 7 view .LVU202 + 960 0018 4FF0FF33 mov r3, #-1 + 961 001c 82B2 uxth r2, r0 + 962 001e 01A9 add r1, sp, #4 + 963 0020 1748 ldr r0, .L62+4 + 964 0022 FFF7FEFF bl HAL_UART_Transmit + 965 .LVL84: + 210:Core/Src/main.c **** char newline[] = "\r\n"; + 966 .loc 1 210 7 is_stmt 1 view .LVU203 + 210:Core/Src/main.c **** char newline[] = "\r\n"; + 967 .loc 1 210 17 is_stmt 0 view .LVU204 + 968 0026 04F00F03 and r3, r4, #15 + 210:Core/Src/main.c **** char newline[] = "\r\n"; + 969 .loc 1 210 10 view .LVU205 + 970 002a 0F2B cmp r3, #15 + 971 002c 14D0 beq .L60 + 972 .L57: + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 973 .loc 1 200 38 is_stmt 1 discriminator 2 view .LVU206 + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 974 .loc 1 200 42 is_stmt 0 discriminator 2 view .LVU207 + 975 002e 0134 adds r4, r4, #1 + 976 .LVL85: + 977 .L55: + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 978 .loc 1 200 22 is_stmt 1 discriminator 1 view .LVU208 + 200:Core/Src/main.c **** byte = Flash_ReadByte(addr); + 979 .loc 1 200 3 is_stmt 0 discriminator 1 view .LVU209 + 980 0030 B4F5002F cmp r4, #524288 + ARM GAS /tmp/ccPiCTjg.s page 28 + + + 981 0034 1FDA bge .L61 + 201:Core/Src/main.c **** + 982 .loc 1 201 5 is_stmt 1 view .LVU210 + 201:Core/Src/main.c **** + 983 .loc 1 201 12 is_stmt 0 view .LVU211 + 984 0036 2046 mov r0, r4 + 985 0038 FFF7FEFF bl Flash_ReadByte + 986 .LVL86: + 201:Core/Src/main.c **** + 987 .loc 1 201 10 view .LVU212 + 988 003c C2B2 uxtb r2, r0 + 989 003e 8DF80F20 strb r2, [sp, #15] + 203:Core/Src/main.c **** // Send as raw byte: + 990 .loc 1 203 5 is_stmt 1 view .LVU213 + 203:Core/Src/main.c **** // Send as raw byte: + 991 .loc 1 203 7 is_stmt 0 view .LVU214 + 992 0042 002D cmp r5, #0 + 993 0044 E1D1 bne .L56 + 205:Core/Src/main.c **** }else{ + 994 .loc 1 205 7 is_stmt 1 view .LVU215 + 995 0046 4FF0FF33 mov r3, #-1 + 996 004a 0122 movs r2, #1 + 997 004c 0DF10F01 add r1, sp, #15 + 998 0050 0B48 ldr r0, .L62+4 + 999 0052 FFF7FEFF bl HAL_UART_Transmit + 1000 .LVL87: + 1001 0056 EAE7 b .L57 + 1002 .L60: + 1003 .LBB13: + 211:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)newline, 2, HAL_MAX_DELAY); + 1004 .loc 1 211 9 view .LVU216 + 211:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)newline, 2, HAL_MAX_DELAY); + 1005 .loc 1 211 14 is_stmt 0 view .LVU217 + 1006 0058 0A4B ldr r3, .L62+8 + 1007 005a 1B68 ldr r3, [r3] + 1008 005c ADF80030 strh r3, [sp] @ movhi + 1009 0060 1B0C lsrs r3, r3, #16 + 1010 0062 8DF80230 strb r3, [sp, #2] + 212:Core/Src/main.c **** } + 1011 .loc 1 212 9 is_stmt 1 view .LVU218 + 1012 0066 4FF0FF33 mov r3, #-1 + 1013 006a 0222 movs r2, #2 + 1014 006c 6946 mov r1, sp + 1015 006e 0448 ldr r0, .L62+4 + 1016 0070 FFF7FEFF bl HAL_UART_Transmit + 1017 .LVL88: + 1018 0074 DBE7 b .L57 + 1019 .L61: + 212:Core/Src/main.c **** } + 1020 .loc 1 212 9 is_stmt 0 view .LVU219 + 1021 .LBE13: + 1022 .LBE12: + 216:Core/Src/main.c **** + 1023 .loc 1 216 1 view .LVU220 + 1024 0076 05B0 add sp, sp, #20 + 1025 .LCFI23: + 1026 .cfi_def_cfa_offset 12 + ARM GAS /tmp/ccPiCTjg.s page 29 + + + 1027 @ sp needed + 1028 0078 30BD pop {r4, r5, pc} + 1029 .LVL89: + 1030 .L63: + 216:Core/Src/main.c **** + 1031 .loc 1 216 1 view .LVU221 + 1032 007a 00BF .align 2 + 1033 .L62: + 1034 007c 00000000 .word .LC2 + 1035 0080 00000000 .word .LANCHOR1 + 1036 0084 08000000 .word .LC3 + 1037 .cfi_endproc + 1038 .LFE145: + 1040 .section .text.Address_Pins_Init,"ax",%progbits + 1041 .align 1 + 1042 .global Address_Pins_Init + 1043 .syntax unified + 1044 .thumb + 1045 .thumb_func + 1046 .fpu fpv4-sp-d16 + 1048 Address_Pins_Init: + 1049 .LFB152: + 333:Core/Src/main.c **** GPIO_InitTypeDef GPIOC_InitStruct = {0}; + 1050 .loc 1 333 29 is_stmt 1 view -0 + 1051 .cfi_startproc + 1052 @ args = 0, pretend = 0, frame = 40 + 1053 @ frame_needed = 0, uses_anonymous_args = 0 + 1054 0000 70B5 push {r4, r5, r6, lr} + 1055 .LCFI24: + 1056 .cfi_def_cfa_offset 16 + 1057 .cfi_offset 4, -16 + 1058 .cfi_offset 5, -12 + 1059 .cfi_offset 6, -8 + 1060 .cfi_offset 14, -4 + 1061 0002 8AB0 sub sp, sp, #40 + 1062 .LCFI25: + 1063 .cfi_def_cfa_offset 56 + 334:Core/Src/main.c **** // Configure PC0..PC15 as push-pull outputs + 1064 .loc 1 334 3 view .LVU223 + 334:Core/Src/main.c **** // Configure PC0..PC15 as push-pull outputs + 1065 .loc 1 334 20 is_stmt 0 view .LVU224 + 1066 0004 0024 movs r4, #0 + 1067 0006 0594 str r4, [sp, #20] + 1068 0008 0694 str r4, [sp, #24] + 1069 000a 0794 str r4, [sp, #28] + 1070 000c 0894 str r4, [sp, #32] + 1071 000e 0994 str r4, [sp, #36] + 336:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | + 1072 .loc 1 336 3 is_stmt 1 view .LVU225 + 336:Core/Src/main.c **** GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6 | GPIO_PIN_7 | + 1073 .loc 1 336 24 is_stmt 0 view .LVU226 + 1074 0010 4FF6FF73 movw r3, #65535 + 1075 0014 0593 str r3, [sp, #20] + 340:Core/Src/main.c **** GPIOC_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 1076 .loc 1 340 3 is_stmt 1 view .LVU227 + 340:Core/Src/main.c **** GPIOC_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 1077 .loc 1 340 25 is_stmt 0 view .LVU228 + ARM GAS /tmp/ccPiCTjg.s page 30 + + + 1078 0016 0126 movs r6, #1 + 1079 0018 0696 str r6, [sp, #24] + 341:Core/Src/main.c **** GPIOC_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 1080 .loc 1 341 3 is_stmt 1 view .LVU229 + 342:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIOC_InitStruct); + 1081 .loc 1 342 3 view .LVU230 + 342:Core/Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIOC_InitStruct); + 1082 .loc 1 342 26 is_stmt 0 view .LVU231 + 1083 001a 0225 movs r5, #2 + 1084 001c 0895 str r5, [sp, #32] + 343:Core/Src/main.c **** + 1085 .loc 1 343 3 is_stmt 1 view .LVU232 + 1086 001e 05A9 add r1, sp, #20 + 1087 0020 0848 ldr r0, .L66 + 1088 0022 FFF7FEFF bl HAL_GPIO_Init + 1089 .LVL90: + 346:Core/Src/main.c **** // Configure PB0..PB2 as push-pull outputs + 1090 .loc 1 346 3 view .LVU233 + 346:Core/Src/main.c **** // Configure PB0..PB2 as push-pull outputs + 1091 .loc 1 346 20 is_stmt 0 view .LVU234 + 1092 0026 0094 str r4, [sp] + 1093 0028 0194 str r4, [sp, #4] + 1094 002a 0294 str r4, [sp, #8] + 1095 002c 0394 str r4, [sp, #12] + 1096 002e 0494 str r4, [sp, #16] + 348:Core/Src/main.c **** GPIOB_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 1097 .loc 1 348 3 is_stmt 1 view .LVU235 + 348:Core/Src/main.c **** GPIOB_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 1098 .loc 1 348 24 is_stmt 0 view .LVU236 + 1099 0030 1F23 movs r3, #31 + 1100 0032 0093 str r3, [sp] + 349:Core/Src/main.c **** GPIOB_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 1101 .loc 1 349 3 is_stmt 1 view .LVU237 + 349:Core/Src/main.c **** GPIOB_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 1102 .loc 1 349 25 is_stmt 0 view .LVU238 + 1103 0034 0196 str r6, [sp, #4] + 350:Core/Src/main.c **** GPIOB_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 1104 .loc 1 350 3 is_stmt 1 view .LVU239 + 351:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIOB_InitStruct); + 1105 .loc 1 351 3 view .LVU240 + 351:Core/Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIOB_InitStruct); + 1106 .loc 1 351 26 is_stmt 0 view .LVU241 + 1107 0036 0395 str r5, [sp, #12] + 352:Core/Src/main.c **** } + 1108 .loc 1 352 3 is_stmt 1 view .LVU242 + 1109 0038 6946 mov r1, sp + 1110 003a 0348 ldr r0, .L66+4 + 1111 003c FFF7FEFF bl HAL_GPIO_Init + 1112 .LVL91: + 353:Core/Src/main.c **** + 1113 .loc 1 353 1 is_stmt 0 view .LVU243 + 1114 0040 0AB0 add sp, sp, #40 + 1115 .LCFI26: + 1116 .cfi_def_cfa_offset 16 + 1117 @ sp needed + 1118 0042 70BD pop {r4, r5, r6, pc} + 1119 .L67: + ARM GAS /tmp/ccPiCTjg.s page 31 + + + 1120 .align 2 + 1121 .L66: + 1122 0044 00080240 .word 1073874944 + 1123 0048 00040240 .word 1073873920 + 1124 .cfi_endproc + 1125 .LFE152: + 1127 .section .text.Command_Pins_Init,"ax",%progbits + 1128 .align 1 + 1129 .global Command_Pins_Init + 1130 .syntax unified + 1131 .thumb + 1132 .thumb_func + 1133 .fpu fpv4-sp-d16 + 1135 Command_Pins_Init: + 1136 .LFB153: + 355:Core/Src/main.c **** // PA8-10 as outputs pins + 1137 .loc 1 355 29 is_stmt 1 view -0 + 1138 .cfi_startproc + 1139 @ args = 0, pretend = 0, frame = 24 + 1140 @ frame_needed = 0, uses_anonymous_args = 0 + 1141 0000 00B5 push {lr} + 1142 .LCFI27: + 1143 .cfi_def_cfa_offset 4 + 1144 .cfi_offset 14, -4 + 1145 0002 87B0 sub sp, sp, #28 + 1146 .LCFI28: + 1147 .cfi_def_cfa_offset 32 + 357:Core/Src/main.c **** GPIOA_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10; + 1148 .loc 1 357 3 view .LVU245 + 357:Core/Src/main.c **** GPIOA_InitStruct.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10; + 1149 .loc 1 357 20 is_stmt 0 view .LVU246 + 1150 0004 0023 movs r3, #0 + 1151 0006 0193 str r3, [sp, #4] + 1152 0008 0293 str r3, [sp, #8] + 1153 000a 0393 str r3, [sp, #12] + 1154 000c 0493 str r3, [sp, #16] + 1155 000e 0593 str r3, [sp, #20] + 358:Core/Src/main.c **** GPIOA_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 1156 .loc 1 358 3 is_stmt 1 view .LVU247 + 358:Core/Src/main.c **** GPIOA_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; // Push-pull output + 1157 .loc 1 358 24 is_stmt 0 view .LVU248 + 1158 0010 4FF4E063 mov r3, #1792 + 1159 0014 0193 str r3, [sp, #4] + 359:Core/Src/main.c **** GPIOA_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 1160 .loc 1 359 3 is_stmt 1 view .LVU249 + 359:Core/Src/main.c **** GPIOA_InitStruct.Pull = GPIO_NOPULL; // No pull-up/down + 1161 .loc 1 359 25 is_stmt 0 view .LVU250 + 1162 0016 0123 movs r3, #1 + 1163 0018 0293 str r3, [sp, #8] + 360:Core/Src/main.c **** GPIOA_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; // Fast switching + 1164 .loc 1 360 3 is_stmt 1 view .LVU251 + 361:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIOA_InitStruct); + 1165 .loc 1 361 3 view .LVU252 + 361:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIOA_InitStruct); + 1166 .loc 1 361 26 is_stmt 0 view .LVU253 + 1167 001a 0223 movs r3, #2 + 1168 001c 0493 str r3, [sp, #16] + ARM GAS /tmp/ccPiCTjg.s page 32 + + + 362:Core/Src/main.c **** } + 1169 .loc 1 362 3 is_stmt 1 view .LVU254 + 1170 001e 01A9 add r1, sp, #4 + 1171 0020 0248 ldr r0, .L70 + 1172 0022 FFF7FEFF bl HAL_GPIO_Init + 1173 .LVL92: + 363:Core/Src/main.c **** + 1174 .loc 1 363 1 is_stmt 0 view .LVU255 + 1175 0026 07B0 add sp, sp, #28 + 1176 .LCFI29: + 1177 .cfi_def_cfa_offset 4 + 1178 @ sp needed + 1179 0028 5DF804FB ldr pc, [sp], #4 + 1180 .L71: + 1181 .align 2 + 1182 .L70: + 1183 002c 00000240 .word 1073872896 + 1184 .cfi_endproc + 1185 .LFE153: + 1187 .section .text.debug_print,"ax",%progbits + 1188 .align 1 + 1189 .global debug_print + 1190 .syntax unified + 1191 .thumb + 1192 .thumb_func + 1193 .fpu fpv4-sp-d16 + 1195 debug_print: + 1196 .LVL93: + 1197 .LFB154: + 365:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY); + 1198 .loc 1 365 35 is_stmt 1 view -0 + 1199 .cfi_startproc + 1200 @ args = 0, pretend = 0, frame = 0 + 1201 @ frame_needed = 0, uses_anonymous_args = 0 + 365:Core/Src/main.c **** HAL_UART_Transmit(&huart2, (uint8_t*)msg, strlen(msg), HAL_MAX_DELAY); + 1202 .loc 1 365 35 is_stmt 0 view .LVU257 + 1203 0000 10B5 push {r4, lr} + 1204 .LCFI30: + 1205 .cfi_def_cfa_offset 8 + 1206 .cfi_offset 4, -8 + 1207 .cfi_offset 14, -4 + 1208 0002 0446 mov r4, r0 + 366:Core/Src/main.c **** } + 1209 .loc 1 366 3 is_stmt 1 view .LVU258 + 366:Core/Src/main.c **** } + 1210 .loc 1 366 45 is_stmt 0 view .LVU259 + 1211 0004 FFF7FEFF bl strlen + 1212 .LVL94: + 366:Core/Src/main.c **** } + 1213 .loc 1 366 3 view .LVU260 + 1214 0008 4FF0FF33 mov r3, #-1 + 1215 000c 82B2 uxth r2, r0 + 1216 000e 2146 mov r1, r4 + 1217 0010 0148 ldr r0, .L74 + 1218 0012 FFF7FEFF bl HAL_UART_Transmit + 1219 .LVL95: + 367:Core/Src/main.c **** + ARM GAS /tmp/ccPiCTjg.s page 33 + + + 1220 .loc 1 367 1 view .LVU261 + 1221 0016 10BD pop {r4, pc} + 1222 .LVL96: + 1223 .L75: + 367:Core/Src/main.c **** + 1224 .loc 1 367 1 view .LVU262 + 1225 .align 2 + 1226 .L74: + 1227 0018 00000000 .word .LANCHOR1 + 1228 .cfi_endproc + 1229 .LFE154: + 1231 .section .rodata.Flash_From_UART.str1.4,"aMS",%progbits,1 + 1232 .align 2 + 1233 .LC4: + 1234 0000 57616974 .ascii "Waiting for file to flash...\015\012\000" + 1234 696E6720 + 1234 666F7220 + 1234 66696C65 + 1234 20746F20 + 1235 001f 00 .align 2 + 1236 .LC5: + 1237 0020 66696E69 .ascii "finished\015\012\000" + 1237 73686564 + 1237 0D0A00 + 1238 .section .text.Flash_From_UART,"ax",%progbits + 1239 .align 1 + 1240 .global Flash_From_UART + 1241 .syntax unified + 1242 .thumb + 1243 .thumb_func + 1244 .fpu fpv4-sp-d16 + 1246 Flash_From_UART: + 1247 .LFB148: + 237:Core/Src/main.c **** debug_print("Waiting for file to flash...\r\n"); + 1248 .loc 1 237 27 is_stmt 1 view -0 + 1249 .cfi_startproc + 1250 @ args = 0, pretend = 0, frame = 8 + 1251 @ frame_needed = 0, uses_anonymous_args = 0 + 1252 0000 10B5 push {r4, lr} + 1253 .LCFI31: + 1254 .cfi_def_cfa_offset 8 + 1255 .cfi_offset 4, -8 + 1256 .cfi_offset 14, -4 + 1257 0002 82B0 sub sp, sp, #8 + 1258 .LCFI32: + 1259 .cfi_def_cfa_offset 16 + 238:Core/Src/main.c **** uint8_t byte; + 1260 .loc 1 238 3 view .LVU264 + 1261 0004 0C48 ldr r0, .L80 + 1262 0006 FFF7FEFF bl debug_print + 1263 .LVL97: + 239:Core/Src/main.c **** for(int i=0; i<8; i++){ + 1264 .loc 1 239 3 view .LVU265 + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 1265 .loc 1 240 3 view .LVU266 + 1266 .LBB14: + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + ARM GAS /tmp/ccPiCTjg.s page 34 + + + 1267 .loc 1 240 7 view .LVU267 + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 1268 .loc 1 240 11 is_stmt 0 view .LVU268 + 1269 000a 0024 movs r4, #0 + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 1270 .loc 1 240 3 view .LVU269 + 1271 000c 0DE0 b .L77 + 1272 .LVL98: + 1273 .L78: + 241:Core/Src/main.c **** Chip_Program_Byte(i, (int)byte); + 1274 .loc 1 241 5 is_stmt 1 discriminator 3 view .LVU270 + 1275 000e 4FF0FF33 mov r3, #-1 + 1276 0012 0122 movs r2, #1 + 1277 0014 0DF10701 add r1, sp, #7 + 1278 0018 0848 ldr r0, .L80+4 + 1279 001a FFF7FEFF bl HAL_UART_Receive + 1280 .LVL99: + 242:Core/Src/main.c **** } + 1281 .loc 1 242 5 discriminator 3 view .LVU271 + 1282 001e 9DF80710 ldrb r1, [sp, #7] @ zero_extendqisi2 + 1283 0022 2046 mov r0, r4 + 1284 0024 FFF7FEFF bl Chip_Program_Byte + 1285 .LVL100: + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 1286 .loc 1 240 21 discriminator 3 view .LVU272 + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 1287 .loc 1 240 22 is_stmt 0 discriminator 3 view .LVU273 + 1288 0028 0134 adds r4, r4, #1 + 1289 .LVL101: + 1290 .L77: + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 1291 .loc 1 240 16 is_stmt 1 discriminator 1 view .LVU274 + 240:Core/Src/main.c **** HAL_UART_Receive(&huart2, &byte, 1, HAL_MAX_DELAY); + 1292 .loc 1 240 3 is_stmt 0 discriminator 1 view .LVU275 + 1293 002a 072C cmp r4, #7 + 1294 002c EFDD ble .L78 + 1295 .LBE14: + 244:Core/Src/main.c **** } + 1296 .loc 1 244 3 is_stmt 1 view .LVU276 + 1297 002e 0448 ldr r0, .L80+8 + 1298 0030 FFF7FEFF bl debug_print + 1299 .LVL102: + 245:Core/Src/main.c **** + 1300 .loc 1 245 1 is_stmt 0 view .LVU277 + 1301 0034 02B0 add sp, sp, #8 + 1302 .LCFI33: + 1303 .cfi_def_cfa_offset 8 + 1304 @ sp needed + 1305 0036 10BD pop {r4, pc} + 1306 .LVL103: + 1307 .L81: + 245:Core/Src/main.c **** + 1308 .loc 1 245 1 view .LVU278 + 1309 .align 2 + 1310 .L80: + 1311 0038 00000000 .word .LC4 + 1312 003c 00000000 .word .LANCHOR1 + ARM GAS /tmp/ccPiCTjg.s page 35 + + + 1313 0040 20000000 .word .LC5 + 1314 .cfi_endproc + 1315 .LFE148: + 1317 .section .text.Error_Handler,"ax",%progbits + 1318 .align 1 + 1319 .global Error_Handler + 1320 .syntax unified + 1321 .thumb + 1322 .thumb_func + 1323 .fpu fpv4-sp-d16 + 1325 Error_Handler: + 1326 .LFB156: + 398:Core/Src/main.c **** + 399:Core/Src/main.c **** + 400:Core/Src/main.c **** /** + 401:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. + 402:Core/Src/main.c **** * @retval None + 403:Core/Src/main.c **** */ + 404:Core/Src/main.c **** void Error_Handler(void) + 405:Core/Src/main.c **** { + 1327 .loc 1 405 1 is_stmt 1 view -0 + 1328 .cfi_startproc + 1329 @ Volatile: function does not return. + 1330 @ args = 0, pretend = 0, frame = 0 + 1331 @ frame_needed = 0, uses_anonymous_args = 0 + 1332 @ link register save eliminated. + 406:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ + 407:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ + 408:Core/Src/main.c **** __disable_irq(); + 1333 .loc 1 408 3 view .LVU280 + 1334 .LBB15: + 1335 .LBI15: + 1336 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file @@ -1598,6 +2098,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccPiCTjg.s page 36 + + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1618,9 +2121,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline - ARM GAS /tmp/ccg6eVgO.s page 28 - - 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline @@ -1658,6 +2158,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + ARM GAS /tmp/ccPiCTjg.s page 37 + + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- @@ -1678,9 +2181,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccg6eVgO.s page 29 - - 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" @@ -1718,6 +2218,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 136:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t const* src; 137:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t* dest; 138:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t wlen; + ARM GAS /tmp/ccPiCTjg.s page 38 + + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** } __copy_table_t; 140:Drivers/CMSIS/Include/cmsis_gcc.h **** 141:Drivers/CMSIS/Include/cmsis_gcc.h **** typedef struct { @@ -1738,9 +2241,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 156:Drivers/CMSIS/Include/cmsis_gcc.h **** 157:Drivers/CMSIS/Include/cmsis_gcc.h **** for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable 158:Drivers/CMSIS/Include/cmsis_gcc.h **** for(uint32_t i=0u; iwlen; ++i) { - ARM GAS /tmp/ccg6eVgO.s page 30 - - 159:Drivers/CMSIS/Include/cmsis_gcc.h **** pTable->dest[i] = 0u; 160:Drivers/CMSIS/Include/cmsis_gcc.h **** } 161:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -1778,6 +2278,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 193:Drivers/CMSIS/Include/cmsis_gcc.h **** 194:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __TZ_STACK_SEAL_VALUE 195:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __TZ_STACK_SEAL_VALUE 0xFEF5EDA5FEF5EDA5ULL + ARM GAS /tmp/ccPiCTjg.s page 39 + + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 197:Drivers/CMSIS/Include/cmsis_gcc.h **** 198:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1798,9 +2301,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 213:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 214:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 215:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) - ARM GAS /tmp/ccg6eVgO.s page 31 - - 216:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 217:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 218:Drivers/CMSIS/Include/cmsis_gcc.h **** #else @@ -1838,6 +2338,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** 252:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccPiCTjg.s page 40 + + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 254:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 255:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, @@ -1858,9 +2361,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 270:Drivers/CMSIS/Include/cmsis_gcc.h **** { 271:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 272:Drivers/CMSIS/Include/cmsis_gcc.h **** } - ARM GAS /tmp/ccg6eVgO.s page 32 - - 273:Drivers/CMSIS/Include/cmsis_gcc.h **** 274:Drivers/CMSIS/Include/cmsis_gcc.h **** 275:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -1898,6 +2398,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 307:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 308:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 309:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value + ARM GAS /tmp/ccPiCTjg.s page 41 + + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 311:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 312:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -1918,9 +2421,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 327:Drivers/CMSIS/Include/cmsis_gcc.h **** { 328:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 329:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); - ARM GAS /tmp/ccg6eVgO.s page 33 - - 330:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 331:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 332:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -1958,6 +2458,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 364:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 365:Drivers/CMSIS/Include/cmsis_gcc.h **** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccPiCTjg.s page 42 + + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 369:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. @@ -1978,9 +2481,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 384:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 385:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 386:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccg6eVgO.s page 34 - - 387:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 388:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 389:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; @@ -2018,6 +2518,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 421:Drivers/CMSIS/Include/cmsis_gcc.h **** 422:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 423:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + ARM GAS /tmp/ccPiCTjg.s page 43 + + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 425:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 426:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -2038,9 +2541,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 441:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 442:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 443:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccg6eVgO.s page 35 - - 444:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 445:Drivers/CMSIS/Include/cmsis_gcc.h **** } 446:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -2078,6 +2578,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); + ARM GAS /tmp/ccPiCTjg.s page 44 + + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -2098,9 +2601,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 498:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 499:Drivers/CMSIS/Include/cmsis_gcc.h **** } 500:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccg6eVgO.s page 36 - - 501:Drivers/CMSIS/Include/cmsis_gcc.h **** 502:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 503:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) @@ -2138,6 +2638,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 537:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Remove the exclusive lock + ARM GAS /tmp/ccPiCTjg.s page 45 + + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Removes the exclusive lock which is created by LDREX. 539:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 540:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __CLREX(void) @@ -2158,9 +2661,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Signed Saturate 556:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates a signed value. 557:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG1 Value to be saturated - ARM GAS /tmp/ccg6eVgO.s page 37 - - 558:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ARG2 Bit position to saturate to (1..32) 559:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 560:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -2198,6 +2698,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 592:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 593:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RRX(uint32_t value) 594:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccPiCTjg.s page 46 + + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 596:Drivers/CMSIS/Include/cmsis_gcc.h **** 597:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); @@ -2218,9 +2721,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 612:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 613:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) ); 614:Drivers/CMSIS/Include/cmsis_gcc.h **** #else - ARM GAS /tmp/ccg6eVgO.s page 38 - - 615:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 616:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 617:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -2258,6 +2758,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 649:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 650:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 651:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccPiCTjg.s page 47 + + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr) 653:Drivers/CMSIS/Include/cmsis_gcc.h **** { 654:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -2278,9 +2781,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 669:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) ); 670:Drivers/CMSIS/Include/cmsis_gcc.h **** } 671:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccg6eVgO.s page 39 - - 672:Drivers/CMSIS/Include/cmsis_gcc.h **** 673:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 674:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STRT Unprivileged (16 bit) @@ -2318,6 +2818,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 706:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 707:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat) 708:Drivers/CMSIS/Include/cmsis_gcc.h **** { + ARM GAS /tmp/ccPiCTjg.s page 48 + + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** if ((sat >= 1U) && (sat <= 32U)) 710:Drivers/CMSIS/Include/cmsis_gcc.h **** { 711:Drivers/CMSIS/Include/cmsis_gcc.h **** const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U); @@ -2338,9 +2841,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 726:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Unsigned Saturate 727:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Saturates an unsigned value. 728:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to be saturated - ARM GAS /tmp/ccg6eVgO.s page 40 - - 729:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] sat Bit position to saturate to (0..31) 730:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Saturated value 731:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -2378,6 +2878,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 763:Drivers/CMSIS/Include/cmsis_gcc.h **** { 764:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 765:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccPiCTjg.s page 49 + + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); 767:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); 768:Drivers/CMSIS/Include/cmsis_gcc.h **** } @@ -2398,9 +2901,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 783:Drivers/CMSIS/Include/cmsis_gcc.h **** } 784:Drivers/CMSIS/Include/cmsis_gcc.h **** 785:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccg6eVgO.s page 41 - - 786:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Load-Acquire (32 bit) 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a LDA instruction for 32 bit values. @@ -2438,6 +2938,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 820:Drivers/CMSIS/Include/cmsis_gcc.h **** { 821:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" ); 822:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccPiCTjg.s page 50 + + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** 824:Drivers/CMSIS/Include/cmsis_gcc.h **** 825:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -2458,9 +2961,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 841:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 842:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccg6eVgO.s page 42 - - 843:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr) 844:Drivers/CMSIS/Include/cmsis_gcc.h **** { 845:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; @@ -2498,6 +2998,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" ); 878:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 879:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccPiCTjg.s page 51 + + 880:Drivers/CMSIS/Include/cmsis_gcc.h **** 881:Drivers/CMSIS/Include/cmsis_gcc.h **** 882:Drivers/CMSIS/Include/cmsis_gcc.h **** /** @@ -2518,9 +3021,6 @@ ARM GAS /tmp/ccg6eVgO.s page 1 897:Drivers/CMSIS/Include/cmsis_gcc.h **** 898:Drivers/CMSIS/Include/cmsis_gcc.h **** 899:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccg6eVgO.s page 43 - - 900:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Store-Release Exclusive (16 bit) 901:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a STLH exclusive instruction for 16 bit values. 902:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store @@ -2558,6 +3058,9 @@ ARM GAS /tmp/ccg6eVgO.s page 1 934:Drivers/CMSIS/Include/cmsis_gcc.h **** 935:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@}*/ /* end of group CMSIS_Core_InstructionInterface */ 936:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccPiCTjg.s page 52 + + 937:Drivers/CMSIS/Include/cmsis_gcc.h **** 938:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 939:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface @@ -2578,645 +3081,849 @@ ARM GAS /tmp/ccg6eVgO.s page 1 954:Drivers/CMSIS/Include/cmsis_gcc.h **** 955:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 956:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts - ARM GAS /tmp/ccg6eVgO.s page 44 - - 957:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting special-purpose register PRIMASK. 958:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 959:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 960:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) - 1002 .loc 2 960 27 view .LVU215 - 1003 .LBB13: + 1337 .loc 2 960 27 view .LVU281 + 1338 .LBB16: 961:Drivers/CMSIS/Include/cmsis_gcc.h **** { 962:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); - 1004 .loc 2 962 3 view .LVU216 - 1005 .syntax unified - 1006 @ 962 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 1007 0000 72B6 cpsid i - 1008 @ 0 "" 2 - 1009 .thumb - 1010 .syntax unified - 1011 .L63: - 1012 .LBE13: - 1013 .LBE12: - 333:Core/Src/main.c **** while (1) - 1014 .loc 1 333 3 discriminator 1 view .LVU217 - 334:Core/Src/main.c **** { - 335:Core/Src/main.c **** } - 1015 .loc 1 335 3 discriminator 1 view .LVU218 - 333:Core/Src/main.c **** while (1) - 1016 .loc 1 333 9 discriminator 1 view .LVU219 - 1017 0002 FEE7 b .L63 - 1018 .cfi_endproc - 1019 .LFE152: - 1021 .section .text.MX_USART2_UART_Init,"ax",%progbits - 1022 .align 1 - 1023 .syntax unified - 1024 .thumb - 1025 .thumb_func - 1026 .fpu fpv4-sp-d16 - 1028 MX_USART2_UART_Init: - 1029 .LFB146: - 223:Core/Src/main.c **** huart2.Instance = USART2; - 1030 .loc 1 223 1 view -0 - 1031 .cfi_startproc - 1032 @ args = 0, pretend = 0, frame = 0 - 1033 @ frame_needed = 0, uses_anonymous_args = 0 - 1034 0000 08B5 push {r3, lr} - 1035 .LCFI26: - 1036 .cfi_def_cfa_offset 8 - 1037 .cfi_offset 3, -8 - 1038 .cfi_offset 14, -4 - 224:Core/Src/main.c **** huart2.Init.BaudRate = 115200; - 1039 .loc 1 224 3 view .LVU221 - 224:Core/Src/main.c **** huart2.Init.BaudRate = 115200; - 1040 .loc 1 224 19 is_stmt 0 view .LVU222 - 1041 0002 0A48 ldr r0, .L68 - 1042 0004 0A4B ldr r3, .L68+4 - 1043 0006 0360 str r3, [r0] - 225:Core/Src/main.c **** huart2.Init.WordLength = UART_WORDLENGTH_8B; - 1044 .loc 1 225 3 is_stmt 1 view .LVU223 - 225:Core/Src/main.c **** huart2.Init.WordLength = UART_WORDLENGTH_8B; - 1045 .loc 1 225 24 is_stmt 0 view .LVU224 - ARM GAS /tmp/ccg6eVgO.s page 45 - - - 1046 0008 4FF4E133 mov r3, #115200 - 1047 000c 4360 str r3, [r0, #4] - 226:Core/Src/main.c **** huart2.Init.StopBits = UART_STOPBITS_1; - 1048 .loc 1 226 3 is_stmt 1 view .LVU225 - 226:Core/Src/main.c **** huart2.Init.StopBits = UART_STOPBITS_1; - 1049 .loc 1 226 26 is_stmt 0 view .LVU226 - 1050 000e 0023 movs r3, #0 - 1051 0010 8360 str r3, [r0, #8] - 227:Core/Src/main.c **** huart2.Init.Parity = UART_PARITY_NONE; - 1052 .loc 1 227 3 is_stmt 1 view .LVU227 - 227:Core/Src/main.c **** huart2.Init.Parity = UART_PARITY_NONE; - 1053 .loc 1 227 24 is_stmt 0 view .LVU228 - 1054 0012 C360 str r3, [r0, #12] - 228:Core/Src/main.c **** huart2.Init.Mode = UART_MODE_TX_RX; - 1055 .loc 1 228 3 is_stmt 1 view .LVU229 - 228:Core/Src/main.c **** huart2.Init.Mode = UART_MODE_TX_RX; - 1056 .loc 1 228 22 is_stmt 0 view .LVU230 - 1057 0014 0361 str r3, [r0, #16] - 229:Core/Src/main.c **** huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 1058 .loc 1 229 3 is_stmt 1 view .LVU231 - 229:Core/Src/main.c **** huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 1059 .loc 1 229 20 is_stmt 0 view .LVU232 - 1060 0016 0C22 movs r2, #12 - 1061 0018 4261 str r2, [r0, #20] - 230:Core/Src/main.c **** huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 1062 .loc 1 230 3 is_stmt 1 view .LVU233 - 230:Core/Src/main.c **** huart2.Init.OverSampling = UART_OVERSAMPLING_16; - 1063 .loc 1 230 25 is_stmt 0 view .LVU234 - 1064 001a 8361 str r3, [r0, #24] - 231:Core/Src/main.c **** if (HAL_UART_Init(&huart2) != HAL_OK) - 1065 .loc 1 231 3 is_stmt 1 view .LVU235 - 231:Core/Src/main.c **** if (HAL_UART_Init(&huart2) != HAL_OK) - 1066 .loc 1 231 28 is_stmt 0 view .LVU236 - 1067 001c C361 str r3, [r0, #28] - 232:Core/Src/main.c **** { - 1068 .loc 1 232 3 is_stmt 1 view .LVU237 - 232:Core/Src/main.c **** { - 1069 .loc 1 232 7 is_stmt 0 view .LVU238 - 1070 001e FFF7FEFF bl HAL_UART_Init - 1071 .LVL72: - 232:Core/Src/main.c **** { - 1072 .loc 1 232 6 view .LVU239 - 1073 0022 00B9 cbnz r0, .L67 - 237:Core/Src/main.c **** - 1074 .loc 1 237 1 view .LVU240 - 1075 0024 08BD pop {r3, pc} - 1076 .L67: - 234:Core/Src/main.c **** } - 1077 .loc 1 234 5 is_stmt 1 view .LVU241 - 1078 0026 FFF7FEFF bl Error_Handler - 1079 .LVL73: - 1080 .L69: - 1081 002a 00BF .align 2 - 1082 .L68: - 1083 002c 00000000 .word .LANCHOR1 - 1084 0030 00440040 .word 1073759232 - 1085 .cfi_endproc - ARM GAS /tmp/ccg6eVgO.s page 46 - - - 1086 .LFE146: - 1088 .section .text.SystemClock_Config,"ax",%progbits - 1089 .align 1 - 1090 .global SystemClock_Config - 1091 .syntax unified - 1092 .thumb - 1093 .thumb_func - 1094 .fpu fpv4-sp-d16 - 1096 SystemClock_Config: - 1097 .LFB145: - 176:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 1098 .loc 1 176 1 view -0 - 1099 .cfi_startproc - 1100 @ args = 0, pretend = 0, frame = 80 - 1101 @ frame_needed = 0, uses_anonymous_args = 0 - 1102 0000 00B5 push {lr} - 1103 .LCFI27: - 1104 .cfi_def_cfa_offset 4 - 1105 .cfi_offset 14, -4 - 1106 0002 95B0 sub sp, sp, #84 - 1107 .LCFI28: - 1108 .cfi_def_cfa_offset 88 - 177:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 1109 .loc 1 177 3 view .LVU243 - 177:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 1110 .loc 1 177 22 is_stmt 0 view .LVU244 - 1111 0004 3022 movs r2, #48 - 1112 0006 0021 movs r1, #0 - 1113 0008 08A8 add r0, sp, #32 - 1114 000a FFF7FEFF bl memset - 1115 .LVL74: - 178:Core/Src/main.c **** - 1116 .loc 1 178 3 is_stmt 1 view .LVU245 - 178:Core/Src/main.c **** - 1117 .loc 1 178 22 is_stmt 0 view .LVU246 - 1118 000e 0023 movs r3, #0 - 1119 0010 0393 str r3, [sp, #12] - 1120 0012 0493 str r3, [sp, #16] - 1121 0014 0593 str r3, [sp, #20] - 1122 0016 0693 str r3, [sp, #24] - 1123 0018 0793 str r3, [sp, #28] - 182:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - 1124 .loc 1 182 3 is_stmt 1 view .LVU247 - 1125 .LBB14: - 182:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - 1126 .loc 1 182 3 view .LVU248 - 1127 001a 0193 str r3, [sp, #4] - 182:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - 1128 .loc 1 182 3 view .LVU249 - 1129 001c 1F4A ldr r2, .L76 - 1130 001e 116C ldr r1, [r2, #64] - 1131 0020 41F08051 orr r1, r1, #268435456 - 1132 0024 1164 str r1, [r2, #64] - 182:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - 1133 .loc 1 182 3 view .LVU250 - 1134 0026 126C ldr r2, [r2, #64] - 1135 0028 02F08052 and r2, r2, #268435456 - ARM GAS /tmp/ccg6eVgO.s page 47 - - - 1136 002c 0192 str r2, [sp, #4] - 182:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - 1137 .loc 1 182 3 view .LVU251 - 1138 002e 019A ldr r2, [sp, #4] - 1139 .LBE14: - 182:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - 1140 .loc 1 182 3 view .LVU252 - 183:Core/Src/main.c **** - 1141 .loc 1 183 3 view .LVU253 - 1142 .LBB15: - 183:Core/Src/main.c **** - 1143 .loc 1 183 3 view .LVU254 - 1144 0030 0293 str r3, [sp, #8] - 183:Core/Src/main.c **** - 1145 .loc 1 183 3 view .LVU255 - 1146 0032 1B49 ldr r1, .L76+4 - 1147 0034 0A68 ldr r2, [r1] - 1148 0036 22F44042 bic r2, r2, #49152 - 1149 003a 42F40042 orr r2, r2, #32768 - 1150 003e 0A60 str r2, [r1] - 183:Core/Src/main.c **** - 1151 .loc 1 183 3 view .LVU256 - 1152 0040 0A68 ldr r2, [r1] - 1153 0042 02F44042 and r2, r2, #49152 - 1154 0046 0292 str r2, [sp, #8] - 183:Core/Src/main.c **** - 1155 .loc 1 183 3 view .LVU257 - 1156 0048 029A ldr r2, [sp, #8] - 1157 .LBE15: - 183:Core/Src/main.c **** - 1158 .loc 1 183 3 view .LVU258 - 188:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 1159 .loc 1 188 3 view .LVU259 - 188:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; - 1160 .loc 1 188 36 is_stmt 0 view .LVU260 - 1161 004a 0221 movs r1, #2 - 1162 004c 0891 str r1, [sp, #32] - 189:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 1163 .loc 1 189 3 is_stmt 1 view .LVU261 - 189:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; - 1164 .loc 1 189 30 is_stmt 0 view .LVU262 - 1165 004e 0122 movs r2, #1 - 1166 0050 0B92 str r2, [sp, #44] - 190:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 1167 .loc 1 190 3 is_stmt 1 view .LVU263 - 190:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 1168 .loc 1 190 41 is_stmt 0 view .LVU264 - 1169 0052 1022 movs r2, #16 - 1170 0054 0C92 str r2, [sp, #48] - 191:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 1171 .loc 1 191 3 is_stmt 1 view .LVU265 - 191:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; - 1172 .loc 1 191 34 is_stmt 0 view .LVU266 - 1173 0056 0E91 str r1, [sp, #56] - 192:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 16; - 1174 .loc 1 192 3 is_stmt 1 view .LVU267 - 192:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 16; - ARM GAS /tmp/ccg6eVgO.s page 48 - - - 1175 .loc 1 192 35 is_stmt 0 view .LVU268 - 1176 0058 0F93 str r3, [sp, #60] - 193:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 1177 .loc 1 193 3 is_stmt 1 view .LVU269 - 193:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; - 1178 .loc 1 193 30 is_stmt 0 view .LVU270 - 1179 005a 1092 str r2, [sp, #64] - 194:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; - 1180 .loc 1 194 3 is_stmt 1 view .LVU271 - 194:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; - 1181 .loc 1 194 30 is_stmt 0 view .LVU272 - 1182 005c 4FF4A873 mov r3, #336 - 1183 0060 1193 str r3, [sp, #68] - 195:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 1184 .loc 1 195 3 is_stmt 1 view .LVU273 - 195:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; - 1185 .loc 1 195 30 is_stmt 0 view .LVU274 - 1186 0062 0423 movs r3, #4 - 1187 0064 1293 str r3, [sp, #72] - 196:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 1188 .loc 1 196 3 is_stmt 1 view .LVU275 - 196:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 1189 .loc 1 196 30 is_stmt 0 view .LVU276 - 1190 0066 0723 movs r3, #7 - 1191 0068 1393 str r3, [sp, #76] - 197:Core/Src/main.c **** { - 1192 .loc 1 197 3 is_stmt 1 view .LVU277 - 197:Core/Src/main.c **** { - 1193 .loc 1 197 7 is_stmt 0 view .LVU278 - 1194 006a 08A8 add r0, sp, #32 - 1195 006c FFF7FEFF bl HAL_RCC_OscConfig - 1196 .LVL75: - 197:Core/Src/main.c **** { - 1197 .loc 1 197 6 view .LVU279 - 1198 0070 80B9 cbnz r0, .L74 - 204:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 1199 .loc 1 204 3 is_stmt 1 view .LVU280 - 204:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 1200 .loc 1 204 31 is_stmt 0 view .LVU281 - 1201 0072 0F23 movs r3, #15 - 1202 0074 0393 str r3, [sp, #12] - 206:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 1203 .loc 1 206 3 is_stmt 1 view .LVU282 - 206:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 1204 .loc 1 206 34 is_stmt 0 view .LVU283 - 1205 0076 0221 movs r1, #2 - 1206 0078 0491 str r1, [sp, #16] - 207:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 1207 .loc 1 207 3 is_stmt 1 view .LVU284 - 207:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; - 1208 .loc 1 207 35 is_stmt 0 view .LVU285 - 1209 007a 0023 movs r3, #0 - 1210 007c 0593 str r3, [sp, #20] - 208:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 1211 .loc 1 208 3 is_stmt 1 view .LVU286 - 208:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 1212 .loc 1 208 36 is_stmt 0 view .LVU287 - ARM GAS /tmp/ccg6eVgO.s page 49 - - - 1213 007e 4FF48052 mov r2, #4096 - 1214 0082 0692 str r2, [sp, #24] - 209:Core/Src/main.c **** - 1215 .loc 1 209 3 is_stmt 1 view .LVU288 - 209:Core/Src/main.c **** - 1216 .loc 1 209 36 is_stmt 0 view .LVU289 - 1217 0084 0793 str r3, [sp, #28] - 211:Core/Src/main.c **** { - 1218 .loc 1 211 3 is_stmt 1 view .LVU290 - 211:Core/Src/main.c **** { - 1219 .loc 1 211 7 is_stmt 0 view .LVU291 - 1220 0086 03A8 add r0, sp, #12 - 1221 0088 FFF7FEFF bl HAL_RCC_ClockConfig - 1222 .LVL76: - 211:Core/Src/main.c **** { - 1223 .loc 1 211 6 view .LVU292 - 1224 008c 20B9 cbnz r0, .L75 - 215:Core/Src/main.c **** - 1225 .loc 1 215 1 view .LVU293 - 1226 008e 15B0 add sp, sp, #84 - 1227 .LCFI29: - 1228 .cfi_remember_state - 1229 .cfi_def_cfa_offset 4 - 1230 @ sp needed - 1231 0090 5DF804FB ldr pc, [sp], #4 - 1232 .L74: - 1233 .LCFI30: - 1234 .cfi_restore_state - 199:Core/Src/main.c **** } - 1235 .loc 1 199 5 is_stmt 1 view .LVU294 - 1236 0094 FFF7FEFF bl Error_Handler - 1237 .LVL77: - 1238 .L75: - 213:Core/Src/main.c **** } - 1239 .loc 1 213 5 view .LVU295 - 1240 0098 FFF7FEFF bl Error_Handler - 1241 .LVL78: - 1242 .L77: - 1243 .align 2 - 1244 .L76: - 1245 009c 00380240 .word 1073887232 - 1246 00a0 00700040 .word 1073770496 - 1247 .cfi_endproc - 1248 .LFE145: - 1250 .section .rodata.main.str1.4,"aMS",%progbits,1 - 1251 .align 2 - 1252 .LC2: - 1253 0000 30782530 .ascii "0x%02X \015\012\000" - 1253 3258200D - 1253 0A00 - 1254 000a 0000 .align 2 - 1255 .LC3: - 1256 000c 4D616E75 .ascii "Manufacturer ID = \015\012\000" - 1256 66616374 - 1256 75726572 - 1256 20494420 - 1256 3D200D0A - ARM GAS /tmp/ccg6eVgO.s page 50 - - - 1257 0021 000000 .align 2 - 1258 .LC4: - 1259 0024 44657669 .ascii "Device ID = \015\012\000" - 1259 63652049 - 1259 44203D20 - 1259 0D0A00 - 1260 .section .text.main,"ax",%progbits - 1261 .align 1 - 1262 .global main - 1263 .syntax unified - 1264 .thumb - 1265 .thumb_func - 1266 .fpu fpv4-sp-d16 - 1268 main: - 1269 .LFB137: + 1339 .loc 2 962 3 view .LVU282 + 1340 .syntax unified + 1341 @ 962 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 1342 0000 72B6 cpsid i + 1343 @ 0 "" 2 + 1344 .thumb + 1345 .syntax unified + 1346 .L83: + 1347 .LBE16: + 1348 .LBE15: + 409:Core/Src/main.c **** while (1) + 1349 .loc 1 409 3 discriminator 1 view .LVU283 + 410:Core/Src/main.c **** { + 411:Core/Src/main.c **** } + 1350 .loc 1 411 3 discriminator 1 view .LVU284 + 409:Core/Src/main.c **** while (1) + 1351 .loc 1 409 9 discriminator 1 view .LVU285 + 1352 0002 FEE7 b .L83 + 1353 .cfi_endproc + 1354 .LFE156: + 1356 .section .text.MX_USART2_UART_Init,"ax",%progbits + 1357 .align 1 + 1358 .syntax unified + 1359 .thumb + 1360 .thumb_func + 1361 .fpu fpv4-sp-d16 + 1363 MX_USART2_UART_Init: + 1364 .LFB150: + 299:Core/Src/main.c **** huart2.Instance = USART2; + ARM GAS /tmp/ccPiCTjg.s page 53 + + + 1365 .loc 1 299 1 view -0 + 1366 .cfi_startproc + 1367 @ args = 0, pretend = 0, frame = 0 + 1368 @ frame_needed = 0, uses_anonymous_args = 0 + 1369 0000 08B5 push {r3, lr} + 1370 .LCFI34: + 1371 .cfi_def_cfa_offset 8 + 1372 .cfi_offset 3, -8 + 1373 .cfi_offset 14, -4 + 300:Core/Src/main.c **** huart2.Init.BaudRate = 115200; + 1374 .loc 1 300 3 view .LVU287 + 300:Core/Src/main.c **** huart2.Init.BaudRate = 115200; + 1375 .loc 1 300 19 is_stmt 0 view .LVU288 + 1376 0002 0A48 ldr r0, .L88 + 1377 0004 0A4B ldr r3, .L88+4 + 1378 0006 0360 str r3, [r0] + 301:Core/Src/main.c **** huart2.Init.WordLength = UART_WORDLENGTH_8B; + 1379 .loc 1 301 3 is_stmt 1 view .LVU289 + 301:Core/Src/main.c **** huart2.Init.WordLength = UART_WORDLENGTH_8B; + 1380 .loc 1 301 24 is_stmt 0 view .LVU290 + 1381 0008 4FF4E133 mov r3, #115200 + 1382 000c 4360 str r3, [r0, #4] + 302:Core/Src/main.c **** huart2.Init.StopBits = UART_STOPBITS_1; + 1383 .loc 1 302 3 is_stmt 1 view .LVU291 + 302:Core/Src/main.c **** huart2.Init.StopBits = UART_STOPBITS_1; + 1384 .loc 1 302 26 is_stmt 0 view .LVU292 + 1385 000e 0023 movs r3, #0 + 1386 0010 8360 str r3, [r0, #8] + 303:Core/Src/main.c **** huart2.Init.Parity = UART_PARITY_NONE; + 1387 .loc 1 303 3 is_stmt 1 view .LVU293 + 303:Core/Src/main.c **** huart2.Init.Parity = UART_PARITY_NONE; + 1388 .loc 1 303 24 is_stmt 0 view .LVU294 + 1389 0012 C360 str r3, [r0, #12] + 304:Core/Src/main.c **** huart2.Init.Mode = UART_MODE_TX_RX; + 1390 .loc 1 304 3 is_stmt 1 view .LVU295 + 304:Core/Src/main.c **** huart2.Init.Mode = UART_MODE_TX_RX; + 1391 .loc 1 304 22 is_stmt 0 view .LVU296 + 1392 0014 0361 str r3, [r0, #16] + 305:Core/Src/main.c **** huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 1393 .loc 1 305 3 is_stmt 1 view .LVU297 + 305:Core/Src/main.c **** huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 1394 .loc 1 305 20 is_stmt 0 view .LVU298 + 1395 0016 0C22 movs r2, #12 + 1396 0018 4261 str r2, [r0, #20] + 306:Core/Src/main.c **** huart2.Init.OverSampling = UART_OVERSAMPLING_16; + 1397 .loc 1 306 3 is_stmt 1 view .LVU299 + 306:Core/Src/main.c **** huart2.Init.OverSampling = UART_OVERSAMPLING_16; + 1398 .loc 1 306 25 is_stmt 0 view .LVU300 + 1399 001a 8361 str r3, [r0, #24] + 307:Core/Src/main.c **** if (HAL_UART_Init(&huart2) != HAL_OK) + 1400 .loc 1 307 3 is_stmt 1 view .LVU301 + 307:Core/Src/main.c **** if (HAL_UART_Init(&huart2) != HAL_OK) + 1401 .loc 1 307 28 is_stmt 0 view .LVU302 + 1402 001c C361 str r3, [r0, #28] + 308:Core/Src/main.c **** { + 1403 .loc 1 308 3 is_stmt 1 view .LVU303 + 308:Core/Src/main.c **** { + ARM GAS /tmp/ccPiCTjg.s page 54 + + + 1404 .loc 1 308 7 is_stmt 0 view .LVU304 + 1405 001e FFF7FEFF bl HAL_UART_Init + 1406 .LVL104: + 308:Core/Src/main.c **** { + 1407 .loc 1 308 6 view .LVU305 + 1408 0022 00B9 cbnz r0, .L87 + 313:Core/Src/main.c **** + 1409 .loc 1 313 1 view .LVU306 + 1410 0024 08BD pop {r3, pc} + 1411 .L87: + 310:Core/Src/main.c **** } + 1412 .loc 1 310 5 is_stmt 1 view .LVU307 + 1413 0026 FFF7FEFF bl Error_Handler + 1414 .LVL105: + 1415 .L89: + 1416 002a 00BF .align 2 + 1417 .L88: + 1418 002c 00000000 .word .LANCHOR1 + 1419 0030 00440040 .word 1073759232 + 1420 .cfi_endproc + 1421 .LFE150: + 1423 .section .text.SystemClock_Config,"ax",%progbits + 1424 .align 1 + 1425 .global SystemClock_Config + 1426 .syntax unified + 1427 .thumb + 1428 .thumb_func + 1429 .fpu fpv4-sp-d16 + 1431 SystemClock_Config: + 1432 .LFB149: + 252:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 1433 .loc 1 252 1 view -0 + 1434 .cfi_startproc + 1435 @ args = 0, pretend = 0, frame = 80 + 1436 @ frame_needed = 0, uses_anonymous_args = 0 + 1437 0000 00B5 push {lr} + 1438 .LCFI35: + 1439 .cfi_def_cfa_offset 4 + 1440 .cfi_offset 14, -4 + 1441 0002 95B0 sub sp, sp, #84 + 1442 .LCFI36: + 1443 .cfi_def_cfa_offset 88 + 253:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 1444 .loc 1 253 3 view .LVU309 + 253:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 1445 .loc 1 253 22 is_stmt 0 view .LVU310 + 1446 0004 3022 movs r2, #48 + 1447 0006 0021 movs r1, #0 + 1448 0008 08A8 add r0, sp, #32 + 1449 000a FFF7FEFF bl memset + 1450 .LVL106: + 254:Core/Src/main.c **** + 1451 .loc 1 254 3 is_stmt 1 view .LVU311 + 254:Core/Src/main.c **** + 1452 .loc 1 254 22 is_stmt 0 view .LVU312 + 1453 000e 0023 movs r3, #0 + 1454 0010 0393 str r3, [sp, #12] + ARM GAS /tmp/ccPiCTjg.s page 55 + + + 1455 0012 0493 str r3, [sp, #16] + 1456 0014 0593 str r3, [sp, #20] + 1457 0016 0693 str r3, [sp, #24] + 1458 0018 0793 str r3, [sp, #28] + 258:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + 1459 .loc 1 258 3 is_stmt 1 view .LVU313 + 1460 .LBB17: + 258:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + 1461 .loc 1 258 3 view .LVU314 + 1462 001a 0193 str r3, [sp, #4] + 258:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + 1463 .loc 1 258 3 view .LVU315 + 1464 001c 1F4A ldr r2, .L96 + 1465 001e 116C ldr r1, [r2, #64] + 1466 0020 41F08051 orr r1, r1, #268435456 + 1467 0024 1164 str r1, [r2, #64] + 258:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + 1468 .loc 1 258 3 view .LVU316 + 1469 0026 126C ldr r2, [r2, #64] + 1470 0028 02F08052 and r2, r2, #268435456 + 1471 002c 0192 str r2, [sp, #4] + 258:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + 1472 .loc 1 258 3 view .LVU317 + 1473 002e 019A ldr r2, [sp, #4] + 1474 .LBE17: + 258:Core/Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + 1475 .loc 1 258 3 view .LVU318 + 259:Core/Src/main.c **** + 1476 .loc 1 259 3 view .LVU319 + 1477 .LBB18: + 259:Core/Src/main.c **** + 1478 .loc 1 259 3 view .LVU320 + 1479 0030 0293 str r3, [sp, #8] + 259:Core/Src/main.c **** + 1480 .loc 1 259 3 view .LVU321 + 1481 0032 1B49 ldr r1, .L96+4 + 1482 0034 0A68 ldr r2, [r1] + 1483 0036 22F44042 bic r2, r2, #49152 + 1484 003a 42F40042 orr r2, r2, #32768 + 1485 003e 0A60 str r2, [r1] + 259:Core/Src/main.c **** + 1486 .loc 1 259 3 view .LVU322 + 1487 0040 0A68 ldr r2, [r1] + 1488 0042 02F44042 and r2, r2, #49152 + 1489 0046 0292 str r2, [sp, #8] + 259:Core/Src/main.c **** + 1490 .loc 1 259 3 view .LVU323 + 1491 0048 029A ldr r2, [sp, #8] + 1492 .LBE18: + 259:Core/Src/main.c **** + 1493 .loc 1 259 3 view .LVU324 + 264:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 1494 .loc 1 264 3 view .LVU325 + 264:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; + 1495 .loc 1 264 36 is_stmt 0 view .LVU326 + 1496 004a 0221 movs r1, #2 + 1497 004c 0891 str r1, [sp, #32] + ARM GAS /tmp/ccPiCTjg.s page 56 + + + 265:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 1498 .loc 1 265 3 is_stmt 1 view .LVU327 + 265:Core/Src/main.c **** RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + 1499 .loc 1 265 30 is_stmt 0 view .LVU328 + 1500 004e 0122 movs r2, #1 + 1501 0050 0B92 str r2, [sp, #44] + 266:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 1502 .loc 1 266 3 is_stmt 1 view .LVU329 + 266:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 1503 .loc 1 266 41 is_stmt 0 view .LVU330 + 1504 0052 1022 movs r2, #16 + 1505 0054 0C92 str r2, [sp, #48] + 267:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + 1506 .loc 1 267 3 is_stmt 1 view .LVU331 + 267:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + 1507 .loc 1 267 34 is_stmt 0 view .LVU332 + 1508 0056 0E91 str r1, [sp, #56] + 268:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 16; + 1509 .loc 1 268 3 is_stmt 1 view .LVU333 + 268:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 16; + 1510 .loc 1 268 35 is_stmt 0 view .LVU334 + 1511 0058 0F93 str r3, [sp, #60] + 269:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 1512 .loc 1 269 3 is_stmt 1 view .LVU335 + 269:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 336; + 1513 .loc 1 269 30 is_stmt 0 view .LVU336 + 1514 005a 1092 str r2, [sp, #64] + 270:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + 1515 .loc 1 270 3 is_stmt 1 view .LVU337 + 270:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; + 1516 .loc 1 270 30 is_stmt 0 view .LVU338 + 1517 005c 4FF4A873 mov r3, #336 + 1518 0060 1193 str r3, [sp, #68] + 271:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 1519 .loc 1 271 3 is_stmt 1 view .LVU339 + 271:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 7; + 1520 .loc 1 271 30 is_stmt 0 view .LVU340 + 1521 0062 0423 movs r3, #4 + 1522 0064 1293 str r3, [sp, #72] + 272:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 1523 .loc 1 272 3 is_stmt 1 view .LVU341 + 272:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 1524 .loc 1 272 30 is_stmt 0 view .LVU342 + 1525 0066 0723 movs r3, #7 + 1526 0068 1393 str r3, [sp, #76] + 273:Core/Src/main.c **** { + 1527 .loc 1 273 3 is_stmt 1 view .LVU343 + 273:Core/Src/main.c **** { + 1528 .loc 1 273 7 is_stmt 0 view .LVU344 + 1529 006a 08A8 add r0, sp, #32 + 1530 006c FFF7FEFF bl HAL_RCC_OscConfig + 1531 .LVL107: + 273:Core/Src/main.c **** { + 1532 .loc 1 273 6 view .LVU345 + 1533 0070 80B9 cbnz r0, .L94 + 280:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 1534 .loc 1 280 3 is_stmt 1 view .LVU346 + ARM GAS /tmp/ccPiCTjg.s page 57 + + + 280:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 1535 .loc 1 280 31 is_stmt 0 view .LVU347 + 1536 0072 0F23 movs r3, #15 + 1537 0074 0393 str r3, [sp, #12] + 282:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 1538 .loc 1 282 3 is_stmt 1 view .LVU348 + 282:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 1539 .loc 1 282 34 is_stmt 0 view .LVU349 + 1540 0076 0221 movs r1, #2 + 1541 0078 0491 str r1, [sp, #16] + 283:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + 1542 .loc 1 283 3 is_stmt 1 view .LVU350 + 283:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + 1543 .loc 1 283 35 is_stmt 0 view .LVU351 + 1544 007a 0023 movs r3, #0 + 1545 007c 0593 str r3, [sp, #20] + 284:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 1546 .loc 1 284 3 is_stmt 1 view .LVU352 + 284:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + 1547 .loc 1 284 36 is_stmt 0 view .LVU353 + 1548 007e 4FF48052 mov r2, #4096 + 1549 0082 0692 str r2, [sp, #24] + 285:Core/Src/main.c **** + 1550 .loc 1 285 3 is_stmt 1 view .LVU354 + 285:Core/Src/main.c **** + 1551 .loc 1 285 36 is_stmt 0 view .LVU355 + 1552 0084 0793 str r3, [sp, #28] + 287:Core/Src/main.c **** { + 1553 .loc 1 287 3 is_stmt 1 view .LVU356 + 287:Core/Src/main.c **** { + 1554 .loc 1 287 7 is_stmt 0 view .LVU357 + 1555 0086 03A8 add r0, sp, #12 + 1556 0088 FFF7FEFF bl HAL_RCC_ClockConfig + 1557 .LVL108: + 287:Core/Src/main.c **** { + 1558 .loc 1 287 6 view .LVU358 + 1559 008c 20B9 cbnz r0, .L95 + 291:Core/Src/main.c **** + 1560 .loc 1 291 1 view .LVU359 + 1561 008e 15B0 add sp, sp, #84 + 1562 .LCFI37: + 1563 .cfi_remember_state + 1564 .cfi_def_cfa_offset 4 + 1565 @ sp needed + 1566 0090 5DF804FB ldr pc, [sp], #4 + 1567 .L94: + 1568 .LCFI38: + 1569 .cfi_restore_state + 275:Core/Src/main.c **** } + 1570 .loc 1 275 5 is_stmt 1 view .LVU360 + 1571 0094 FFF7FEFF bl Error_Handler + 1572 .LVL109: + 1573 .L95: + 289:Core/Src/main.c **** } + 1574 .loc 1 289 5 view .LVU361 + 1575 0098 FFF7FEFF bl Error_Handler + 1576 .LVL110: + ARM GAS /tmp/ccPiCTjg.s page 58 + + + 1577 .L97: + 1578 .align 2 + 1579 .L96: + 1580 009c 00380240 .word 1073887232 + 1581 00a0 00700040 .word 1073770496 + 1582 .cfi_endproc + 1583 .LFE149: + 1585 .section .rodata.main.str1.4,"aMS",%progbits,1 + 1586 .align 2 + 1587 .LC6: + 1588 0000 30782530 .ascii "0x%02X \015\012\000" + 1588 3258200D + 1588 0A00 + 1589 000a 0000 .align 2 + 1590 .LC7: + 1591 000c 3D3D3D3D .ascii "==========================================\015\012\000" + 1591 3D3D3D3D + 1591 3D3D3D3D + 1591 3D3D3D3D + 1591 3D3D3D3D + 1592 0039 000000 .align 2 + 1593 .LC8: + 1594 003c 4D616E75 .ascii "Manufacturer ID = \015\012\000" + 1594 66616374 + 1594 75726572 + 1594 20494420 + 1594 3D200D0A + 1595 0051 000000 .align 2 + 1596 .LC9: + 1597 0054 44657669 .ascii "Device ID = \015\012\000" + 1597 63652049 + 1597 44203D20 + 1597 0D0A00 + 1598 0063 00 .align 2 + 1599 .LC10: + 1600 0064 48656C6C .ascii "Hello welcome to the EEPROM programmer! What would " + 1600 6F207765 + 1600 6C636F6D + 1600 6520746F + 1600 20746865 + 1601 0097 796F7520 .ascii "you like to do?\015\012\000" + 1601 6C696B65 + 1601 20746F20 + 1601 646F3F0D + 1601 0A00 + 1602 00a9 000000 .align 2 + 1603 .LC11: + 1604 00ac 5B315D20 .ascii "[1] Dump Rom as char\015\012\000" + 1604 44756D70 + 1604 20526F6D + 1604 20617320 + 1604 63686172 + 1605 00c3 00 .align 2 + 1606 .LC12: + 1607 00c4 5B325D20 .ascii "[2] Erase chip\015\012\000" + 1607 45726173 + 1607 65206368 + ARM GAS /tmp/ccPiCTjg.s page 59 + + + 1607 69700D0A + 1607 00 + 1608 00d5 000000 .align 2 + 1609 .LC13: + 1610 00d8 5B335D20 .ascii "[3] Program chip via UART\015\012\000" + 1610 50726F67 + 1610 72616D20 + 1610 63686970 + 1610 20766961 + 1611 .align 2 + 1612 .LC14: + 1613 00f4 44756D70 .ascii "Dumping ROM...\015\012\000" + 1613 696E6720 + 1613 524F4D2E + 1613 2E2E0D0A + 1613 00 + 1614 0105 000000 .align 2 + 1615 .LC15: + 1616 0108 45726173 .ascii "Erasing Chip...\015\012\000" + 1616 696E6720 + 1616 43686970 + 1616 2E2E2E0D + 1616 0A00 + 1617 011a 0000 .align 2 + 1618 .LC16: + 1619 011c 4C61756E .ascii "Launching programming sequence...\015\012\000" + 1619 6368696E + 1619 67207072 + 1619 6F677261 + 1619 6D6D696E + 1620 .align 2 + 1621 .LC17: + 1622 0140 496E7661 .ascii "Invalid input!\015\012\000" + 1622 6C696420 + 1622 696E7075 + 1622 74210D0A + 1622 00 + 1623 .section .text.main,"ax",%progbits + 1624 .align 1 + 1625 .global main + 1626 .syntax unified + 1627 .thumb + 1628 .thumb_func + 1629 .fpu fpv4-sp-d16 + 1631 main: + 1632 .LFB137: 40:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ - 1270 .loc 1 40 1 view -0 - 1271 .cfi_startproc - 1272 @ args = 0, pretend = 0, frame = 8 - 1273 @ frame_needed = 0, uses_anonymous_args = 0 - 1274 0000 70B5 push {r4, r5, r6, lr} - 1275 .LCFI31: - 1276 .cfi_def_cfa_offset 16 - 1277 .cfi_offset 4, -16 - 1278 .cfi_offset 5, -12 - 1279 .cfi_offset 6, -8 - 1280 .cfi_offset 14, -4 - 1281 0002 82B0 sub sp, sp, #8 - 1282 .LCFI32: - 1283 .cfi_def_cfa_offset 24 + 1633 .loc 1 40 1 view -0 + 1634 .cfi_startproc + 1635 @ args = 0, pretend = 0, frame = 16 + 1636 @ frame_needed = 0, uses_anonymous_args = 0 + 1637 0000 70B5 push {r4, r5, r6, lr} + 1638 .LCFI39: + 1639 .cfi_def_cfa_offset 16 + 1640 .cfi_offset 4, -16 + 1641 .cfi_offset 5, -12 + 1642 .cfi_offset 6, -8 + ARM GAS /tmp/ccPiCTjg.s page 60 + + + 1643 .cfi_offset 14, -4 + 1644 0002 84B0 sub sp, sp, #16 + 1645 .LCFI40: + 1646 .cfi_def_cfa_offset 32 44:Core/Src/main.c **** - 1284 .loc 1 44 3 view .LVU297 - 1285 0004 FFF7FEFF bl HAL_Init - 1286 .LVL79: + 1647 .loc 1 44 3 view .LVU363 + 1648 0004 FFF7FEFF bl HAL_Init + 1649 .LVL111: 47:Core/Src/main.c **** - 1287 .loc 1 47 3 view .LVU298 - 1288 0008 FFF7FEFF bl SystemClock_Config - 1289 .LVL80: + 1650 .loc 1 47 3 view .LVU364 + 1651 0008 FFF7FEFF bl SystemClock_Config + 1652 .LVL112: 50:Core/Src/main.c **** MX_USART2_UART_Init(); - 1290 .loc 1 50 3 view .LVU299 - 1291 000c FFF7FEFF bl MX_GPIO_Init - 1292 .LVL81: + 1653 .loc 1 50 3 view .LVU365 + 1654 000c FFF7FEFF bl MX_GPIO_Init + 1655 .LVL113: 51:Core/Src/main.c **** - 1293 .loc 1 51 3 view .LVU300 - 1294 0010 FFF7FEFF bl MX_USART2_UART_Init - 1295 .LVL82: + 1656 .loc 1 51 3 view .LVU366 + 1657 0010 FFF7FEFF bl MX_USART2_UART_Init + 1658 .LVL114: 53:Core/Src/main.c **** Address_Pins_Init(); - 1296 .loc 1 53 3 view .LVU301 - 1297 0014 0020 movs r0, #0 - 1298 0016 FFF7FEFF bl Data_Pins_Init - 1299 .LVL83: + 1659 .loc 1 53 3 view .LVU367 + 1660 0014 0020 movs r0, #0 + 1661 0016 FFF7FEFF bl Data_Pins_Init + 1662 .LVL115: 54:Core/Src/main.c **** Command_Pins_Init(); - 1300 .loc 1 54 3 view .LVU302 - 1301 001a FFF7FEFF bl Address_Pins_Init - 1302 .LVL84: + 1663 .loc 1 54 3 view .LVU368 + 1664 001a FFF7FEFF bl Address_Pins_Init + 1665 .LVL116: 55:Core/Src/main.c **** - 1303 .loc 1 55 3 view .LVU303 - ARM GAS /tmp/ccg6eVgO.s page 51 - - - 1304 001e FFF7FEFF bl Command_Pins_Init - 1305 .LVL85: + 1666 .loc 1 55 3 view .LVU369 + 1667 001e FFF7FEFF bl Command_Pins_Init + 1668 .LVL117: 57:Core/Src/main.c **** Enter_Device_ID(&man_id, &dev_id); - 1306 .loc 1 57 3 view .LVU304 + 1669 .loc 1 57 3 view .LVU370 58:Core/Src/main.c **** - 1307 .loc 1 58 3 view .LVU305 - 1308 0022 6946 mov r1, sp - 1309 0024 01A8 add r0, sp, #4 - 1310 0026 FFF7FEFF bl Enter_Device_ID - 1311 .LVL86: + 1670 .loc 1 58 3 view .LVU371 + 1671 0022 02A9 add r1, sp, #8 + 1672 0024 03A8 add r0, sp, #12 + 1673 0026 FFF7FEFF bl Enter_Device_ID + 1674 .LVL118: 60:Core/Src/main.c **** char *device = (char*)malloc(13 * sizeof(char)); - 1312 .loc 1 60 3 view .LVU306 + 1675 .loc 1 60 3 view .LVU372 60:Core/Src/main.c **** char *device = (char*)malloc(13 * sizeof(char)); - 1313 .loc 1 60 31 is_stmt 0 view .LVU307 - 1314 002a 0D20 movs r0, #13 - 1315 002c FFF7FEFF bl malloc - 1316 .LVL87: - 1317 0030 0546 mov r5, r0 - 1318 .LVL88: + 1676 .loc 1 60 31 is_stmt 0 view .LVU373 + 1677 002a 0D20 movs r0, #13 + 1678 002c FFF7FEFF bl malloc + 1679 .LVL119: + 1680 0030 0546 mov r5, r0 + 1681 .LVL120: 61:Core/Src/main.c **** sprintf(manufacturer, "0x%02X \r\n", man_id); - 1319 .loc 1 61 3 is_stmt 1 view .LVU308 + 1682 .loc 1 61 3 is_stmt 1 view .LVU374 61:Core/Src/main.c **** sprintf(manufacturer, "0x%02X \r\n", man_id); - 1320 .loc 1 61 25 is_stmt 0 view .LVU309 - 1321 0032 0D20 movs r0, #13 - 1322 .LVL89: + 1683 .loc 1 61 25 is_stmt 0 view .LVU375 + 1684 0032 0D20 movs r0, #13 + 1685 .LVL121: 61:Core/Src/main.c **** sprintf(manufacturer, "0x%02X \r\n", man_id); - 1323 .loc 1 61 25 view .LVU310 - 1324 0034 FFF7FEFF bl malloc - 1325 .LVL90: - 1326 0038 0446 mov r4, r0 - 1327 .LVL91: + ARM GAS /tmp/ccPiCTjg.s page 61 + + + 1686 .loc 1 61 25 view .LVU376 + 1687 0034 FFF7FEFF bl malloc + 1688 .LVL122: + 1689 0038 0446 mov r4, r0 + 1690 .LVL123: 62:Core/Src/main.c **** sprintf(device, "0x%02X \r\n", dev_id); - 1328 .loc 1 62 3 is_stmt 1 view .LVU311 - 1329 003a 0C4E ldr r6, .L81 - 1330 003c 019A ldr r2, [sp, #4] - 1331 003e 3146 mov r1, r6 - 1332 0040 2846 mov r0, r5 - 1333 .LVL92: + 1691 .loc 1 62 3 is_stmt 1 view .LVU377 + 1692 003a 284E ldr r6, .L106 + 1693 003c 039A ldr r2, [sp, #12] + 1694 003e 3146 mov r1, r6 + 1695 0040 2846 mov r0, r5 + 1696 .LVL124: 62:Core/Src/main.c **** sprintf(device, "0x%02X \r\n", dev_id); - 1334 .loc 1 62 3 is_stmt 0 view .LVU312 - 1335 0042 FFF7FEFF bl sprintf - 1336 .LVL93: + 1697 .loc 1 62 3 is_stmt 0 view .LVU378 + 1698 0042 FFF7FEFF bl sprintf + 1699 .LVL125: 63:Core/Src/main.c **** - 1337 .loc 1 63 3 is_stmt 1 view .LVU313 - 1338 0046 009A ldr r2, [sp] - 1339 0048 3146 mov r1, r6 - 1340 004a 2046 mov r0, r4 - 1341 004c FFF7FEFF bl sprintf - 1342 .LVL94: - 65:Core/Src/main.c **** debug_print(manufacturer); - 1343 .loc 1 65 3 view .LVU314 - 1344 0050 0748 ldr r0, .L81+4 - 1345 0052 FFF7FEFF bl debug_print - 1346 .LVL95: - 66:Core/Src/main.c **** debug_print("Device ID = \r\n"); - 1347 .loc 1 66 3 view .LVU315 - 1348 0056 2846 mov r0, r5 - ARM GAS /tmp/ccg6eVgO.s page 52 - - - 1349 0058 FFF7FEFF bl debug_print - 1350 .LVL96: - 67:Core/Src/main.c **** debug_print(device); - 1351 .loc 1 67 3 view .LVU316 - 1352 005c 0548 ldr r0, .L81+8 - 1353 005e FFF7FEFF bl debug_print - 1354 .LVL97: - 68:Core/Src/main.c **** - 1355 .loc 1 68 3 view .LVU317 - 1356 0062 2046 mov r0, r4 - 1357 0064 FFF7FEFF bl debug_print - 1358 .LVL98: - 1359 .L79: - 72:Core/Src/main.c **** { - 1360 .loc 1 72 3 discriminator 1 view .LVU318 - 75:Core/Src/main.c **** - 1361 .loc 1 75 3 discriminator 1 view .LVU319 - 72:Core/Src/main.c **** { - 1362 .loc 1 72 9 discriminator 1 view .LVU320 - 1363 0068 FEE7 b .L79 - 1364 .L82: - 1365 006a 00BF .align 2 - 1366 .L81: - 1367 006c 00000000 .word .LC2 - 1368 0070 0C000000 .word .LC3 - 1369 0074 24000000 .word .LC4 - 1370 .cfi_endproc - 1371 .LFE137: - 1373 .global huart2 - 1374 .section .rodata - 1375 .align 2 - 1376 .set .LANCHOR0,. + 0 - 1377 .LC0: - 1378 0000 01000000 .word 1 - 1379 0004 02000000 .word 2 - 1380 0008 04000000 .word 4 - 1381 000c 08000000 .word 8 - 1382 0010 10000000 .word 16 - 1383 0014 20000000 .word 32 - 1384 0018 40000000 .word 64 - 1385 001c 80000000 .word 128 - 1386 0020 00010000 .word 256 - 1387 0024 00020000 .word 512 - 1388 0028 00040000 .word 1024 - 1389 002c 00080000 .word 2048 - 1390 0030 00100000 .word 4096 - 1391 0034 00200000 .word 8192 - 1392 0038 01000000 .word 1 - 1393 003c 02000000 .word 2 - 1394 0040 04000000 .word 4 - 1395 0044 08000000 .word 8 - 1396 0048 10000000 .word 16 - 1397 .LC1: - 1398 004c 01000000 .word 1 - 1399 0050 02000000 .word 2 - 1400 0054 00080000 .word 2048 - 1401 0058 00100000 .word 4096 - ARM GAS /tmp/ccg6eVgO.s page 53 - - - 1402 005c 10000000 .word 16 - 1403 0060 20000000 .word 32 - 1404 0064 40000000 .word 64 - 1405 0068 80000000 .word 128 - 1406 .section .bss.huart2,"aw",%nobits - 1407 .align 2 - 1408 .set .LANCHOR1,. + 0 - 1411 huart2: - 1412 0000 00000000 .space 72 - 1412 00000000 - 1412 00000000 - 1412 00000000 - 1412 00000000 - 1413 .text - 1414 .Letext0: - 1415 .file 3 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h" - 1416 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h" - 1417 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" - 1418 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" - 1419 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" - 1420 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" - 1421 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" - 1422 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h" - 1423 .file 11 "/usr/include/newlib/string.h" - 1424 .file 12 "" - 1425 .file 13 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" - 1426 .file 14 "/usr/include/newlib/stdlib.h" - 1427 .file 15 "/usr/include/newlib/stdio.h" - ARM GAS /tmp/ccg6eVgO.s page 54 + 1700 .loc 1 63 3 is_stmt 1 view .LVU379 + 1701 0046 029A ldr r2, [sp, #8] + 1702 0048 3146 mov r1, r6 + 1703 004a 2046 mov r0, r4 + 1704 004c FFF7FEFF bl sprintf + 1705 .LVL126: + 65:Core/Src/main.c **** debug_print("Manufacturer ID = \r\n"); + 1706 .loc 1 65 3 view .LVU380 + 1707 0050 234E ldr r6, .L106+4 + 1708 0052 3046 mov r0, r6 + 1709 0054 FFF7FEFF bl debug_print + 1710 .LVL127: + 66:Core/Src/main.c **** debug_print(manufacturer); + 1711 .loc 1 66 3 view .LVU381 + 1712 0058 2248 ldr r0, .L106+8 + 1713 005a FFF7FEFF bl debug_print + 1714 .LVL128: + 67:Core/Src/main.c **** debug_print("Device ID = \r\n"); + 1715 .loc 1 67 3 view .LVU382 + 1716 005e 2846 mov r0, r5 + 1717 0060 FFF7FEFF bl debug_print + 1718 .LVL129: + 68:Core/Src/main.c **** debug_print(device); + 1719 .loc 1 68 3 view .LVU383 + 1720 0064 2048 ldr r0, .L106+12 + 1721 0066 FFF7FEFF bl debug_print + 1722 .LVL130: + 69:Core/Src/main.c **** debug_print("==========================================\r\n"); + 1723 .loc 1 69 3 view .LVU384 + 1724 006a 2046 mov r0, r4 + 1725 006c FFF7FEFF bl debug_print + 1726 .LVL131: + 70:Core/Src/main.c **** + 1727 .loc 1 70 3 view .LVU385 + 1728 0070 3046 mov r0, r6 + 1729 0072 FFF7FEFF bl debug_print + 1730 .LVL132: + 1731 0076 05E0 b .L103 + 1732 .L105: + 1733 .LBB19: + ARM GAS /tmp/ccPiCTjg.s page 62 + + + 85:Core/Src/main.c **** Dump_Flash_UART(1); + 1734 .loc 1 85 7 view .LVU386 + 1735 0078 1C48 ldr r0, .L106+16 + 1736 007a FFF7FEFF bl debug_print + 1737 .LVL133: + 86:Core/Src/main.c **** break; + 1738 .loc 1 86 7 view .LVU387 + 1739 007e 0120 movs r0, #1 + 1740 0080 FFF7FEFF bl Dump_Flash_UART + 1741 .LVL134: + 87:Core/Src/main.c **** case 0x32: + 1742 .loc 1 87 7 view .LVU388 + 1743 .L103: + 1744 .LBE19: + 73:Core/Src/main.c **** { + 1745 .loc 1 73 3 view .LVU389 + 1746 .LBB20: + 75:Core/Src/main.c **** debug_print("[1] Dump Rom as char\r\n"); + 1747 .loc 1 75 5 view .LVU390 + 1748 0084 1A48 ldr r0, .L106+20 + 1749 0086 FFF7FEFF bl debug_print + 1750 .LVL135: + 76:Core/Src/main.c **** debug_print("[2] Erase chip\r\n"); + 1751 .loc 1 76 5 view .LVU391 + 1752 008a 1A48 ldr r0, .L106+24 + 1753 008c FFF7FEFF bl debug_print + 1754 .LVL136: + 77:Core/Src/main.c **** debug_print("[3] Program chip via UART\r\n"); + 1755 .loc 1 77 5 view .LVU392 + 1756 0090 1948 ldr r0, .L106+28 + 1757 0092 FFF7FEFF bl debug_print + 1758 .LVL137: + 78:Core/Src/main.c **** uint8_t resp; + 1759 .loc 1 78 5 view .LVU393 + 1760 0096 1948 ldr r0, .L106+32 + 1761 0098 FFF7FEFF bl debug_print + 1762 .LVL138: + 79:Core/Src/main.c **** HAL_UART_Receive(&huart2, &resp, 1, HAL_MAX_DELAY); + 1763 .loc 1 79 5 view .LVU394 + 80:Core/Src/main.c **** + 1764 .loc 1 80 5 view .LVU395 + 1765 009c 4FF0FF33 mov r3, #-1 + 1766 00a0 0122 movs r2, #1 + 1767 00a2 0DF10701 add r1, sp, #7 + 1768 00a6 1648 ldr r0, .L106+36 + 1769 00a8 FFF7FEFF bl HAL_UART_Receive + 1770 .LVL139: + 82:Core/Src/main.c **** { + 1771 .loc 1 82 5 view .LVU396 + 1772 00ac 9DF80730 ldrb r3, [sp, #7] @ zero_extendqisi2 + 1773 00b0 322B cmp r3, #50 + 1774 00b2 07D0 beq .L99 + 1775 00b4 332B cmp r3, #51 + 1776 00b6 0BD0 beq .L100 + 1777 00b8 312B cmp r3, #49 + 1778 00ba DDD0 beq .L105 + 97:Core/Src/main.c **** break; + ARM GAS /tmp/ccPiCTjg.s page 63 + + + 1779 .loc 1 97 7 view .LVU397 + 1780 00bc 1148 ldr r0, .L106+40 + 1781 00be FFF7FEFF bl debug_print + 1782 .LVL140: + 98:Core/Src/main.c **** } + 1783 .loc 1 98 7 view .LVU398 + 1784 .LBE20: + 73:Core/Src/main.c **** { + 1785 .loc 1 73 9 view .LVU399 + 74:Core/Src/main.c **** debug_print("Hello welcome to the EEPROM programmer! What would you like to do?\r\n"); + 1786 .loc 1 74 3 is_stmt 0 view .LVU400 + 1787 00c2 DFE7 b .L103 + 1788 .L99: + 1789 .LBB21: + 89:Core/Src/main.c **** Chip_Erase(); + 1790 .loc 1 89 7 is_stmt 1 view .LVU401 + 1791 00c4 1048 ldr r0, .L106+44 + 1792 00c6 FFF7FEFF bl debug_print + 1793 .LVL141: + 90:Core/Src/main.c **** break; + 1794 .loc 1 90 7 view .LVU402 + 1795 00ca FFF7FEFF bl Chip_Erase + 1796 .LVL142: + 91:Core/Src/main.c **** case 0x33: + 1797 .loc 1 91 7 view .LVU403 + 1798 00ce D9E7 b .L103 + 1799 .L100: + 93:Core/Src/main.c **** Flash_From_UART(); + 1800 .loc 1 93 7 view .LVU404 + 1801 00d0 0E48 ldr r0, .L106+48 + 1802 00d2 FFF7FEFF bl debug_print + 1803 .LVL143: + 94:Core/Src/main.c **** break; + 1804 .loc 1 94 7 view .LVU405 + 1805 00d6 FFF7FEFF bl Flash_From_UART + 1806 .LVL144: + 95:Core/Src/main.c **** default: + 1807 .loc 1 95 7 view .LVU406 + 1808 00da D3E7 b .L103 + 1809 .L107: + 1810 .align 2 + 1811 .L106: + 1812 00dc 00000000 .word .LC6 + 1813 00e0 0C000000 .word .LC7 + 1814 00e4 3C000000 .word .LC8 + 1815 00e8 54000000 .word .LC9 + 1816 00ec F4000000 .word .LC14 + 1817 00f0 64000000 .word .LC10 + 1818 00f4 AC000000 .word .LC11 + 1819 00f8 C4000000 .word .LC12 + 1820 00fc D8000000 .word .LC13 + 1821 0100 00000000 .word .LANCHOR1 + 1822 0104 40010000 .word .LC17 + 1823 0108 08010000 .word .LC15 + 1824 010c 1C010000 .word .LC16 + 1825 .LBE21: + 1826 .cfi_endproc + ARM GAS /tmp/ccPiCTjg.s page 64 + + + 1827 .LFE137: + 1829 .global huart2 + 1830 .section .rodata + 1831 .align 2 + 1832 .set .LANCHOR0,. + 0 + 1833 .LC0: + 1834 0000 01000000 .word 1 + 1835 0004 02000000 .word 2 + 1836 0008 04000000 .word 4 + 1837 000c 08000000 .word 8 + 1838 0010 10000000 .word 16 + 1839 0014 20000000 .word 32 + 1840 0018 40000000 .word 64 + 1841 001c 80000000 .word 128 + 1842 0020 00010000 .word 256 + 1843 0024 00020000 .word 512 + 1844 0028 00040000 .word 1024 + 1845 002c 00080000 .word 2048 + 1846 0030 00100000 .word 4096 + 1847 0034 00200000 .word 8192 + 1848 0038 01000000 .word 1 + 1849 003c 02000000 .word 2 + 1850 0040 04000000 .word 4 + 1851 0044 08000000 .word 8 + 1852 0048 10000000 .word 16 + 1853 .LC1: + 1854 004c 01000000 .word 1 + 1855 0050 02000000 .word 2 + 1856 0054 00080000 .word 2048 + 1857 0058 00100000 .word 4096 + 1858 005c 10000000 .word 16 + 1859 0060 20000000 .word 32 + 1860 0064 40000000 .word 64 + 1861 0068 80000000 .word 128 + 1862 .section .bss.huart2,"aw",%nobits + 1863 .align 2 + 1864 .set .LANCHOR1,. + 0 + 1867 huart2: + 1868 0000 00000000 .space 72 + 1868 00000000 + 1868 00000000 + 1868 00000000 + 1868 00000000 + 1869 .text + 1870 .Letext0: + 1871 .file 3 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h" + 1872 .file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h" + 1873 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h" + 1874 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h" + 1875 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h" + 1876 .file 8 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" + 1877 .file 9 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" + 1878 .file 10 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h" + 1879 .file 11 "/usr/include/newlib/string.h" + 1880 .file 12 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" + 1881 .file 13 "/usr/include/newlib/stdio.h" + 1882 .file 14 "" + ARM GAS /tmp/ccPiCTjg.s page 65 + + + 1883 .file 15 "/usr/include/newlib/stdlib.h" + ARM GAS /tmp/ccPiCTjg.s page 66 DEFINED SYMBOLS *ABS*:0000000000000000 main.c - /tmp/ccg6eVgO.s:18 .text.MX_GPIO_Init:0000000000000000 $t - /tmp/ccg6eVgO.s:25 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init - /tmp/ccg6eVgO.s:111 .text.MX_GPIO_Init:000000000000005c $d - /tmp/ccg6eVgO.s:116 .text.Write_Address:0000000000000000 $t - /tmp/ccg6eVgO.s:123 .text.Write_Address:0000000000000000 Write_Address - /tmp/ccg6eVgO.s:236 .text.Write_Address:0000000000000084 $d - /tmp/ccg6eVgO.s:243 .text.Write_Command_Pins:0000000000000000 $t - /tmp/ccg6eVgO.s:250 .text.Write_Command_Pins:0000000000000000 Write_Command_Pins - /tmp/ccg6eVgO.s:305 .text.Write_Command_Pins:000000000000003c $d - /tmp/ccg6eVgO.s:310 .text.Data_Pins_Init:0000000000000000 $t - /tmp/ccg6eVgO.s:317 .text.Data_Pins_Init:0000000000000000 Data_Pins_Init - /tmp/ccg6eVgO.s:385 .text.Data_Pins_Init:0000000000000038 $d - /tmp/ccg6eVgO.s:390 .text.Receive_Data:0000000000000000 $t - /tmp/ccg6eVgO.s:397 .text.Receive_Data:0000000000000000 Receive_Data - /tmp/ccg6eVgO.s:485 .text.Receive_Data:0000000000000048 $d - /tmp/ccg6eVgO.s:491 .text.Write_Data:0000000000000000 $t - /tmp/ccg6eVgO.s:498 .text.Write_Data:0000000000000000 Write_Data - /tmp/ccg6eVgO.s:588 .text.Write_Data:000000000000005c $d - /tmp/ccg6eVgO.s:594 .text.Write_Command:0000000000000000 $t - /tmp/ccg6eVgO.s:601 .text.Write_Command:0000000000000000 Write_Command - /tmp/ccg6eVgO.s:667 .text.Flash_ReadByte:0000000000000000 $t - /tmp/ccg6eVgO.s:674 .text.Flash_ReadByte:0000000000000000 Flash_ReadByte - /tmp/ccg6eVgO.s:723 .text.Enter_Device_ID:0000000000000000 $t - /tmp/ccg6eVgO.s:730 .text.Enter_Device_ID:0000000000000000 Enter_Device_ID - /tmp/ccg6eVgO.s:792 .text.Address_Pins_Init:0000000000000000 $t - /tmp/ccg6eVgO.s:799 .text.Address_Pins_Init:0000000000000000 Address_Pins_Init - /tmp/ccg6eVgO.s:873 .text.Address_Pins_Init:0000000000000044 $d - /tmp/ccg6eVgO.s:879 .text.Command_Pins_Init:0000000000000000 $t - /tmp/ccg6eVgO.s:886 .text.Command_Pins_Init:0000000000000000 Command_Pins_Init - /tmp/ccg6eVgO.s:934 .text.Command_Pins_Init:000000000000002c $d - /tmp/ccg6eVgO.s:939 .text.debug_print:0000000000000000 $t - /tmp/ccg6eVgO.s:946 .text.debug_print:0000000000000000 debug_print - /tmp/ccg6eVgO.s:978 .text.debug_print:0000000000000018 $d - /tmp/ccg6eVgO.s:983 .text.Error_Handler:0000000000000000 $t - /tmp/ccg6eVgO.s:990 .text.Error_Handler:0000000000000000 Error_Handler - /tmp/ccg6eVgO.s:1022 .text.MX_USART2_UART_Init:0000000000000000 $t - /tmp/ccg6eVgO.s:1028 .text.MX_USART2_UART_Init:0000000000000000 MX_USART2_UART_Init - /tmp/ccg6eVgO.s:1083 .text.MX_USART2_UART_Init:000000000000002c $d - /tmp/ccg6eVgO.s:1089 .text.SystemClock_Config:0000000000000000 $t - /tmp/ccg6eVgO.s:1096 .text.SystemClock_Config:0000000000000000 SystemClock_Config - /tmp/ccg6eVgO.s:1245 .text.SystemClock_Config:000000000000009c $d - /tmp/ccg6eVgO.s:1251 .rodata.main.str1.4:0000000000000000 $d - /tmp/ccg6eVgO.s:1261 .text.main:0000000000000000 $t - /tmp/ccg6eVgO.s:1268 .text.main:0000000000000000 main - /tmp/ccg6eVgO.s:1367 .text.main:000000000000006c $d - /tmp/ccg6eVgO.s:1411 .bss.huart2:0000000000000000 huart2 - /tmp/ccg6eVgO.s:1375 .rodata:0000000000000000 $d - /tmp/ccg6eVgO.s:1407 .bss.huart2:0000000000000000 $d + /tmp/ccPiCTjg.s:18 .text.MX_GPIO_Init:0000000000000000 $t + /tmp/ccPiCTjg.s:25 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init + /tmp/ccPiCTjg.s:111 .text.MX_GPIO_Init:000000000000005c $d + /tmp/ccPiCTjg.s:116 .text.Write_Address:0000000000000000 $t + /tmp/ccPiCTjg.s:123 .text.Write_Address:0000000000000000 Write_Address + /tmp/ccPiCTjg.s:236 .text.Write_Address:0000000000000084 $d + /tmp/ccPiCTjg.s:243 .text.Write_Command_Pins:0000000000000000 $t + /tmp/ccPiCTjg.s:250 .text.Write_Command_Pins:0000000000000000 Write_Command_Pins + /tmp/ccPiCTjg.s:305 .text.Write_Command_Pins:000000000000003c $d + /tmp/ccPiCTjg.s:310 .text.Data_Pins_Init:0000000000000000 $t + /tmp/ccPiCTjg.s:317 .text.Data_Pins_Init:0000000000000000 Data_Pins_Init + /tmp/ccPiCTjg.s:385 .text.Data_Pins_Init:0000000000000038 $d + /tmp/ccPiCTjg.s:390 .text.Receive_Data:0000000000000000 $t + /tmp/ccPiCTjg.s:397 .text.Receive_Data:0000000000000000 Receive_Data + /tmp/ccPiCTjg.s:485 .text.Receive_Data:0000000000000048 $d + /tmp/ccPiCTjg.s:491 .text.Write_Data:0000000000000000 $t + /tmp/ccPiCTjg.s:498 .text.Write_Data:0000000000000000 Write_Data + /tmp/ccPiCTjg.s:588 .text.Write_Data:000000000000005c $d + /tmp/ccPiCTjg.s:594 .text.Write_Command:0000000000000000 $t + /tmp/ccPiCTjg.s:601 .text.Write_Command:0000000000000000 Write_Command + /tmp/ccPiCTjg.s:667 .text.Chip_Erase:0000000000000000 $t + /tmp/ccPiCTjg.s:674 .text.Chip_Erase:0000000000000000 Chip_Erase + /tmp/ccPiCTjg.s:725 .text.Chip_Program_Byte:0000000000000000 $t + /tmp/ccPiCTjg.s:732 .text.Chip_Program_Byte:0000000000000000 Chip_Program_Byte + /tmp/ccPiCTjg.s:780 .text.Flash_ReadByte:0000000000000000 $t + /tmp/ccPiCTjg.s:787 .text.Flash_ReadByte:0000000000000000 Flash_ReadByte + /tmp/ccPiCTjg.s:836 .text.Enter_Device_ID:0000000000000000 $t + /tmp/ccPiCTjg.s:843 .text.Enter_Device_ID:0000000000000000 Enter_Device_ID + /tmp/ccPiCTjg.s:905 .rodata.Dump_Flash_UART.str1.4:0000000000000000 $d + /tmp/ccPiCTjg.s:912 .text.Dump_Flash_UART:0000000000000000 $t + /tmp/ccPiCTjg.s:919 .text.Dump_Flash_UART:0000000000000000 Dump_Flash_UART + /tmp/ccPiCTjg.s:1034 .text.Dump_Flash_UART:000000000000007c $d + /tmp/ccPiCTjg.s:1041 .text.Address_Pins_Init:0000000000000000 $t + /tmp/ccPiCTjg.s:1048 .text.Address_Pins_Init:0000000000000000 Address_Pins_Init + /tmp/ccPiCTjg.s:1122 .text.Address_Pins_Init:0000000000000044 $d + /tmp/ccPiCTjg.s:1128 .text.Command_Pins_Init:0000000000000000 $t + /tmp/ccPiCTjg.s:1135 .text.Command_Pins_Init:0000000000000000 Command_Pins_Init + /tmp/ccPiCTjg.s:1183 .text.Command_Pins_Init:000000000000002c $d + /tmp/ccPiCTjg.s:1188 .text.debug_print:0000000000000000 $t + /tmp/ccPiCTjg.s:1195 .text.debug_print:0000000000000000 debug_print + /tmp/ccPiCTjg.s:1227 .text.debug_print:0000000000000018 $d + /tmp/ccPiCTjg.s:1232 .rodata.Flash_From_UART.str1.4:0000000000000000 $d + /tmp/ccPiCTjg.s:1239 .text.Flash_From_UART:0000000000000000 $t + /tmp/ccPiCTjg.s:1246 .text.Flash_From_UART:0000000000000000 Flash_From_UART + /tmp/ccPiCTjg.s:1311 .text.Flash_From_UART:0000000000000038 $d + /tmp/ccPiCTjg.s:1318 .text.Error_Handler:0000000000000000 $t + /tmp/ccPiCTjg.s:1325 .text.Error_Handler:0000000000000000 Error_Handler + /tmp/ccPiCTjg.s:1357 .text.MX_USART2_UART_Init:0000000000000000 $t + /tmp/ccPiCTjg.s:1363 .text.MX_USART2_UART_Init:0000000000000000 MX_USART2_UART_Init + /tmp/ccPiCTjg.s:1418 .text.MX_USART2_UART_Init:000000000000002c $d + /tmp/ccPiCTjg.s:1424 .text.SystemClock_Config:0000000000000000 $t + /tmp/ccPiCTjg.s:1431 .text.SystemClock_Config:0000000000000000 SystemClock_Config + /tmp/ccPiCTjg.s:1580 .text.SystemClock_Config:000000000000009c $d + /tmp/ccPiCTjg.s:1586 .rodata.main.str1.4:0000000000000000 $d + /tmp/ccPiCTjg.s:1624 .text.main:0000000000000000 $t + ARM GAS /tmp/ccPiCTjg.s page 67 + + + /tmp/ccPiCTjg.s:1631 .text.main:0000000000000000 main + /tmp/ccPiCTjg.s:1812 .text.main:00000000000000dc $d + /tmp/ccPiCTjg.s:1867 .bss.huart2:0000000000000000 huart2 + /tmp/ccPiCTjg.s:1831 .rodata:0000000000000000 $d + /tmp/ccPiCTjg.s:1863 .bss.huart2:0000000000000000 $d UNDEFINED SYMBOLS memcpy HAL_GPIO_WritePin HAL_GPIO_Init HAL_GPIO_ReadPin +HAL_Delay +sprintf strlen - ARM GAS /tmp/ccg6eVgO.s page 55 - - HAL_UART_Transmit +HAL_UART_Receive HAL_UART_Init memset HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_Init malloc -sprintf diff --git a/build/main.o b/build/main.o index 7e91310..88057ca 100644 Binary files a/build/main.o and b/build/main.o differ diff --git a/build/stm32f4xx_hal_msp.lst b/build/stm32f4xx_hal_msp.lst index ea76e65..5e1873d 100644 --- a/build/stm32f4xx_hal_msp.lst +++ b/build/stm32f4xx_hal_msp.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccE2gFHF.s page 1 +ARM GAS /tmp/ccOpL6Dp.s page 1 1 .cpu cortex-m4 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccE2gFHF.s page 1 28:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f4xx_hal_msp.c **** 30:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */ - ARM GAS /tmp/ccE2gFHF.s page 2 + ARM GAS /tmp/ccOpL6Dp.s page 2 31:Core/Src/stm32f4xx_hal_msp.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccE2gFHF.s page 1 43 0006 0B4B ldr r3, .L3 44 0008 5A6C ldr r2, [r3, #68] 45 000a 42F48042 orr r2, r2, #16384 - ARM GAS /tmp/ccE2gFHF.s page 3 + ARM GAS /tmp/ccOpL6Dp.s page 3 46 000e 5A64 str r2, [r3, #68] @@ -178,7 +178,7 @@ ARM GAS /tmp/ccE2gFHF.s page 1 94 .LFB135: 79:Core/Src/stm32f4xx_hal_msp.c **** 80:Core/Src/stm32f4xx_hal_msp.c **** /** - ARM GAS /tmp/ccE2gFHF.s page 4 + ARM GAS /tmp/ccOpL6Dp.s page 4 81:Core/Src/stm32f4xx_hal_msp.c **** * @brief UART MSP Initialization @@ -238,7 +238,7 @@ ARM GAS /tmp/ccE2gFHF.s page 1 106:Core/Src/stm32f4xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 107:Core/Src/stm32f4xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 108:Core/Src/stm32f4xx_hal_msp.c **** - ARM GAS /tmp/ccE2gFHF.s page 5 + ARM GAS /tmp/ccOpL6Dp.s page 5 109:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN USART2_MspInit 1 */ @@ -298,7 +298,7 @@ ARM GAS /tmp/ccE2gFHF.s page 1 161 .loc 1 97 5 view .LVU31 162 0042 1B6B ldr r3, [r3, #48] 163 0044 03F00103 and r3, r3, #1 - ARM GAS /tmp/ccE2gFHF.s page 6 + ARM GAS /tmp/ccOpL6Dp.s page 6 164 0048 0293 str r3, [sp, #8] @@ -358,7 +358,7 @@ ARM GAS /tmp/ccE2gFHF.s page 1 208 HAL_UART_MspDeInit: 209 .LVL5: 210 .LFB136: - ARM GAS /tmp/ccE2gFHF.s page 7 + ARM GAS /tmp/ccOpL6Dp.s page 7 116:Core/Src/stm32f4xx_hal_msp.c **** @@ -418,7 +418,7 @@ ARM GAS /tmp/ccE2gFHF.s page 1 235 000c 054A ldr r2, .L15+4 236 000e 136C ldr r3, [r2, #64] 237 0010 23F40033 bic r3, r3, #131072 - ARM GAS /tmp/ccE2gFHF.s page 8 + ARM GAS /tmp/ccOpL6Dp.s page 8 238 0014 1364 str r3, [r2, #64] @@ -449,20 +449,20 @@ ARM GAS /tmp/ccE2gFHF.s page 1 262 .file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h" 263 .file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h" 264 .file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h" - ARM GAS /tmp/ccE2gFHF.s page 9 + ARM GAS /tmp/ccOpL6Dp.s page 9 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_hal_msp.c - /tmp/ccE2gFHF.s:18 .text.HAL_MspInit:0000000000000000 $t - /tmp/ccE2gFHF.s:26 .text.HAL_MspInit:0000000000000000 HAL_MspInit - /tmp/ccE2gFHF.s:80 .text.HAL_MspInit:0000000000000034 $d - /tmp/ccE2gFHF.s:85 .text.HAL_UART_MspInit:0000000000000000 $t - /tmp/ccE2gFHF.s:92 .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit - /tmp/ccE2gFHF.s:195 .text.HAL_UART_MspInit:0000000000000064 $d - /tmp/ccE2gFHF.s:201 .text.HAL_UART_MspDeInit:0000000000000000 $t - /tmp/ccE2gFHF.s:208 .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit - /tmp/ccE2gFHF.s:251 .text.HAL_UART_MspDeInit:0000000000000020 $d + /tmp/ccOpL6Dp.s:18 .text.HAL_MspInit:0000000000000000 $t + /tmp/ccOpL6Dp.s:26 .text.HAL_MspInit:0000000000000000 HAL_MspInit + /tmp/ccOpL6Dp.s:80 .text.HAL_MspInit:0000000000000034 $d + /tmp/ccOpL6Dp.s:85 .text.HAL_UART_MspInit:0000000000000000 $t + /tmp/ccOpL6Dp.s:92 .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit + /tmp/ccOpL6Dp.s:195 .text.HAL_UART_MspInit:0000000000000064 $d + /tmp/ccOpL6Dp.s:201 .text.HAL_UART_MspDeInit:0000000000000000 $t + /tmp/ccOpL6Dp.s:208 .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit + /tmp/ccOpL6Dp.s:251 .text.HAL_UART_MspDeInit:0000000000000020 $d UNDEFINED SYMBOLS HAL_GPIO_Init diff --git a/build/stm32f4xx_it.lst b/build/stm32f4xx_it.lst index bf8e192..143618e 100644 --- a/build/stm32f4xx_it.lst +++ b/build/stm32f4xx_it.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccjI409r.s page 1 +ARM GAS /tmp/ccvHq5vA.s page 1 1 .cpu cortex-m4 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccjI409r.s page 1 28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */ 29:Core/Src/stm32f4xx_it.c **** 30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */ - ARM GAS /tmp/ccjI409r.s page 2 + ARM GAS /tmp/ccvHq5vA.s page 2 31:Core/Src/stm32f4xx_it.c **** @@ -118,7 +118,7 @@ ARM GAS /tmp/ccjI409r.s page 1 77:Core/Src/stm32f4xx_it.c **** } 37 .loc 1 77 3 discriminator 1 view .LVU2 75:Core/Src/stm32f4xx_it.c **** { - ARM GAS /tmp/ccjI409r.s page 3 + ARM GAS /tmp/ccvHq5vA.s page 3 38 .loc 1 75 10 discriminator 1 view .LVU3 @@ -178,7 +178,7 @@ ARM GAS /tmp/ccjI409r.s page 1 96:Core/Src/stm32f4xx_it.c **** /** 97:Core/Src/stm32f4xx_it.c **** * @brief This function handles Memory management fault. 98:Core/Src/stm32f4xx_it.c **** */ - ARM GAS /tmp/ccjI409r.s page 4 + ARM GAS /tmp/ccvHq5vA.s page 4 99:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void) @@ -238,7 +238,7 @@ ARM GAS /tmp/ccjI409r.s page 1 122:Core/Src/stm32f4xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */ 123:Core/Src/stm32f4xx_it.c **** } 109 .loc 1 123 3 discriminator 1 view .LVU14 - ARM GAS /tmp/ccjI409r.s page 5 + ARM GAS /tmp/ccvHq5vA.s page 5 119:Core/Src/stm32f4xx_it.c **** { @@ -298,7 +298,7 @@ ARM GAS /tmp/ccjI409r.s page 1 141:Core/Src/stm32f4xx_it.c **** /** 142:Core/Src/stm32f4xx_it.c **** * @brief This function handles System service call via SWI instruction. 143:Core/Src/stm32f4xx_it.c **** */ - ARM GAS /tmp/ccjI409r.s page 6 + ARM GAS /tmp/ccvHq5vA.s page 6 144:Core/Src/stm32f4xx_it.c **** void SVC_Handler(void) @@ -358,7 +358,7 @@ ARM GAS /tmp/ccjI409r.s page 1 184 .thumb_func 185 .fpu fpv4-sp-d16 187 PendSV_Handler: - ARM GAS /tmp/ccjI409r.s page 7 + ARM GAS /tmp/ccvHq5vA.s page 7 188 .LFB141: @@ -418,7 +418,7 @@ ARM GAS /tmp/ccjI409r.s page 1 189:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ 190:Core/Src/stm32f4xx_it.c **** 191:Core/Src/stm32f4xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ - ARM GAS /tmp/ccjI409r.s page 8 + ARM GAS /tmp/ccvHq5vA.s page 8 192:Core/Src/stm32f4xx_it.c **** } @@ -429,29 +429,29 @@ ARM GAS /tmp/ccjI409r.s page 1 226 .text 227 .Letext0: 228 .file 2 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h" - ARM GAS /tmp/ccjI409r.s page 9 + ARM GAS /tmp/ccvHq5vA.s page 9 DEFINED SYMBOLS *ABS*:0000000000000000 stm32f4xx_it.c - /tmp/ccjI409r.s:18 .text.NMI_Handler:0000000000000000 $t - /tmp/ccjI409r.s:26 .text.NMI_Handler:0000000000000000 NMI_Handler - /tmp/ccjI409r.s:44 .text.HardFault_Handler:0000000000000000 $t - /tmp/ccjI409r.s:51 .text.HardFault_Handler:0000000000000000 HardFault_Handler - /tmp/ccjI409r.s:68 .text.MemManage_Handler:0000000000000000 $t - /tmp/ccjI409r.s:75 .text.MemManage_Handler:0000000000000000 MemManage_Handler - /tmp/ccjI409r.s:92 .text.BusFault_Handler:0000000000000000 $t - /tmp/ccjI409r.s:99 .text.BusFault_Handler:0000000000000000 BusFault_Handler - /tmp/ccjI409r.s:116 .text.UsageFault_Handler:0000000000000000 $t - /tmp/ccjI409r.s:123 .text.UsageFault_Handler:0000000000000000 UsageFault_Handler - /tmp/ccjI409r.s:140 .text.SVC_Handler:0000000000000000 $t - /tmp/ccjI409r.s:147 .text.SVC_Handler:0000000000000000 SVC_Handler - /tmp/ccjI409r.s:160 .text.DebugMon_Handler:0000000000000000 $t - /tmp/ccjI409r.s:167 .text.DebugMon_Handler:0000000000000000 DebugMon_Handler - /tmp/ccjI409r.s:180 .text.PendSV_Handler:0000000000000000 $t - /tmp/ccjI409r.s:187 .text.PendSV_Handler:0000000000000000 PendSV_Handler - /tmp/ccjI409r.s:200 .text.SysTick_Handler:0000000000000000 $t - /tmp/ccjI409r.s:207 .text.SysTick_Handler:0000000000000000 SysTick_Handler + /tmp/ccvHq5vA.s:18 .text.NMI_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:26 .text.NMI_Handler:0000000000000000 NMI_Handler + /tmp/ccvHq5vA.s:44 .text.HardFault_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:51 .text.HardFault_Handler:0000000000000000 HardFault_Handler + /tmp/ccvHq5vA.s:68 .text.MemManage_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:75 .text.MemManage_Handler:0000000000000000 MemManage_Handler + /tmp/ccvHq5vA.s:92 .text.BusFault_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:99 .text.BusFault_Handler:0000000000000000 BusFault_Handler + /tmp/ccvHq5vA.s:116 .text.UsageFault_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:123 .text.UsageFault_Handler:0000000000000000 UsageFault_Handler + /tmp/ccvHq5vA.s:140 .text.SVC_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:147 .text.SVC_Handler:0000000000000000 SVC_Handler + /tmp/ccvHq5vA.s:160 .text.DebugMon_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:167 .text.DebugMon_Handler:0000000000000000 DebugMon_Handler + /tmp/ccvHq5vA.s:180 .text.PendSV_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:187 .text.PendSV_Handler:0000000000000000 PendSV_Handler + /tmp/ccvHq5vA.s:200 .text.SysTick_Handler:0000000000000000 $t + /tmp/ccvHq5vA.s:207 .text.SysTick_Handler:0000000000000000 SysTick_Handler UNDEFINED SYMBOLS HAL_IncTick diff --git a/sample.rom b/sample.rom new file mode 100644 index 0000000..5a04ede --- /dev/null +++ b/sample.rom @@ -0,0 +1 @@ +Þ­¾ïabcd \ No newline at end of file