init commit

build/EEPROM_programmer.hex

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+:1028EC000000000001000000100000000024F400B3
+:040000050800271DAB
+:00000001FF

build/main.d

@@ -0,0 +1,52 @@
+build/main.o: Core/Src/main.c Core/Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Core/Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/startup_stm32f401xe.d

@@ -0,0 +1 @@
+build/startup_stm32f401xe.o: startup_stm32f401xe.s

build/stm32f4xx_hal.d

@@ -0,0 +1,51 @@
+build/stm32f4xx_hal.o: Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_cortex.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_cortex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_dma.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_dma.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_dma_ex.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_dma_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_exti.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_exti.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_flash.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_flash.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_flash_ex.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_flash_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_flash_ramfunc.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_flash_ramfunc.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_flash_ramfunc.lst

@@ -0,0 +1,27 @@
+ARM GAS  /tmp/ccw9Ybw6.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.eabi_attribute 27, 1
+   3              		.eabi_attribute 28, 1
+   4              		.eabi_attribute 20, 1
+   5              		.eabi_attribute 21, 1
+   6              		.eabi_attribute 23, 3
+   7              		.eabi_attribute 24, 1
+   8              		.eabi_attribute 25, 1
+   9              		.eabi_attribute 26, 1
+  10              		.eabi_attribute 30, 1
+  11              		.eabi_attribute 34, 1
+  12              		.eabi_attribute 18, 4
+  13              		.file	"stm32f4xx_hal_flash_ramfunc.c"
+  14              		.text
+  15              	.Ltext0:
+  16              		.cfi_sections	.debug_frame
+  17              	.Letext0:
+ARM GAS  /tmp/ccw9Ybw6.s 			page 2
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_hal_flash_ramfunc.c
+
+NO UNDEFINED SYMBOLS

build/stm32f4xx_hal_gpio.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_gpio.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_msp.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_msp.o: Core/Src/stm32f4xx_hal_msp.c Core/Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Core/Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_msp.lst

@@ -0,0 +1,469 @@
+ARM GAS  /tmp/ccE2gFHF.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.eabi_attribute 27, 1
+   3              		.eabi_attribute 28, 1
+   4              		.eabi_attribute 20, 1
+   5              		.eabi_attribute 21, 1
+   6              		.eabi_attribute 23, 3
+   7              		.eabi_attribute 24, 1
+   8              		.eabi_attribute 25, 1
+   9              		.eabi_attribute 26, 1
+  10              		.eabi_attribute 30, 1
+  11              		.eabi_attribute 34, 1
+  12              		.eabi_attribute 18, 4
+  13              		.file	"stm32f4xx_hal_msp.c"
+  14              		.text
+  15              	.Ltext0:
+  16              		.cfi_sections	.debug_frame
+  17              		.section	.text.HAL_MspInit,"ax",%progbits
+  18              		.align	1
+  19              		.global	HAL_MspInit
+  20              		.arch armv7e-m
+  21              		.syntax unified
+  22              		.thumb
+  23              		.thumb_func
+  24              		.fpu fpv4-sp-d16
+  26              	HAL_MspInit:
+  27              	.LFB134:
+  28              		.file 1 "Core/Src/stm32f4xx_hal_msp.c"
+   1:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Header */
+   2:Core/Src/stm32f4xx_hal_msp.c **** /**
+   3:Core/Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
+   4:Core/Src/stm32f4xx_hal_msp.c ****   * @file         stm32f4xx_hal_msp.c
+   5:Core/Src/stm32f4xx_hal_msp.c ****   * @brief        This file provides code for the MSP Initialization
+   6:Core/Src/stm32f4xx_hal_msp.c ****   *               and de-Initialization codes.
+   7:Core/Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
+   8:Core/Src/stm32f4xx_hal_msp.c ****   * @attention
+   9:Core/Src/stm32f4xx_hal_msp.c ****   *
+  10:Core/Src/stm32f4xx_hal_msp.c ****   * Copyright (c) 2025 STMicroelectronics.
+  11:Core/Src/stm32f4xx_hal_msp.c ****   * All rights reserved.
+  12:Core/Src/stm32f4xx_hal_msp.c ****   *
+  13:Core/Src/stm32f4xx_hal_msp.c ****   * This software is licensed under terms that can be found in the LICENSE file
+  14:Core/Src/stm32f4xx_hal_msp.c ****   * in the root directory of this software component.
+  15:Core/Src/stm32f4xx_hal_msp.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
+  16:Core/Src/stm32f4xx_hal_msp.c ****   *
+  17:Core/Src/stm32f4xx_hal_msp.c ****   ******************************************************************************
+  18:Core/Src/stm32f4xx_hal_msp.c ****   */
+  19:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Header */
+  20:Core/Src/stm32f4xx_hal_msp.c **** 
+  21:Core/Src/stm32f4xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/
+  22:Core/Src/stm32f4xx_hal_msp.c **** #include "main.h"
+  23:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Includes */
+  24:Core/Src/stm32f4xx_hal_msp.c **** 
+  25:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Includes */
+  26:Core/Src/stm32f4xx_hal_msp.c **** 
+  27:Core/Src/stm32f4xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/
+  28:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN TD */
+  29:Core/Src/stm32f4xx_hal_msp.c **** 
+  30:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END TD */
+ARM GAS  /tmp/ccE2gFHF.s 			page 2
+
+
+  31:Core/Src/stm32f4xx_hal_msp.c **** 
+  32:Core/Src/stm32f4xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
+  33:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Define */
+  34:Core/Src/stm32f4xx_hal_msp.c **** 
+  35:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Define */
+  36:Core/Src/stm32f4xx_hal_msp.c **** 
+  37:Core/Src/stm32f4xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/
+  38:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN Macro */
+  39:Core/Src/stm32f4xx_hal_msp.c **** 
+  40:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END Macro */
+  41:Core/Src/stm32f4xx_hal_msp.c **** 
+  42:Core/Src/stm32f4xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/
+  43:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PV */
+  44:Core/Src/stm32f4xx_hal_msp.c **** 
+  45:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PV */
+  46:Core/Src/stm32f4xx_hal_msp.c **** 
+  47:Core/Src/stm32f4xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/
+  48:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN PFP */
+  49:Core/Src/stm32f4xx_hal_msp.c **** 
+  50:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END PFP */
+  51:Core/Src/stm32f4xx_hal_msp.c **** 
+  52:Core/Src/stm32f4xx_hal_msp.c **** /* External functions --------------------------------------------------------*/
+  53:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */
+  54:Core/Src/stm32f4xx_hal_msp.c **** 
+  55:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END ExternalFunctions */
+  56:Core/Src/stm32f4xx_hal_msp.c **** 
+  57:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE BEGIN 0 */
+  58:Core/Src/stm32f4xx_hal_msp.c **** 
+  59:Core/Src/stm32f4xx_hal_msp.c **** /* USER CODE END 0 */
+  60:Core/Src/stm32f4xx_hal_msp.c **** /**
+  61:Core/Src/stm32f4xx_hal_msp.c ****   * Initializes the Global MSP.
+  62:Core/Src/stm32f4xx_hal_msp.c ****   */
+  63:Core/Src/stm32f4xx_hal_msp.c **** void HAL_MspInit(void)
+  64:Core/Src/stm32f4xx_hal_msp.c **** {
+  29              		.loc 1 64 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 8
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33              		@ link register save eliminated.
+  34 0000 82B0     		sub	sp, sp, #8
+  35              	.LCFI0:
+  36              		.cfi_def_cfa_offset 8
+  65:Core/Src/stm32f4xx_hal_msp.c **** 
+  66:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 0 */
+  67:Core/Src/stm32f4xx_hal_msp.c **** 
+  68:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END MspInit 0 */
+  69:Core/Src/stm32f4xx_hal_msp.c **** 
+  70:Core/Src/stm32f4xx_hal_msp.c ****   __HAL_RCC_SYSCFG_CLK_ENABLE();
+  37              		.loc 1 70 3 view .LVU1
+  38              	.LBB2:
+  39              		.loc 1 70 3 view .LVU2
+  40 0002 0021     		movs	r1, #0
+  41 0004 0091     		str	r1, [sp]
+  42              		.loc 1 70 3 view .LVU3
+  43 0006 0B4B     		ldr	r3, .L3
+  44 0008 5A6C     		ldr	r2, [r3, #68]
+  45 000a 42F48042 		orr	r2, r2, #16384
+ARM GAS  /tmp/ccE2gFHF.s 			page 3
+
+
+  46 000e 5A64     		str	r2, [r3, #68]
+  47              		.loc 1 70 3 view .LVU4
+  48 0010 5A6C     		ldr	r2, [r3, #68]
+  49 0012 02F48042 		and	r2, r2, #16384
+  50 0016 0092     		str	r2, [sp]
+  51              		.loc 1 70 3 view .LVU5
+  52 0018 009A     		ldr	r2, [sp]
+  53              	.LBE2:
+  54              		.loc 1 70 3 view .LVU6
+  71:Core/Src/stm32f4xx_hal_msp.c ****   __HAL_RCC_PWR_CLK_ENABLE();
+  55              		.loc 1 71 3 view .LVU7
+  56              	.LBB3:
+  57              		.loc 1 71 3 view .LVU8
+  58 001a 0191     		str	r1, [sp, #4]
+  59              		.loc 1 71 3 view .LVU9
+  60 001c 1A6C     		ldr	r2, [r3, #64]
+  61 001e 42F08052 		orr	r2, r2, #268435456
+  62 0022 1A64     		str	r2, [r3, #64]
+  63              		.loc 1 71 3 view .LVU10
+  64 0024 1B6C     		ldr	r3, [r3, #64]
+  65 0026 03F08053 		and	r3, r3, #268435456
+  66 002a 0193     		str	r3, [sp, #4]
+  67              		.loc 1 71 3 view .LVU11
+  68 002c 019B     		ldr	r3, [sp, #4]
+  69              	.LBE3:
+  70              		.loc 1 71 3 view .LVU12
+  72:Core/Src/stm32f4xx_hal_msp.c **** 
+  73:Core/Src/stm32f4xx_hal_msp.c ****   /* System interrupt init*/
+  74:Core/Src/stm32f4xx_hal_msp.c **** 
+  75:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE BEGIN MspInit 1 */
+  76:Core/Src/stm32f4xx_hal_msp.c **** 
+  77:Core/Src/stm32f4xx_hal_msp.c ****   /* USER CODE END MspInit 1 */
+  78:Core/Src/stm32f4xx_hal_msp.c **** }
+  71              		.loc 1 78 1 is_stmt 0 view .LVU13
+  72 002e 02B0     		add	sp, sp, #8
+  73              	.LCFI1:
+  74              		.cfi_def_cfa_offset 0
+  75              		@ sp needed
+  76 0030 7047     		bx	lr
+  77              	.L4:
+  78 0032 00BF     		.align	2
+  79              	.L3:
+  80 0034 00380240 		.word	1073887232
+  81              		.cfi_endproc
+  82              	.LFE134:
+  84              		.section	.text.HAL_UART_MspInit,"ax",%progbits
+  85              		.align	1
+  86              		.global	HAL_UART_MspInit
+  87              		.syntax unified
+  88              		.thumb
+  89              		.thumb_func
+  90              		.fpu fpv4-sp-d16
+  92              	HAL_UART_MspInit:
+  93              	.LVL0:
+  94              	.LFB135:
+  79:Core/Src/stm32f4xx_hal_msp.c **** 
+  80:Core/Src/stm32f4xx_hal_msp.c **** /**
+ARM GAS  /tmp/ccE2gFHF.s 			page 4
+
+
+  81:Core/Src/stm32f4xx_hal_msp.c ****   * @brief UART MSP Initialization
+  82:Core/Src/stm32f4xx_hal_msp.c ****   * This function configures the hardware resources used in this example
+  83:Core/Src/stm32f4xx_hal_msp.c ****   * @param huart: UART handle pointer
+  84:Core/Src/stm32f4xx_hal_msp.c ****   * @retval None
+  85:Core/Src/stm32f4xx_hal_msp.c ****   */
+  86:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+  87:Core/Src/stm32f4xx_hal_msp.c **** {
+  95              		.loc 1 87 1 is_stmt 1 view -0
+  96              		.cfi_startproc
+  97              		@ args = 0, pretend = 0, frame = 32
+  98              		@ frame_needed = 0, uses_anonymous_args = 0
+  99              		.loc 1 87 1 is_stmt 0 view .LVU15
+ 100 0000 00B5     		push	{lr}
+ 101              	.LCFI2:
+ 102              		.cfi_def_cfa_offset 4
+ 103              		.cfi_offset 14, -4
+ 104 0002 89B0     		sub	sp, sp, #36
+ 105              	.LCFI3:
+ 106              		.cfi_def_cfa_offset 40
+  88:Core/Src/stm32f4xx_hal_msp.c ****   GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 107              		.loc 1 88 3 is_stmt 1 view .LVU16
+ 108              		.loc 1 88 20 is_stmt 0 view .LVU17
+ 109 0004 0023     		movs	r3, #0
+ 110 0006 0393     		str	r3, [sp, #12]
+ 111 0008 0493     		str	r3, [sp, #16]
+ 112 000a 0593     		str	r3, [sp, #20]
+ 113 000c 0693     		str	r3, [sp, #24]
+ 114 000e 0793     		str	r3, [sp, #28]
+  89:Core/Src/stm32f4xx_hal_msp.c ****   if(huart->Instance==USART2)
+ 115              		.loc 1 89 3 is_stmt 1 view .LVU18
+ 116              		.loc 1 89 11 is_stmt 0 view .LVU19
+ 117 0010 0268     		ldr	r2, [r0]
+ 118              		.loc 1 89 5 view .LVU20
+ 119 0012 144B     		ldr	r3, .L9
+ 120 0014 9A42     		cmp	r2, r3
+ 121 0016 02D0     		beq	.L8
+ 122              	.LVL1:
+ 123              	.L5:
+  90:Core/Src/stm32f4xx_hal_msp.c ****   {
+  91:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE BEGIN USART2_MspInit 0 */
+  92:Core/Src/stm32f4xx_hal_msp.c **** 
+  93:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE END USART2_MspInit 0 */
+  94:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock enable */
+  95:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_USART2_CLK_ENABLE();
+  96:Core/Src/stm32f4xx_hal_msp.c **** 
+  97:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_GPIOA_CLK_ENABLE();
+  98:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+  99:Core/Src/stm32f4xx_hal_msp.c ****     PA2     ------> USART2_TX
+ 100:Core/Src/stm32f4xx_hal_msp.c ****     PA3     ------> USART2_RX
+ 101:Core/Src/stm32f4xx_hal_msp.c ****     */
+ 102:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pin = USART_TX_Pin|USART_RX_Pin;
+ 103:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 104:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 105:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 106:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+ 107:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 108:Core/Src/stm32f4xx_hal_msp.c **** 
+ARM GAS  /tmp/ccE2gFHF.s 			page 5
+
+
+ 109:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE BEGIN USART2_MspInit 1 */
+ 110:Core/Src/stm32f4xx_hal_msp.c **** 
+ 111:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE END USART2_MspInit 1 */
+ 112:Core/Src/stm32f4xx_hal_msp.c **** 
+ 113:Core/Src/stm32f4xx_hal_msp.c ****   }
+ 114:Core/Src/stm32f4xx_hal_msp.c **** 
+ 115:Core/Src/stm32f4xx_hal_msp.c **** }
+ 124              		.loc 1 115 1 view .LVU21
+ 125 0018 09B0     		add	sp, sp, #36
+ 126              	.LCFI4:
+ 127              		.cfi_remember_state
+ 128              		.cfi_def_cfa_offset 4
+ 129              		@ sp needed
+ 130 001a 5DF804FB 		ldr	pc, [sp], #4
+ 131              	.LVL2:
+ 132              	.L8:
+ 133              	.LCFI5:
+ 134              		.cfi_restore_state
+  95:Core/Src/stm32f4xx_hal_msp.c **** 
+ 135              		.loc 1 95 5 is_stmt 1 view .LVU22
+ 136              	.LBB4:
+  95:Core/Src/stm32f4xx_hal_msp.c **** 
+ 137              		.loc 1 95 5 view .LVU23
+ 138 001e 0021     		movs	r1, #0
+ 139 0020 0191     		str	r1, [sp, #4]
+  95:Core/Src/stm32f4xx_hal_msp.c **** 
+ 140              		.loc 1 95 5 view .LVU24
+ 141 0022 03F5FA33 		add	r3, r3, #128000
+ 142 0026 1A6C     		ldr	r2, [r3, #64]
+ 143 0028 42F40032 		orr	r2, r2, #131072
+ 144 002c 1A64     		str	r2, [r3, #64]
+  95:Core/Src/stm32f4xx_hal_msp.c **** 
+ 145              		.loc 1 95 5 view .LVU25
+ 146 002e 1A6C     		ldr	r2, [r3, #64]
+ 147 0030 02F40032 		and	r2, r2, #131072
+ 148 0034 0192     		str	r2, [sp, #4]
+  95:Core/Src/stm32f4xx_hal_msp.c **** 
+ 149              		.loc 1 95 5 view .LVU26
+ 150 0036 019A     		ldr	r2, [sp, #4]
+ 151              	.LBE4:
+  95:Core/Src/stm32f4xx_hal_msp.c **** 
+ 152              		.loc 1 95 5 view .LVU27
+  97:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+ 153              		.loc 1 97 5 view .LVU28
+ 154              	.LBB5:
+  97:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+ 155              		.loc 1 97 5 view .LVU29
+ 156 0038 0291     		str	r1, [sp, #8]
+  97:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+ 157              		.loc 1 97 5 view .LVU30
+ 158 003a 1A6B     		ldr	r2, [r3, #48]
+ 159 003c 42F00102 		orr	r2, r2, #1
+ 160 0040 1A63     		str	r2, [r3, #48]
+  97:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+ 161              		.loc 1 97 5 view .LVU31
+ 162 0042 1B6B     		ldr	r3, [r3, #48]
+ 163 0044 03F00103 		and	r3, r3, #1
+ARM GAS  /tmp/ccE2gFHF.s 			page 6
+
+
+ 164 0048 0293     		str	r3, [sp, #8]
+  97:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+ 165              		.loc 1 97 5 view .LVU32
+ 166 004a 029B     		ldr	r3, [sp, #8]
+ 167              	.LBE5:
+  97:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+ 168              		.loc 1 97 5 view .LVU33
+ 102:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 169              		.loc 1 102 5 view .LVU34
+ 102:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ 170              		.loc 1 102 25 is_stmt 0 view .LVU35
+ 171 004c 0C23     		movs	r3, #12
+ 172 004e 0393     		str	r3, [sp, #12]
+ 103:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 173              		.loc 1 103 5 is_stmt 1 view .LVU36
+ 103:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 174              		.loc 1 103 26 is_stmt 0 view .LVU37
+ 175 0050 0223     		movs	r3, #2
+ 176 0052 0493     		str	r3, [sp, #16]
+ 104:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 177              		.loc 1 104 5 is_stmt 1 view .LVU38
+ 105:Core/Src/stm32f4xx_hal_msp.c ****     GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
+ 178              		.loc 1 105 5 view .LVU39
+ 106:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 179              		.loc 1 106 5 view .LVU40
+ 106:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 180              		.loc 1 106 31 is_stmt 0 view .LVU41
+ 181 0054 0723     		movs	r3, #7
+ 182 0056 0793     		str	r3, [sp, #28]
+ 107:Core/Src/stm32f4xx_hal_msp.c **** 
+ 183              		.loc 1 107 5 is_stmt 1 view .LVU42
+ 184 0058 03A9     		add	r1, sp, #12
+ 185 005a 0348     		ldr	r0, .L9+4
+ 186              	.LVL3:
+ 107:Core/Src/stm32f4xx_hal_msp.c **** 
+ 187              		.loc 1 107 5 is_stmt 0 view .LVU43
+ 188 005c FFF7FEFF 		bl	HAL_GPIO_Init
+ 189              	.LVL4:
+ 190              		.loc 1 115 1 view .LVU44
+ 191 0060 DAE7     		b	.L5
+ 192              	.L10:
+ 193 0062 00BF     		.align	2
+ 194              	.L9:
+ 195 0064 00440040 		.word	1073759232
+ 196 0068 00000240 		.word	1073872896
+ 197              		.cfi_endproc
+ 198              	.LFE135:
+ 200              		.section	.text.HAL_UART_MspDeInit,"ax",%progbits
+ 201              		.align	1
+ 202              		.global	HAL_UART_MspDeInit
+ 203              		.syntax unified
+ 204              		.thumb
+ 205              		.thumb_func
+ 206              		.fpu fpv4-sp-d16
+ 208              	HAL_UART_MspDeInit:
+ 209              	.LVL5:
+ 210              	.LFB136:
+ARM GAS  /tmp/ccE2gFHF.s 			page 7
+
+
+ 116:Core/Src/stm32f4xx_hal_msp.c **** 
+ 117:Core/Src/stm32f4xx_hal_msp.c **** /**
+ 118:Core/Src/stm32f4xx_hal_msp.c ****   * @brief UART MSP De-Initialization
+ 119:Core/Src/stm32f4xx_hal_msp.c ****   * This function freeze the hardware resources used in this example
+ 120:Core/Src/stm32f4xx_hal_msp.c ****   * @param huart: UART handle pointer
+ 121:Core/Src/stm32f4xx_hal_msp.c ****   * @retval None
+ 122:Core/Src/stm32f4xx_hal_msp.c ****   */
+ 123:Core/Src/stm32f4xx_hal_msp.c **** void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+ 124:Core/Src/stm32f4xx_hal_msp.c **** {
+ 211              		.loc 1 124 1 is_stmt 1 view -0
+ 212              		.cfi_startproc
+ 213              		@ args = 0, pretend = 0, frame = 0
+ 214              		@ frame_needed = 0, uses_anonymous_args = 0
+ 215              		.loc 1 124 1 is_stmt 0 view .LVU46
+ 216 0000 08B5     		push	{r3, lr}
+ 217              	.LCFI6:
+ 218              		.cfi_def_cfa_offset 8
+ 219              		.cfi_offset 3, -8
+ 220              		.cfi_offset 14, -4
+ 125:Core/Src/stm32f4xx_hal_msp.c ****   if(huart->Instance==USART2)
+ 221              		.loc 1 125 3 is_stmt 1 view .LVU47
+ 222              		.loc 1 125 11 is_stmt 0 view .LVU48
+ 223 0002 0268     		ldr	r2, [r0]
+ 224              		.loc 1 125 5 view .LVU49
+ 225 0004 064B     		ldr	r3, .L15
+ 226 0006 9A42     		cmp	r2, r3
+ 227 0008 00D0     		beq	.L14
+ 228              	.LVL6:
+ 229              	.L11:
+ 126:Core/Src/stm32f4xx_hal_msp.c ****   {
+ 127:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE BEGIN USART2_MspDeInit 0 */
+ 128:Core/Src/stm32f4xx_hal_msp.c **** 
+ 129:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE END USART2_MspDeInit 0 */
+ 130:Core/Src/stm32f4xx_hal_msp.c ****     /* Peripheral clock disable */
+ 131:Core/Src/stm32f4xx_hal_msp.c ****     __HAL_RCC_USART2_CLK_DISABLE();
+ 132:Core/Src/stm32f4xx_hal_msp.c **** 
+ 133:Core/Src/stm32f4xx_hal_msp.c ****     /**USART2 GPIO Configuration
+ 134:Core/Src/stm32f4xx_hal_msp.c ****     PA2     ------> USART2_TX
+ 135:Core/Src/stm32f4xx_hal_msp.c ****     PA3     ------> USART2_RX
+ 136:Core/Src/stm32f4xx_hal_msp.c ****     */
+ 137:Core/Src/stm32f4xx_hal_msp.c ****     HAL_GPIO_DeInit(GPIOA, USART_TX_Pin|USART_RX_Pin);
+ 138:Core/Src/stm32f4xx_hal_msp.c **** 
+ 139:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE BEGIN USART2_MspDeInit 1 */
+ 140:Core/Src/stm32f4xx_hal_msp.c **** 
+ 141:Core/Src/stm32f4xx_hal_msp.c ****     /* USER CODE END USART2_MspDeInit 1 */
+ 142:Core/Src/stm32f4xx_hal_msp.c ****   }
+ 143:Core/Src/stm32f4xx_hal_msp.c **** 
+ 144:Core/Src/stm32f4xx_hal_msp.c **** }
+ 230              		.loc 1 144 1 view .LVU50
+ 231 000a 08BD     		pop	{r3, pc}
+ 232              	.LVL7:
+ 233              	.L14:
+ 131:Core/Src/stm32f4xx_hal_msp.c **** 
+ 234              		.loc 1 131 5 is_stmt 1 view .LVU51
+ 235 000c 054A     		ldr	r2, .L15+4
+ 236 000e 136C     		ldr	r3, [r2, #64]
+ 237 0010 23F40033 		bic	r3, r3, #131072
+ARM GAS  /tmp/ccE2gFHF.s 			page 8
+
+
+ 238 0014 1364     		str	r3, [r2, #64]
+ 137:Core/Src/stm32f4xx_hal_msp.c **** 
+ 239              		.loc 1 137 5 view .LVU52
+ 240 0016 0C21     		movs	r1, #12
+ 241 0018 0348     		ldr	r0, .L15+8
+ 242              	.LVL8:
+ 137:Core/Src/stm32f4xx_hal_msp.c **** 
+ 243              		.loc 1 137 5 is_stmt 0 view .LVU53
+ 244 001a FFF7FEFF 		bl	HAL_GPIO_DeInit
+ 245              	.LVL9:
+ 246              		.loc 1 144 1 view .LVU54
+ 247 001e F4E7     		b	.L11
+ 248              	.L16:
+ 249              		.align	2
+ 250              	.L15:
+ 251 0020 00440040 		.word	1073759232
+ 252 0024 00380240 		.word	1073887232
+ 253 0028 00000240 		.word	1073872896
+ 254              		.cfi_endproc
+ 255              	.LFE136:
+ 257              		.text
+ 258              	.Letext0:
+ 259              		.file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h"
+ 260              		.file 3 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h"
+ 261              		.file 4 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h"
+ 262              		.file 5 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h"
+ 263              		.file 6 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h"
+ 264              		.file 7 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h"
+ARM GAS  /tmp/ccE2gFHF.s 			page 9
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_hal_msp.c
+     /tmp/ccE2gFHF.s:18     .text.HAL_MspInit:0000000000000000 $t
+     /tmp/ccE2gFHF.s:26     .text.HAL_MspInit:0000000000000000 HAL_MspInit
+     /tmp/ccE2gFHF.s:80     .text.HAL_MspInit:0000000000000034 $d
+     /tmp/ccE2gFHF.s:85     .text.HAL_UART_MspInit:0000000000000000 $t
+     /tmp/ccE2gFHF.s:92     .text.HAL_UART_MspInit:0000000000000000 HAL_UART_MspInit
+     /tmp/ccE2gFHF.s:195    .text.HAL_UART_MspInit:0000000000000064 $d
+     /tmp/ccE2gFHF.s:201    .text.HAL_UART_MspDeInit:0000000000000000 $t
+     /tmp/ccE2gFHF.s:208    .text.HAL_UART_MspDeInit:0000000000000000 HAL_UART_MspDeInit
+     /tmp/ccE2gFHF.s:251    .text.HAL_UART_MspDeInit:0000000000000020 $d
+
+UNDEFINED SYMBOLS
+HAL_GPIO_Init
+HAL_GPIO_DeInit

build/stm32f4xx_hal_pwr.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_pwr.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_pwr_ex.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_pwr_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_rcc.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_rcc.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_rcc_ex.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_rcc_ex.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_hal_uart.d

@@ -0,0 +1,52 @@
+build/stm32f4xx_hal_uart.o: \
+ Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/stm32f4xx_it.d

@@ -0,0 +1,54 @@
+build/stm32f4xx_it.o: Core/Src/stm32f4xx_it.c Core/Inc/main.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h \
+ Core/Inc/stm32f4xx_it.h
+Core/Inc/main.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:
+Core/Inc/stm32f4xx_it.h:

build/stm32f4xx_it.lst

@@ -0,0 +1,457 @@
+ARM GAS  /tmp/ccjI409r.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.eabi_attribute 27, 1
+   3              		.eabi_attribute 28, 1
+   4              		.eabi_attribute 20, 1
+   5              		.eabi_attribute 21, 1
+   6              		.eabi_attribute 23, 3
+   7              		.eabi_attribute 24, 1
+   8              		.eabi_attribute 25, 1
+   9              		.eabi_attribute 26, 1
+  10              		.eabi_attribute 30, 1
+  11              		.eabi_attribute 34, 1
+  12              		.eabi_attribute 18, 4
+  13              		.file	"stm32f4xx_it.c"
+  14              		.text
+  15              	.Ltext0:
+  16              		.cfi_sections	.debug_frame
+  17              		.section	.text.NMI_Handler,"ax",%progbits
+  18              		.align	1
+  19              		.global	NMI_Handler
+  20              		.arch armv7e-m
+  21              		.syntax unified
+  22              		.thumb
+  23              		.thumb_func
+  24              		.fpu fpv4-sp-d16
+  26              	NMI_Handler:
+  27              	.LFB134:
+  28              		.file 1 "Core/Src/stm32f4xx_it.c"
+   1:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Header */
+   2:Core/Src/stm32f4xx_it.c **** /**
+   3:Core/Src/stm32f4xx_it.c ****   ******************************************************************************
+   4:Core/Src/stm32f4xx_it.c ****   * @file    stm32f4xx_it.c
+   5:Core/Src/stm32f4xx_it.c ****   * @brief   Interrupt Service Routines.
+   6:Core/Src/stm32f4xx_it.c ****   ******************************************************************************
+   7:Core/Src/stm32f4xx_it.c ****   * @attention
+   8:Core/Src/stm32f4xx_it.c ****   *
+   9:Core/Src/stm32f4xx_it.c ****   * Copyright (c) 2025 STMicroelectronics.
+  10:Core/Src/stm32f4xx_it.c ****   * All rights reserved.
+  11:Core/Src/stm32f4xx_it.c ****   *
+  12:Core/Src/stm32f4xx_it.c ****   * This software is licensed under terms that can be found in the LICENSE file
+  13:Core/Src/stm32f4xx_it.c ****   * in the root directory of this software component.
+  14:Core/Src/stm32f4xx_it.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
+  15:Core/Src/stm32f4xx_it.c ****   *
+  16:Core/Src/stm32f4xx_it.c ****   ******************************************************************************
+  17:Core/Src/stm32f4xx_it.c ****   */
+  18:Core/Src/stm32f4xx_it.c **** /* USER CODE END Header */
+  19:Core/Src/stm32f4xx_it.c **** 
+  20:Core/Src/stm32f4xx_it.c **** /* Includes ------------------------------------------------------------------*/
+  21:Core/Src/stm32f4xx_it.c **** #include "main.h"
+  22:Core/Src/stm32f4xx_it.c **** #include "stm32f4xx_it.h"
+  23:Core/Src/stm32f4xx_it.c **** /* Private includes ----------------------------------------------------------*/
+  24:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN Includes */
+  25:Core/Src/stm32f4xx_it.c **** /* USER CODE END Includes */
+  26:Core/Src/stm32f4xx_it.c **** 
+  27:Core/Src/stm32f4xx_it.c **** /* Private typedef -----------------------------------------------------------*/
+  28:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN TD */
+  29:Core/Src/stm32f4xx_it.c **** 
+  30:Core/Src/stm32f4xx_it.c **** /* USER CODE END TD */
+ARM GAS  /tmp/ccjI409r.s 			page 2
+
+
+  31:Core/Src/stm32f4xx_it.c **** 
+  32:Core/Src/stm32f4xx_it.c **** /* Private define ------------------------------------------------------------*/
+  33:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PD */
+  34:Core/Src/stm32f4xx_it.c **** 
+  35:Core/Src/stm32f4xx_it.c **** /* USER CODE END PD */
+  36:Core/Src/stm32f4xx_it.c **** 
+  37:Core/Src/stm32f4xx_it.c **** /* Private macro -------------------------------------------------------------*/
+  38:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PM */
+  39:Core/Src/stm32f4xx_it.c **** 
+  40:Core/Src/stm32f4xx_it.c **** /* USER CODE END PM */
+  41:Core/Src/stm32f4xx_it.c **** 
+  42:Core/Src/stm32f4xx_it.c **** /* Private variables ---------------------------------------------------------*/
+  43:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PV */
+  44:Core/Src/stm32f4xx_it.c **** 
+  45:Core/Src/stm32f4xx_it.c **** /* USER CODE END PV */
+  46:Core/Src/stm32f4xx_it.c **** 
+  47:Core/Src/stm32f4xx_it.c **** /* Private function prototypes -----------------------------------------------*/
+  48:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN PFP */
+  49:Core/Src/stm32f4xx_it.c **** 
+  50:Core/Src/stm32f4xx_it.c **** /* USER CODE END PFP */
+  51:Core/Src/stm32f4xx_it.c **** 
+  52:Core/Src/stm32f4xx_it.c **** /* Private user code ---------------------------------------------------------*/
+  53:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN 0 */
+  54:Core/Src/stm32f4xx_it.c **** 
+  55:Core/Src/stm32f4xx_it.c **** /* USER CODE END 0 */
+  56:Core/Src/stm32f4xx_it.c **** 
+  57:Core/Src/stm32f4xx_it.c **** /* External variables --------------------------------------------------------*/
+  58:Core/Src/stm32f4xx_it.c **** 
+  59:Core/Src/stm32f4xx_it.c **** /* USER CODE BEGIN EV */
+  60:Core/Src/stm32f4xx_it.c **** 
+  61:Core/Src/stm32f4xx_it.c **** /* USER CODE END EV */
+  62:Core/Src/stm32f4xx_it.c **** 
+  63:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
+  64:Core/Src/stm32f4xx_it.c **** /*           Cortex-M4 Processor Interruption and Exception Handlers          */
+  65:Core/Src/stm32f4xx_it.c **** /******************************************************************************/
+  66:Core/Src/stm32f4xx_it.c **** /**
+  67:Core/Src/stm32f4xx_it.c ****   * @brief This function handles Non maskable interrupt.
+  68:Core/Src/stm32f4xx_it.c ****   */
+  69:Core/Src/stm32f4xx_it.c **** void NMI_Handler(void)
+  70:Core/Src/stm32f4xx_it.c **** {
+  29              		.loc 1 70 1 view -0
+  30              		.cfi_startproc
+  31              		@ Volatile: function does not return.
+  32              		@ args = 0, pretend = 0, frame = 0
+  33              		@ frame_needed = 0, uses_anonymous_args = 0
+  34              		@ link register save eliminated.
+  35              	.L2:
+  71:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+  72:Core/Src/stm32f4xx_it.c **** 
+  73:Core/Src/stm32f4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 0 */
+  74:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  75:Core/Src/stm32f4xx_it.c ****    while (1)
+  36              		.loc 1 75 4 discriminator 1 view .LVU1
+  76:Core/Src/stm32f4xx_it.c ****   {
+  77:Core/Src/stm32f4xx_it.c ****   }
+  37              		.loc 1 77 3 discriminator 1 view .LVU2
+  75:Core/Src/stm32f4xx_it.c ****   {
+ARM GAS  /tmp/ccjI409r.s 			page 3
+
+
+  38              		.loc 1 75 10 discriminator 1 view .LVU3
+  39 0000 FEE7     		b	.L2
+  40              		.cfi_endproc
+  41              	.LFE134:
+  43              		.section	.text.HardFault_Handler,"ax",%progbits
+  44              		.align	1
+  45              		.global	HardFault_Handler
+  46              		.syntax unified
+  47              		.thumb
+  48              		.thumb_func
+  49              		.fpu fpv4-sp-d16
+  51              	HardFault_Handler:
+  52              	.LFB135:
+  78:Core/Src/stm32f4xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 1 */
+  79:Core/Src/stm32f4xx_it.c **** }
+  80:Core/Src/stm32f4xx_it.c **** 
+  81:Core/Src/stm32f4xx_it.c **** /**
+  82:Core/Src/stm32f4xx_it.c ****   * @brief This function handles Hard fault interrupt.
+  83:Core/Src/stm32f4xx_it.c ****   */
+  84:Core/Src/stm32f4xx_it.c **** void HardFault_Handler(void)
+  85:Core/Src/stm32f4xx_it.c **** {
+  53              		.loc 1 85 1 view -0
+  54              		.cfi_startproc
+  55              		@ Volatile: function does not return.
+  56              		@ args = 0, pretend = 0, frame = 0
+  57              		@ frame_needed = 0, uses_anonymous_args = 0
+  58              		@ link register save eliminated.
+  59              	.L4:
+  86:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN HardFault_IRQn 0 */
+  87:Core/Src/stm32f4xx_it.c **** 
+  88:Core/Src/stm32f4xx_it.c ****   /* USER CODE END HardFault_IRQn 0 */
+  89:Core/Src/stm32f4xx_it.c ****   while (1)
+  60              		.loc 1 89 3 discriminator 1 view .LVU5
+  90:Core/Src/stm32f4xx_it.c ****   {
+  91:Core/Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+  92:Core/Src/stm32f4xx_it.c ****     /* USER CODE END W1_HardFault_IRQn 0 */
+  93:Core/Src/stm32f4xx_it.c ****   }
+  61              		.loc 1 93 3 discriminator 1 view .LVU6
+  89:Core/Src/stm32f4xx_it.c ****   {
+  62              		.loc 1 89 9 discriminator 1 view .LVU7
+  63 0000 FEE7     		b	.L4
+  64              		.cfi_endproc
+  65              	.LFE135:
+  67              		.section	.text.MemManage_Handler,"ax",%progbits
+  68              		.align	1
+  69              		.global	MemManage_Handler
+  70              		.syntax unified
+  71              		.thumb
+  72              		.thumb_func
+  73              		.fpu fpv4-sp-d16
+  75              	MemManage_Handler:
+  76              	.LFB136:
+  94:Core/Src/stm32f4xx_it.c **** }
+  95:Core/Src/stm32f4xx_it.c **** 
+  96:Core/Src/stm32f4xx_it.c **** /**
+  97:Core/Src/stm32f4xx_it.c ****   * @brief This function handles Memory management fault.
+  98:Core/Src/stm32f4xx_it.c ****   */
+ARM GAS  /tmp/ccjI409r.s 			page 4
+
+
+  99:Core/Src/stm32f4xx_it.c **** void MemManage_Handler(void)
+ 100:Core/Src/stm32f4xx_it.c **** {
+  77              		.loc 1 100 1 view -0
+  78              		.cfi_startproc
+  79              		@ Volatile: function does not return.
+  80              		@ args = 0, pretend = 0, frame = 0
+  81              		@ frame_needed = 0, uses_anonymous_args = 0
+  82              		@ link register save eliminated.
+  83              	.L6:
+ 101:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+ 102:Core/Src/stm32f4xx_it.c **** 
+ 103:Core/Src/stm32f4xx_it.c ****   /* USER CODE END MemoryManagement_IRQn 0 */
+ 104:Core/Src/stm32f4xx_it.c ****   while (1)
+  84              		.loc 1 104 3 discriminator 1 view .LVU9
+ 105:Core/Src/stm32f4xx_it.c ****   {
+ 106:Core/Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ 107:Core/Src/stm32f4xx_it.c ****     /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ 108:Core/Src/stm32f4xx_it.c ****   }
+  85              		.loc 1 108 3 discriminator 1 view .LVU10
+ 104:Core/Src/stm32f4xx_it.c ****   {
+  86              		.loc 1 104 9 discriminator 1 view .LVU11
+  87 0000 FEE7     		b	.L6
+  88              		.cfi_endproc
+  89              	.LFE136:
+  91              		.section	.text.BusFault_Handler,"ax",%progbits
+  92              		.align	1
+  93              		.global	BusFault_Handler
+  94              		.syntax unified
+  95              		.thumb
+  96              		.thumb_func
+  97              		.fpu fpv4-sp-d16
+  99              	BusFault_Handler:
+ 100              	.LFB137:
+ 109:Core/Src/stm32f4xx_it.c **** }
+ 110:Core/Src/stm32f4xx_it.c **** 
+ 111:Core/Src/stm32f4xx_it.c **** /**
+ 112:Core/Src/stm32f4xx_it.c ****   * @brief This function handles Pre-fetch fault, memory access fault.
+ 113:Core/Src/stm32f4xx_it.c ****   */
+ 114:Core/Src/stm32f4xx_it.c **** void BusFault_Handler(void)
+ 115:Core/Src/stm32f4xx_it.c **** {
+ 101              		.loc 1 115 1 view -0
+ 102              		.cfi_startproc
+ 103              		@ Volatile: function does not return.
+ 104              		@ args = 0, pretend = 0, frame = 0
+ 105              		@ frame_needed = 0, uses_anonymous_args = 0
+ 106              		@ link register save eliminated.
+ 107              	.L8:
+ 116:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN BusFault_IRQn 0 */
+ 117:Core/Src/stm32f4xx_it.c **** 
+ 118:Core/Src/stm32f4xx_it.c ****   /* USER CODE END BusFault_IRQn 0 */
+ 119:Core/Src/stm32f4xx_it.c ****   while (1)
+ 108              		.loc 1 119 3 discriminator 1 view .LVU13
+ 120:Core/Src/stm32f4xx_it.c ****   {
+ 121:Core/Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ 122:Core/Src/stm32f4xx_it.c ****     /* USER CODE END W1_BusFault_IRQn 0 */
+ 123:Core/Src/stm32f4xx_it.c ****   }
+ 109              		.loc 1 123 3 discriminator 1 view .LVU14
+ARM GAS  /tmp/ccjI409r.s 			page 5
+
+
+ 119:Core/Src/stm32f4xx_it.c ****   {
+ 110              		.loc 1 119 9 discriminator 1 view .LVU15
+ 111 0000 FEE7     		b	.L8
+ 112              		.cfi_endproc
+ 113              	.LFE137:
+ 115              		.section	.text.UsageFault_Handler,"ax",%progbits
+ 116              		.align	1
+ 117              		.global	UsageFault_Handler
+ 118              		.syntax unified
+ 119              		.thumb
+ 120              		.thumb_func
+ 121              		.fpu fpv4-sp-d16
+ 123              	UsageFault_Handler:
+ 124              	.LFB138:
+ 124:Core/Src/stm32f4xx_it.c **** }
+ 125:Core/Src/stm32f4xx_it.c **** 
+ 126:Core/Src/stm32f4xx_it.c **** /**
+ 127:Core/Src/stm32f4xx_it.c ****   * @brief This function handles Undefined instruction or illegal state.
+ 128:Core/Src/stm32f4xx_it.c ****   */
+ 129:Core/Src/stm32f4xx_it.c **** void UsageFault_Handler(void)
+ 130:Core/Src/stm32f4xx_it.c **** {
+ 125              		.loc 1 130 1 view -0
+ 126              		.cfi_startproc
+ 127              		@ Volatile: function does not return.
+ 128              		@ args = 0, pretend = 0, frame = 0
+ 129              		@ frame_needed = 0, uses_anonymous_args = 0
+ 130              		@ link register save eliminated.
+ 131              	.L10:
+ 131:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN UsageFault_IRQn 0 */
+ 132:Core/Src/stm32f4xx_it.c **** 
+ 133:Core/Src/stm32f4xx_it.c ****   /* USER CODE END UsageFault_IRQn 0 */
+ 134:Core/Src/stm32f4xx_it.c ****   while (1)
+ 132              		.loc 1 134 3 discriminator 1 view .LVU17
+ 135:Core/Src/stm32f4xx_it.c ****   {
+ 136:Core/Src/stm32f4xx_it.c ****     /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ 137:Core/Src/stm32f4xx_it.c ****     /* USER CODE END W1_UsageFault_IRQn 0 */
+ 138:Core/Src/stm32f4xx_it.c ****   }
+ 133              		.loc 1 138 3 discriminator 1 view .LVU18
+ 134:Core/Src/stm32f4xx_it.c ****   {
+ 134              		.loc 1 134 9 discriminator 1 view .LVU19
+ 135 0000 FEE7     		b	.L10
+ 136              		.cfi_endproc
+ 137              	.LFE138:
+ 139              		.section	.text.SVC_Handler,"ax",%progbits
+ 140              		.align	1
+ 141              		.global	SVC_Handler
+ 142              		.syntax unified
+ 143              		.thumb
+ 144              		.thumb_func
+ 145              		.fpu fpv4-sp-d16
+ 147              	SVC_Handler:
+ 148              	.LFB139:
+ 139:Core/Src/stm32f4xx_it.c **** }
+ 140:Core/Src/stm32f4xx_it.c **** 
+ 141:Core/Src/stm32f4xx_it.c **** /**
+ 142:Core/Src/stm32f4xx_it.c ****   * @brief This function handles System service call via SWI instruction.
+ 143:Core/Src/stm32f4xx_it.c ****   */
+ARM GAS  /tmp/ccjI409r.s 			page 6
+
+
+ 144:Core/Src/stm32f4xx_it.c **** void SVC_Handler(void)
+ 145:Core/Src/stm32f4xx_it.c **** {
+ 149              		.loc 1 145 1 view -0
+ 150              		.cfi_startproc
+ 151              		@ args = 0, pretend = 0, frame = 0
+ 152              		@ frame_needed = 0, uses_anonymous_args = 0
+ 153              		@ link register save eliminated.
+ 146:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 0 */
+ 147:Core/Src/stm32f4xx_it.c **** 
+ 148:Core/Src/stm32f4xx_it.c ****   /* USER CODE END SVCall_IRQn 0 */
+ 149:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SVCall_IRQn 1 */
+ 150:Core/Src/stm32f4xx_it.c **** 
+ 151:Core/Src/stm32f4xx_it.c ****   /* USER CODE END SVCall_IRQn 1 */
+ 152:Core/Src/stm32f4xx_it.c **** }
+ 154              		.loc 1 152 1 view .LVU21
+ 155 0000 7047     		bx	lr
+ 156              		.cfi_endproc
+ 157              	.LFE139:
+ 159              		.section	.text.DebugMon_Handler,"ax",%progbits
+ 160              		.align	1
+ 161              		.global	DebugMon_Handler
+ 162              		.syntax unified
+ 163              		.thumb
+ 164              		.thumb_func
+ 165              		.fpu fpv4-sp-d16
+ 167              	DebugMon_Handler:
+ 168              	.LFB140:
+ 153:Core/Src/stm32f4xx_it.c **** 
+ 154:Core/Src/stm32f4xx_it.c **** /**
+ 155:Core/Src/stm32f4xx_it.c ****   * @brief This function handles Debug monitor.
+ 156:Core/Src/stm32f4xx_it.c ****   */
+ 157:Core/Src/stm32f4xx_it.c **** void DebugMon_Handler(void)
+ 158:Core/Src/stm32f4xx_it.c **** {
+ 169              		.loc 1 158 1 view -0
+ 170              		.cfi_startproc
+ 171              		@ args = 0, pretend = 0, frame = 0
+ 172              		@ frame_needed = 0, uses_anonymous_args = 0
+ 173              		@ link register save eliminated.
+ 159:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+ 160:Core/Src/stm32f4xx_it.c **** 
+ 161:Core/Src/stm32f4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 0 */
+ 162:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+ 163:Core/Src/stm32f4xx_it.c **** 
+ 164:Core/Src/stm32f4xx_it.c ****   /* USER CODE END DebugMonitor_IRQn 1 */
+ 165:Core/Src/stm32f4xx_it.c **** }
+ 174              		.loc 1 165 1 view .LVU23
+ 175 0000 7047     		bx	lr
+ 176              		.cfi_endproc
+ 177              	.LFE140:
+ 179              		.section	.text.PendSV_Handler,"ax",%progbits
+ 180              		.align	1
+ 181              		.global	PendSV_Handler
+ 182              		.syntax unified
+ 183              		.thumb
+ 184              		.thumb_func
+ 185              		.fpu fpv4-sp-d16
+ 187              	PendSV_Handler:
+ARM GAS  /tmp/ccjI409r.s 			page 7
+
+
+ 188              	.LFB141:
+ 166:Core/Src/stm32f4xx_it.c **** 
+ 167:Core/Src/stm32f4xx_it.c **** /**
+ 168:Core/Src/stm32f4xx_it.c ****   * @brief This function handles Pendable request for system service.
+ 169:Core/Src/stm32f4xx_it.c ****   */
+ 170:Core/Src/stm32f4xx_it.c **** void PendSV_Handler(void)
+ 171:Core/Src/stm32f4xx_it.c **** {
+ 189              		.loc 1 171 1 view -0
+ 190              		.cfi_startproc
+ 191              		@ args = 0, pretend = 0, frame = 0
+ 192              		@ frame_needed = 0, uses_anonymous_args = 0
+ 193              		@ link register save eliminated.
+ 172:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 0 */
+ 173:Core/Src/stm32f4xx_it.c **** 
+ 174:Core/Src/stm32f4xx_it.c ****   /* USER CODE END PendSV_IRQn 0 */
+ 175:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 1 */
+ 176:Core/Src/stm32f4xx_it.c **** 
+ 177:Core/Src/stm32f4xx_it.c ****   /* USER CODE END PendSV_IRQn 1 */
+ 178:Core/Src/stm32f4xx_it.c **** }
+ 194              		.loc 1 178 1 view .LVU25
+ 195 0000 7047     		bx	lr
+ 196              		.cfi_endproc
+ 197              	.LFE141:
+ 199              		.section	.text.SysTick_Handler,"ax",%progbits
+ 200              		.align	1
+ 201              		.global	SysTick_Handler
+ 202              		.syntax unified
+ 203              		.thumb
+ 204              		.thumb_func
+ 205              		.fpu fpv4-sp-d16
+ 207              	SysTick_Handler:
+ 208              	.LFB142:
+ 179:Core/Src/stm32f4xx_it.c **** 
+ 180:Core/Src/stm32f4xx_it.c **** /**
+ 181:Core/Src/stm32f4xx_it.c ****   * @brief This function handles System tick timer.
+ 182:Core/Src/stm32f4xx_it.c ****   */
+ 183:Core/Src/stm32f4xx_it.c **** void SysTick_Handler(void)
+ 184:Core/Src/stm32f4xx_it.c **** {
+ 209              		.loc 1 184 1 view -0
+ 210              		.cfi_startproc
+ 211              		@ args = 0, pretend = 0, frame = 0
+ 212              		@ frame_needed = 0, uses_anonymous_args = 0
+ 213 0000 08B5     		push	{r3, lr}
+ 214              	.LCFI0:
+ 215              		.cfi_def_cfa_offset 8
+ 216              		.cfi_offset 3, -8
+ 217              		.cfi_offset 14, -4
+ 185:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 0 */
+ 186:Core/Src/stm32f4xx_it.c **** 
+ 187:Core/Src/stm32f4xx_it.c ****   /* USER CODE END SysTick_IRQn 0 */
+ 188:Core/Src/stm32f4xx_it.c ****   HAL_IncTick();
+ 218              		.loc 1 188 3 view .LVU27
+ 219 0002 FFF7FEFF 		bl	HAL_IncTick
+ 220              	.LVL0:
+ 189:Core/Src/stm32f4xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 1 */
+ 190:Core/Src/stm32f4xx_it.c **** 
+ 191:Core/Src/stm32f4xx_it.c ****   /* USER CODE END SysTick_IRQn 1 */
+ARM GAS  /tmp/ccjI409r.s 			page 8
+
+
+ 192:Core/Src/stm32f4xx_it.c **** }
+ 221              		.loc 1 192 1 is_stmt 0 view .LVU28
+ 222 0006 08BD     		pop	{r3, pc}
+ 223              		.cfi_endproc
+ 224              	.LFE142:
+ 226              		.text
+ 227              	.Letext0:
+ 228              		.file 2 "Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h"
+ARM GAS  /tmp/ccjI409r.s 			page 9
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f4xx_it.c
+     /tmp/ccjI409r.s:18     .text.NMI_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:26     .text.NMI_Handler:0000000000000000 NMI_Handler
+     /tmp/ccjI409r.s:44     .text.HardFault_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:51     .text.HardFault_Handler:0000000000000000 HardFault_Handler
+     /tmp/ccjI409r.s:68     .text.MemManage_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:75     .text.MemManage_Handler:0000000000000000 MemManage_Handler
+     /tmp/ccjI409r.s:92     .text.BusFault_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:99     .text.BusFault_Handler:0000000000000000 BusFault_Handler
+     /tmp/ccjI409r.s:116    .text.UsageFault_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:123    .text.UsageFault_Handler:0000000000000000 UsageFault_Handler
+     /tmp/ccjI409r.s:140    .text.SVC_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:147    .text.SVC_Handler:0000000000000000 SVC_Handler
+     /tmp/ccjI409r.s:160    .text.DebugMon_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:167    .text.DebugMon_Handler:0000000000000000 DebugMon_Handler
+     /tmp/ccjI409r.s:180    .text.PendSV_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:187    .text.PendSV_Handler:0000000000000000 PendSV_Handler
+     /tmp/ccjI409r.s:200    .text.SysTick_Handler:0000000000000000 $t
+     /tmp/ccjI409r.s:207    .text.SysTick_Handler:0000000000000000 SysTick_Handler
+
+UNDEFINED SYMBOLS
+HAL_IncTick

build/syscalls.d

@@ -0,0 +1 @@
+build/syscalls.o: Core/Src/syscalls.c

build/syscalls.lst

@@ -0,0 +1,900 @@
+ARM GAS  /tmp/ccbJKhct.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.eabi_attribute 27, 1
+   3              		.eabi_attribute 28, 1
+   4              		.eabi_attribute 20, 1
+   5              		.eabi_attribute 21, 1
+   6              		.eabi_attribute 23, 3
+   7              		.eabi_attribute 24, 1
+   8              		.eabi_attribute 25, 1
+   9              		.eabi_attribute 26, 1
+  10              		.eabi_attribute 30, 1
+  11              		.eabi_attribute 34, 1
+  12              		.eabi_attribute 18, 4
+  13              		.file	"syscalls.c"
+  14              		.text
+  15              	.Ltext0:
+  16              		.cfi_sections	.debug_frame
+  17              		.section	.text.initialise_monitor_handles,"ax",%progbits
+  18              		.align	1
+  19              		.global	initialise_monitor_handles
+  20              		.arch armv7e-m
+  21              		.syntax unified
+  22              		.thumb
+  23              		.thumb_func
+  24              		.fpu fpv4-sp-d16
+  26              	initialise_monitor_handles:
+  27              	.LFB25:
+  28              		.file 1 "Core/Src/syscalls.c"
+   1:Core/Src/syscalls.c **** /**
+   2:Core/Src/syscalls.c ****  ******************************************************************************
+   3:Core/Src/syscalls.c ****  * @file      syscalls.c
+   4:Core/Src/syscalls.c ****  * @author    Auto-generated by STM32CubeMX
+   5:Core/Src/syscalls.c ****  * @brief     Minimal System calls file
+   6:Core/Src/syscalls.c ****  *
+   7:Core/Src/syscalls.c ****  *            For more information about which c-functions
+   8:Core/Src/syscalls.c ****  *            need which of these lowlevel functions
+   9:Core/Src/syscalls.c ****  *            please consult the Newlib or Picolibc libc-manual
+  10:Core/Src/syscalls.c ****  ******************************************************************************
+  11:Core/Src/syscalls.c ****  * @attention
+  12:Core/Src/syscalls.c ****  *
+  13:Core/Src/syscalls.c ****  * Copyright (c) 2020-2025 STMicroelectronics.
+  14:Core/Src/syscalls.c ****  * All rights reserved.
+  15:Core/Src/syscalls.c ****  *
+  16:Core/Src/syscalls.c ****  * This software is licensed under terms that can be found in the LICENSE file
+  17:Core/Src/syscalls.c ****  * in the root directory of this software component.
+  18:Core/Src/syscalls.c ****  * If no LICENSE file comes with this software, it is provided AS-IS.
+  19:Core/Src/syscalls.c ****  *
+  20:Core/Src/syscalls.c ****  ******************************************************************************
+  21:Core/Src/syscalls.c ****  */
+  22:Core/Src/syscalls.c **** 
+  23:Core/Src/syscalls.c **** /* Includes */
+  24:Core/Src/syscalls.c **** #include <sys/stat.h>
+  25:Core/Src/syscalls.c **** #include <stdlib.h>
+  26:Core/Src/syscalls.c **** #include <errno.h>
+  27:Core/Src/syscalls.c **** #include <stdio.h>
+  28:Core/Src/syscalls.c **** #include <signal.h>
+  29:Core/Src/syscalls.c **** #include <time.h>
+  30:Core/Src/syscalls.c **** #include <sys/time.h>
+ARM GAS  /tmp/ccbJKhct.s 			page 2
+
+
+  31:Core/Src/syscalls.c **** #include <sys/times.h>
+  32:Core/Src/syscalls.c **** 
+  33:Core/Src/syscalls.c **** 
+  34:Core/Src/syscalls.c **** /* Variables */
+  35:Core/Src/syscalls.c **** extern int __io_putchar(int ch) __attribute__((weak));
+  36:Core/Src/syscalls.c **** extern int __io_getchar(void) __attribute__((weak));
+  37:Core/Src/syscalls.c **** 
+  38:Core/Src/syscalls.c **** 
+  39:Core/Src/syscalls.c **** char *__env[1] = { 0 };
+  40:Core/Src/syscalls.c **** char **environ = __env;
+  41:Core/Src/syscalls.c **** 
+  42:Core/Src/syscalls.c **** 
+  43:Core/Src/syscalls.c **** /* Functions */
+  44:Core/Src/syscalls.c **** void initialise_monitor_handles()
+  45:Core/Src/syscalls.c **** {
+  29              		.loc 1 45 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 0
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33              		@ link register save eliminated.
+  46:Core/Src/syscalls.c **** }
+  34              		.loc 1 46 1 view .LVU1
+  35 0000 7047     		bx	lr
+  36              		.cfi_endproc
+  37              	.LFE25:
+  39              		.section	.text._getpid,"ax",%progbits
+  40              		.align	1
+  41              		.global	_getpid
+  42              		.syntax unified
+  43              		.thumb
+  44              		.thumb_func
+  45              		.fpu fpv4-sp-d16
+  47              	_getpid:
+  48              	.LFB26:
+  47:Core/Src/syscalls.c **** 
+  48:Core/Src/syscalls.c **** int _getpid(void)
+  49:Core/Src/syscalls.c **** {
+  49              		.loc 1 49 1 view -0
+  50              		.cfi_startproc
+  51              		@ args = 0, pretend = 0, frame = 0
+  52              		@ frame_needed = 0, uses_anonymous_args = 0
+  53              		@ link register save eliminated.
+  50:Core/Src/syscalls.c ****   return 1;
+  54              		.loc 1 50 3 view .LVU3
+  51:Core/Src/syscalls.c **** }
+  55              		.loc 1 51 1 is_stmt 0 view .LVU4
+  56 0000 0120     		movs	r0, #1
+  57 0002 7047     		bx	lr
+  58              		.cfi_endproc
+  59              	.LFE26:
+  61              		.section	.text._kill,"ax",%progbits
+  62              		.align	1
+  63              		.global	_kill
+  64              		.syntax unified
+  65              		.thumb
+  66              		.thumb_func
+  67              		.fpu fpv4-sp-d16
+ARM GAS  /tmp/ccbJKhct.s 			page 3
+
+
+  69              	_kill:
+  70              	.LVL0:
+  71              	.LFB27:
+  52:Core/Src/syscalls.c **** 
+  53:Core/Src/syscalls.c **** int _kill(int pid, int sig)
+  54:Core/Src/syscalls.c **** {
+  72              		.loc 1 54 1 is_stmt 1 view -0
+  73              		.cfi_startproc
+  74              		@ args = 0, pretend = 0, frame = 0
+  75              		@ frame_needed = 0, uses_anonymous_args = 0
+  76              		.loc 1 54 1 is_stmt 0 view .LVU6
+  77 0000 08B5     		push	{r3, lr}
+  78              	.LCFI0:
+  79              		.cfi_def_cfa_offset 8
+  80              		.cfi_offset 3, -8
+  81              		.cfi_offset 14, -4
+  55:Core/Src/syscalls.c ****   (void)pid;
+  82              		.loc 1 55 3 is_stmt 1 view .LVU7
+  56:Core/Src/syscalls.c ****   (void)sig;
+  83              		.loc 1 56 3 view .LVU8
+  57:Core/Src/syscalls.c ****   errno = EINVAL;
+  84              		.loc 1 57 3 view .LVU9
+  85 0002 FFF7FEFF 		bl	__errno
+  86              	.LVL1:
+  87              		.loc 1 57 9 is_stmt 0 view .LVU10
+  88 0006 1623     		movs	r3, #22
+  89 0008 0360     		str	r3, [r0]
+  58:Core/Src/syscalls.c ****   return -1;
+  90              		.loc 1 58 3 is_stmt 1 view .LVU11
+  59:Core/Src/syscalls.c **** }
+  91              		.loc 1 59 1 is_stmt 0 view .LVU12
+  92 000a 4FF0FF30 		mov	r0, #-1
+  93 000e 08BD     		pop	{r3, pc}
+  94              		.cfi_endproc
+  95              	.LFE27:
+  97              		.section	.text._exit,"ax",%progbits
+  98              		.align	1
+  99              		.global	_exit
+ 100              		.syntax unified
+ 101              		.thumb
+ 102              		.thumb_func
+ 103              		.fpu fpv4-sp-d16
+ 105              	_exit:
+ 106              	.LVL2:
+ 107              	.LFB28:
+  60:Core/Src/syscalls.c **** 
+  61:Core/Src/syscalls.c **** void _exit (int status)
+  62:Core/Src/syscalls.c **** {
+ 108              		.loc 1 62 1 is_stmt 1 view -0
+ 109              		.cfi_startproc
+ 110              		@ Volatile: function does not return.
+ 111              		@ args = 0, pretend = 0, frame = 0
+ 112              		@ frame_needed = 0, uses_anonymous_args = 0
+ 113              		.loc 1 62 1 is_stmt 0 view .LVU14
+ 114 0000 08B5     		push	{r3, lr}
+ 115              	.LCFI1:
+ 116              		.cfi_def_cfa_offset 8
+ARM GAS  /tmp/ccbJKhct.s 			page 4
+
+
+ 117              		.cfi_offset 3, -8
+ 118              		.cfi_offset 14, -4
+  63:Core/Src/syscalls.c ****   _kill(status, -1);
+ 119              		.loc 1 63 3 is_stmt 1 view .LVU15
+ 120 0002 4FF0FF31 		mov	r1, #-1
+ 121 0006 FFF7FEFF 		bl	_kill
+ 122              	.LVL3:
+ 123              	.L6:
+  64:Core/Src/syscalls.c ****   while (1) {}    /* Make sure we hang here */
+ 124              		.loc 1 64 3 discriminator 1 view .LVU16
+ 125              		.loc 1 64 14 discriminator 1 view .LVU17
+ 126              		.loc 1 64 9 discriminator 1 view .LVU18
+ 127 000a FEE7     		b	.L6
+ 128              		.cfi_endproc
+ 129              	.LFE28:
+ 131              		.section	.text._read,"ax",%progbits
+ 132              		.align	1
+ 133              		.weak	_read
+ 134              		.syntax unified
+ 135              		.thumb
+ 136              		.thumb_func
+ 137              		.fpu fpv4-sp-d16
+ 139              	_read:
+ 140              	.LVL4:
+ 141              	.LFB29:
+  65:Core/Src/syscalls.c **** }
+  66:Core/Src/syscalls.c **** 
+  67:Core/Src/syscalls.c **** __attribute__((weak)) int _read(int file, char *ptr, int len)
+  68:Core/Src/syscalls.c **** {
+ 142              		.loc 1 68 1 view -0
+ 143              		.cfi_startproc
+ 144              		@ args = 0, pretend = 0, frame = 0
+ 145              		@ frame_needed = 0, uses_anonymous_args = 0
+ 146              		.loc 1 68 1 is_stmt 0 view .LVU20
+ 147 0000 70B5     		push	{r4, r5, r6, lr}
+ 148              	.LCFI2:
+ 149              		.cfi_def_cfa_offset 16
+ 150              		.cfi_offset 4, -16
+ 151              		.cfi_offset 5, -12
+ 152              		.cfi_offset 6, -8
+ 153              		.cfi_offset 14, -4
+ 154 0002 0C46     		mov	r4, r1
+ 155 0004 1646     		mov	r6, r2
+  69:Core/Src/syscalls.c ****   (void)file;
+ 156              		.loc 1 69 3 is_stmt 1 view .LVU21
+  70:Core/Src/syscalls.c ****   int DataIdx;
+ 157              		.loc 1 70 3 view .LVU22
+  71:Core/Src/syscalls.c **** 
+  72:Core/Src/syscalls.c ****   for (DataIdx = 0; DataIdx < len; DataIdx++)
+ 158              		.loc 1 72 3 view .LVU23
+ 159              	.LVL5:
+ 160              		.loc 1 72 16 is_stmt 0 view .LVU24
+ 161 0006 0025     		movs	r5, #0
+ 162              		.loc 1 72 3 view .LVU25
+ 163 0008 06E0     		b	.L9
+ 164              	.LVL6:
+ 165              	.L10:
+ARM GAS  /tmp/ccbJKhct.s 			page 5
+
+
+  73:Core/Src/syscalls.c ****   {
+  74:Core/Src/syscalls.c ****     *ptr++ = __io_getchar();
+ 166              		.loc 1 74 5 is_stmt 1 discriminator 3 view .LVU26
+ 167              		.loc 1 74 14 is_stmt 0 discriminator 3 view .LVU27
+ 168 000a FFF7FEFF 		bl	__io_getchar
+ 169              	.LVL7:
+ 170              		.loc 1 74 9 discriminator 3 view .LVU28
+ 171 000e 2146     		mov	r1, r4
+ 172              	.LVL8:
+ 173              		.loc 1 74 12 discriminator 3 view .LVU29
+ 174 0010 01F8010B 		strb	r0, [r1], #1
+ 175              	.LVL9:
+  72:Core/Src/syscalls.c ****   {
+ 176              		.loc 1 72 36 is_stmt 1 discriminator 3 view .LVU30
+  72:Core/Src/syscalls.c ****   {
+ 177              		.loc 1 72 43 is_stmt 0 discriminator 3 view .LVU31
+ 178 0014 0135     		adds	r5, r5, #1
+ 179              	.LVL10:
+ 180              		.loc 1 74 9 discriminator 3 view .LVU32
+ 181 0016 0C46     		mov	r4, r1
+ 182              	.LVL11:
+ 183              	.L9:
+  72:Core/Src/syscalls.c ****   {
+ 184              		.loc 1 72 21 is_stmt 1 discriminator 1 view .LVU33
+  72:Core/Src/syscalls.c ****   {
+ 185              		.loc 1 72 3 is_stmt 0 discriminator 1 view .LVU34
+ 186 0018 B542     		cmp	r5, r6
+ 187 001a F6DB     		blt	.L10
+  75:Core/Src/syscalls.c ****   }
+  76:Core/Src/syscalls.c **** 
+  77:Core/Src/syscalls.c ****   return len;
+ 188              		.loc 1 77 3 is_stmt 1 view .LVU35
+  78:Core/Src/syscalls.c **** }
+ 189              		.loc 1 78 1 is_stmt 0 view .LVU36
+ 190 001c 3046     		mov	r0, r6
+ 191 001e 70BD     		pop	{r4, r5, r6, pc}
+ 192              		.loc 1 78 1 view .LVU37
+ 193              		.cfi_endproc
+ 194              	.LFE29:
+ 196              		.section	.text._write,"ax",%progbits
+ 197              		.align	1
+ 198              		.weak	_write
+ 199              		.syntax unified
+ 200              		.thumb
+ 201              		.thumb_func
+ 202              		.fpu fpv4-sp-d16
+ 204              	_write:
+ 205              	.LVL12:
+ 206              	.LFB30:
+  79:Core/Src/syscalls.c **** 
+  80:Core/Src/syscalls.c **** __attribute__((weak)) int _write(int file, char *ptr, int len)
+  81:Core/Src/syscalls.c **** {
+ 207              		.loc 1 81 1 is_stmt 1 view -0
+ 208              		.cfi_startproc
+ 209              		@ args = 0, pretend = 0, frame = 0
+ 210              		@ frame_needed = 0, uses_anonymous_args = 0
+ 211              		.loc 1 81 1 is_stmt 0 view .LVU39
+ARM GAS  /tmp/ccbJKhct.s 			page 6
+
+
+ 212 0000 70B5     		push	{r4, r5, r6, lr}
+ 213              	.LCFI3:
+ 214              		.cfi_def_cfa_offset 16
+ 215              		.cfi_offset 4, -16
+ 216              		.cfi_offset 5, -12
+ 217              		.cfi_offset 6, -8
+ 218              		.cfi_offset 14, -4
+ 219 0002 0C46     		mov	r4, r1
+ 220 0004 1646     		mov	r6, r2
+  82:Core/Src/syscalls.c ****   (void)file;
+ 221              		.loc 1 82 3 is_stmt 1 view .LVU40
+  83:Core/Src/syscalls.c ****   int DataIdx;
+ 222              		.loc 1 83 3 view .LVU41
+  84:Core/Src/syscalls.c **** 
+  85:Core/Src/syscalls.c ****   for (DataIdx = 0; DataIdx < len; DataIdx++)
+ 223              		.loc 1 85 3 view .LVU42
+ 224              	.LVL13:
+ 225              		.loc 1 85 16 is_stmt 0 view .LVU43
+ 226 0006 0025     		movs	r5, #0
+ 227              		.loc 1 85 3 view .LVU44
+ 228 0008 04E0     		b	.L13
+ 229              	.LVL14:
+ 230              	.L14:
+  86:Core/Src/syscalls.c ****   {
+  87:Core/Src/syscalls.c ****     __io_putchar(*ptr++);
+ 231              		.loc 1 87 5 is_stmt 1 discriminator 3 view .LVU45
+ 232              		.loc 1 87 5 is_stmt 0 discriminator 3 view .LVU46
+ 233 000a 14F8010B 		ldrb	r0, [r4], #1	@ zero_extendqisi2
+ 234              	.LVL15:
+ 235              		.loc 1 87 5 discriminator 3 view .LVU47
+ 236 000e FFF7FEFF 		bl	__io_putchar
+ 237              	.LVL16:
+  85:Core/Src/syscalls.c ****   {
+ 238              		.loc 1 85 36 is_stmt 1 discriminator 3 view .LVU48
+  85:Core/Src/syscalls.c ****   {
+ 239              		.loc 1 85 43 is_stmt 0 discriminator 3 view .LVU49
+ 240 0012 0135     		adds	r5, r5, #1
+ 241              	.LVL17:
+ 242              	.L13:
+  85:Core/Src/syscalls.c ****   {
+ 243              		.loc 1 85 21 is_stmt 1 discriminator 1 view .LVU50
+  85:Core/Src/syscalls.c ****   {
+ 244              		.loc 1 85 3 is_stmt 0 discriminator 1 view .LVU51
+ 245 0014 B542     		cmp	r5, r6
+ 246 0016 F8DB     		blt	.L14
+  88:Core/Src/syscalls.c ****   }
+  89:Core/Src/syscalls.c ****   return len;
+ 247              		.loc 1 89 3 is_stmt 1 view .LVU52
+  90:Core/Src/syscalls.c **** }
+ 248              		.loc 1 90 1 is_stmt 0 view .LVU53
+ 249 0018 3046     		mov	r0, r6
+ 250 001a 70BD     		pop	{r4, r5, r6, pc}
+ 251              		.loc 1 90 1 view .LVU54
+ 252              		.cfi_endproc
+ 253              	.LFE30:
+ 255              		.section	.text._close,"ax",%progbits
+ 256              		.align	1
+ARM GAS  /tmp/ccbJKhct.s 			page 7
+
+
+ 257              		.global	_close
+ 258              		.syntax unified
+ 259              		.thumb
+ 260              		.thumb_func
+ 261              		.fpu fpv4-sp-d16
+ 263              	_close:
+ 264              	.LVL18:
+ 265              	.LFB31:
+  91:Core/Src/syscalls.c **** 
+  92:Core/Src/syscalls.c **** int _close(int file)
+  93:Core/Src/syscalls.c **** {
+ 266              		.loc 1 93 1 is_stmt 1 view -0
+ 267              		.cfi_startproc
+ 268              		@ args = 0, pretend = 0, frame = 0
+ 269              		@ frame_needed = 0, uses_anonymous_args = 0
+ 270              		@ link register save eliminated.
+  94:Core/Src/syscalls.c ****   (void)file;
+ 271              		.loc 1 94 3 view .LVU56
+  95:Core/Src/syscalls.c ****   return -1;
+ 272              		.loc 1 95 3 view .LVU57
+  96:Core/Src/syscalls.c **** }
+ 273              		.loc 1 96 1 is_stmt 0 view .LVU58
+ 274 0000 4FF0FF30 		mov	r0, #-1
+ 275              	.LVL19:
+ 276              		.loc 1 96 1 view .LVU59
+ 277 0004 7047     		bx	lr
+ 278              		.cfi_endproc
+ 279              	.LFE31:
+ 281              		.section	.text._fstat,"ax",%progbits
+ 282              		.align	1
+ 283              		.global	_fstat
+ 284              		.syntax unified
+ 285              		.thumb
+ 286              		.thumb_func
+ 287              		.fpu fpv4-sp-d16
+ 289              	_fstat:
+ 290              	.LVL20:
+ 291              	.LFB32:
+  97:Core/Src/syscalls.c **** 
+  98:Core/Src/syscalls.c **** 
+  99:Core/Src/syscalls.c **** int _fstat(int file, struct stat *st)
+ 100:Core/Src/syscalls.c **** {
+ 292              		.loc 1 100 1 is_stmt 1 view -0
+ 293              		.cfi_startproc
+ 294              		@ args = 0, pretend = 0, frame = 0
+ 295              		@ frame_needed = 0, uses_anonymous_args = 0
+ 296              		@ link register save eliminated.
+ 101:Core/Src/syscalls.c ****   (void)file;
+ 297              		.loc 1 101 3 view .LVU61
+ 102:Core/Src/syscalls.c ****   st->st_mode = S_IFCHR;
+ 298              		.loc 1 102 3 view .LVU62
+ 299              		.loc 1 102 15 is_stmt 0 view .LVU63
+ 300 0000 4FF40053 		mov	r3, #8192
+ 301 0004 4B60     		str	r3, [r1, #4]
+ 103:Core/Src/syscalls.c ****   return 0;
+ 302              		.loc 1 103 3 is_stmt 1 view .LVU64
+ 104:Core/Src/syscalls.c **** }
+ARM GAS  /tmp/ccbJKhct.s 			page 8
+
+
+ 303              		.loc 1 104 1 is_stmt 0 view .LVU65
+ 304 0006 0020     		movs	r0, #0
+ 305              	.LVL21:
+ 306              		.loc 1 104 1 view .LVU66
+ 307 0008 7047     		bx	lr
+ 308              		.cfi_endproc
+ 309              	.LFE32:
+ 311              		.section	.text._isatty,"ax",%progbits
+ 312              		.align	1
+ 313              		.global	_isatty
+ 314              		.syntax unified
+ 315              		.thumb
+ 316              		.thumb_func
+ 317              		.fpu fpv4-sp-d16
+ 319              	_isatty:
+ 320              	.LVL22:
+ 321              	.LFB33:
+ 105:Core/Src/syscalls.c **** 
+ 106:Core/Src/syscalls.c **** int _isatty(int file)
+ 107:Core/Src/syscalls.c **** {
+ 322              		.loc 1 107 1 is_stmt 1 view -0
+ 323              		.cfi_startproc
+ 324              		@ args = 0, pretend = 0, frame = 0
+ 325              		@ frame_needed = 0, uses_anonymous_args = 0
+ 326              		@ link register save eliminated.
+ 108:Core/Src/syscalls.c ****   (void)file;
+ 327              		.loc 1 108 3 view .LVU68
+ 109:Core/Src/syscalls.c ****   return 1;
+ 328              		.loc 1 109 3 view .LVU69
+ 110:Core/Src/syscalls.c **** }
+ 329              		.loc 1 110 1 is_stmt 0 view .LVU70
+ 330 0000 0120     		movs	r0, #1
+ 331              	.LVL23:
+ 332              		.loc 1 110 1 view .LVU71
+ 333 0002 7047     		bx	lr
+ 334              		.cfi_endproc
+ 335              	.LFE33:
+ 337              		.section	.text._lseek,"ax",%progbits
+ 338              		.align	1
+ 339              		.global	_lseek
+ 340              		.syntax unified
+ 341              		.thumb
+ 342              		.thumb_func
+ 343              		.fpu fpv4-sp-d16
+ 345              	_lseek:
+ 346              	.LVL24:
+ 347              	.LFB34:
+ 111:Core/Src/syscalls.c **** 
+ 112:Core/Src/syscalls.c **** int _lseek(int file, int ptr, int dir)
+ 113:Core/Src/syscalls.c **** {
+ 348              		.loc 1 113 1 is_stmt 1 view -0
+ 349              		.cfi_startproc
+ 350              		@ args = 0, pretend = 0, frame = 0
+ 351              		@ frame_needed = 0, uses_anonymous_args = 0
+ 352              		@ link register save eliminated.
+ 114:Core/Src/syscalls.c ****   (void)file;
+ 353              		.loc 1 114 3 view .LVU73
+ARM GAS  /tmp/ccbJKhct.s 			page 9
+
+
+ 115:Core/Src/syscalls.c ****   (void)ptr;
+ 354              		.loc 1 115 3 view .LVU74
+ 116:Core/Src/syscalls.c ****   (void)dir;
+ 355              		.loc 1 116 3 view .LVU75
+ 117:Core/Src/syscalls.c ****   return 0;
+ 356              		.loc 1 117 3 view .LVU76
+ 118:Core/Src/syscalls.c **** }
+ 357              		.loc 1 118 1 is_stmt 0 view .LVU77
+ 358 0000 0020     		movs	r0, #0
+ 359              	.LVL25:
+ 360              		.loc 1 118 1 view .LVU78
+ 361 0002 7047     		bx	lr
+ 362              		.cfi_endproc
+ 363              	.LFE34:
+ 365              		.section	.text._open,"ax",%progbits
+ 366              		.align	1
+ 367              		.global	_open
+ 368              		.syntax unified
+ 369              		.thumb
+ 370              		.thumb_func
+ 371              		.fpu fpv4-sp-d16
+ 373              	_open:
+ 374              	.LVL26:
+ 375              	.LFB35:
+ 119:Core/Src/syscalls.c **** 
+ 120:Core/Src/syscalls.c **** int _open(char *path, int flags, ...)
+ 121:Core/Src/syscalls.c **** {
+ 376              		.loc 1 121 1 is_stmt 1 view -0
+ 377              		.cfi_startproc
+ 378              		@ args = 4, pretend = 12, frame = 0
+ 379              		@ frame_needed = 0, uses_anonymous_args = 1
+ 380              		@ link register save eliminated.
+ 381              		.loc 1 121 1 is_stmt 0 view .LVU80
+ 382 0000 0EB4     		push	{r1, r2, r3}
+ 383              	.LCFI4:
+ 384              		.cfi_def_cfa_offset 12
+ 385              		.cfi_offset 1, -12
+ 386              		.cfi_offset 2, -8
+ 387              		.cfi_offset 3, -4
+ 122:Core/Src/syscalls.c ****   (void)path;
+ 388              		.loc 1 122 3 is_stmt 1 view .LVU81
+ 123:Core/Src/syscalls.c ****   (void)flags;
+ 389              		.loc 1 123 3 view .LVU82
+ 124:Core/Src/syscalls.c ****   /* Pretend like we always fail */
+ 125:Core/Src/syscalls.c ****   return -1;
+ 390              		.loc 1 125 3 view .LVU83
+ 126:Core/Src/syscalls.c **** }
+ 391              		.loc 1 126 1 is_stmt 0 view .LVU84
+ 392 0002 4FF0FF30 		mov	r0, #-1
+ 393              	.LVL27:
+ 394              		.loc 1 126 1 view .LVU85
+ 395 0006 03B0     		add	sp, sp, #12
+ 396              	.LCFI5:
+ 397              		.cfi_restore 3
+ 398              		.cfi_restore 2
+ 399              		.cfi_restore 1
+ 400              		.cfi_def_cfa_offset 0
+ARM GAS  /tmp/ccbJKhct.s 			page 10
+
+
+ 401 0008 7047     		bx	lr
+ 402              		.cfi_endproc
+ 403              	.LFE35:
+ 405              		.section	.text._wait,"ax",%progbits
+ 406              		.align	1
+ 407              		.global	_wait
+ 408              		.syntax unified
+ 409              		.thumb
+ 410              		.thumb_func
+ 411              		.fpu fpv4-sp-d16
+ 413              	_wait:
+ 414              	.LVL28:
+ 415              	.LFB36:
+ 127:Core/Src/syscalls.c **** 
+ 128:Core/Src/syscalls.c **** int _wait(int *status)
+ 129:Core/Src/syscalls.c **** {
+ 416              		.loc 1 129 1 is_stmt 1 view -0
+ 417              		.cfi_startproc
+ 418              		@ args = 0, pretend = 0, frame = 0
+ 419              		@ frame_needed = 0, uses_anonymous_args = 0
+ 420              		.loc 1 129 1 is_stmt 0 view .LVU87
+ 421 0000 08B5     		push	{r3, lr}
+ 422              	.LCFI6:
+ 423              		.cfi_def_cfa_offset 8
+ 424              		.cfi_offset 3, -8
+ 425              		.cfi_offset 14, -4
+ 130:Core/Src/syscalls.c ****   (void)status;
+ 426              		.loc 1 130 3 is_stmt 1 view .LVU88
+ 131:Core/Src/syscalls.c ****   errno = ECHILD;
+ 427              		.loc 1 131 3 view .LVU89
+ 428 0002 FFF7FEFF 		bl	__errno
+ 429              	.LVL29:
+ 430              		.loc 1 131 9 is_stmt 0 view .LVU90
+ 431 0006 0A23     		movs	r3, #10
+ 432 0008 0360     		str	r3, [r0]
+ 132:Core/Src/syscalls.c ****   return -1;
+ 433              		.loc 1 132 3 is_stmt 1 view .LVU91
+ 133:Core/Src/syscalls.c **** }
+ 434              		.loc 1 133 1 is_stmt 0 view .LVU92
+ 435 000a 4FF0FF30 		mov	r0, #-1
+ 436 000e 08BD     		pop	{r3, pc}
+ 437              		.cfi_endproc
+ 438              	.LFE36:
+ 440              		.section	.text._unlink,"ax",%progbits
+ 441              		.align	1
+ 442              		.global	_unlink
+ 443              		.syntax unified
+ 444              		.thumb
+ 445              		.thumb_func
+ 446              		.fpu fpv4-sp-d16
+ 448              	_unlink:
+ 449              	.LVL30:
+ 450              	.LFB37:
+ 134:Core/Src/syscalls.c **** 
+ 135:Core/Src/syscalls.c **** int _unlink(char *name)
+ 136:Core/Src/syscalls.c **** {
+ 451              		.loc 1 136 1 is_stmt 1 view -0
+ARM GAS  /tmp/ccbJKhct.s 			page 11
+
+
+ 452              		.cfi_startproc
+ 453              		@ args = 0, pretend = 0, frame = 0
+ 454              		@ frame_needed = 0, uses_anonymous_args = 0
+ 455              		.loc 1 136 1 is_stmt 0 view .LVU94
+ 456 0000 08B5     		push	{r3, lr}
+ 457              	.LCFI7:
+ 458              		.cfi_def_cfa_offset 8
+ 459              		.cfi_offset 3, -8
+ 460              		.cfi_offset 14, -4
+ 137:Core/Src/syscalls.c ****   (void)name;
+ 461              		.loc 1 137 3 is_stmt 1 view .LVU95
+ 138:Core/Src/syscalls.c ****   errno = ENOENT;
+ 462              		.loc 1 138 3 view .LVU96
+ 463 0002 FFF7FEFF 		bl	__errno
+ 464              	.LVL31:
+ 465              		.loc 1 138 9 is_stmt 0 view .LVU97
+ 466 0006 0223     		movs	r3, #2
+ 467 0008 0360     		str	r3, [r0]
+ 139:Core/Src/syscalls.c ****   return -1;
+ 468              		.loc 1 139 3 is_stmt 1 view .LVU98
+ 140:Core/Src/syscalls.c **** }
+ 469              		.loc 1 140 1 is_stmt 0 view .LVU99
+ 470 000a 4FF0FF30 		mov	r0, #-1
+ 471 000e 08BD     		pop	{r3, pc}
+ 472              		.cfi_endproc
+ 473              	.LFE37:
+ 475              		.section	.text._times,"ax",%progbits
+ 476              		.align	1
+ 477              		.global	_times
+ 478              		.syntax unified
+ 479              		.thumb
+ 480              		.thumb_func
+ 481              		.fpu fpv4-sp-d16
+ 483              	_times:
+ 484              	.LVL32:
+ 485              	.LFB38:
+ 141:Core/Src/syscalls.c **** 
+ 142:Core/Src/syscalls.c **** clock_t _times(struct tms *buf)
+ 143:Core/Src/syscalls.c **** {
+ 486              		.loc 1 143 1 is_stmt 1 view -0
+ 487              		.cfi_startproc
+ 488              		@ args = 0, pretend = 0, frame = 0
+ 489              		@ frame_needed = 0, uses_anonymous_args = 0
+ 490              		@ link register save eliminated.
+ 144:Core/Src/syscalls.c ****   (void)buf;
+ 491              		.loc 1 144 3 view .LVU101
+ 145:Core/Src/syscalls.c ****   return -1;
+ 492              		.loc 1 145 3 view .LVU102
+ 146:Core/Src/syscalls.c **** }
+ 493              		.loc 1 146 1 is_stmt 0 view .LVU103
+ 494 0000 4FF0FF30 		mov	r0, #-1
+ 495              	.LVL33:
+ 496              		.loc 1 146 1 view .LVU104
+ 497 0004 7047     		bx	lr
+ 498              		.cfi_endproc
+ 499              	.LFE38:
+ 501              		.section	.text._stat,"ax",%progbits
+ARM GAS  /tmp/ccbJKhct.s 			page 12
+
+
+ 502              		.align	1
+ 503              		.global	_stat
+ 504              		.syntax unified
+ 505              		.thumb
+ 506              		.thumb_func
+ 507              		.fpu fpv4-sp-d16
+ 509              	_stat:
+ 510              	.LVL34:
+ 511              	.LFB39:
+ 147:Core/Src/syscalls.c **** 
+ 148:Core/Src/syscalls.c **** int _stat(const char *file, struct stat *st)
+ 149:Core/Src/syscalls.c **** {
+ 512              		.loc 1 149 1 is_stmt 1 view -0
+ 513              		.cfi_startproc
+ 514              		@ args = 0, pretend = 0, frame = 0
+ 515              		@ frame_needed = 0, uses_anonymous_args = 0
+ 516              		@ link register save eliminated.
+ 150:Core/Src/syscalls.c ****   (void)file;
+ 517              		.loc 1 150 3 view .LVU106
+ 151:Core/Src/syscalls.c ****   st->st_mode = S_IFCHR;
+ 518              		.loc 1 151 3 view .LVU107
+ 519              		.loc 1 151 15 is_stmt 0 view .LVU108
+ 520 0000 4FF40053 		mov	r3, #8192
+ 521 0004 4B60     		str	r3, [r1, #4]
+ 152:Core/Src/syscalls.c ****   return 0;
+ 522              		.loc 1 152 3 is_stmt 1 view .LVU109
+ 153:Core/Src/syscalls.c **** }
+ 523              		.loc 1 153 1 is_stmt 0 view .LVU110
+ 524 0006 0020     		movs	r0, #0
+ 525              	.LVL35:
+ 526              		.loc 1 153 1 view .LVU111
+ 527 0008 7047     		bx	lr
+ 528              		.cfi_endproc
+ 529              	.LFE39:
+ 531              		.section	.text._link,"ax",%progbits
+ 532              		.align	1
+ 533              		.global	_link
+ 534              		.syntax unified
+ 535              		.thumb
+ 536              		.thumb_func
+ 537              		.fpu fpv4-sp-d16
+ 539              	_link:
+ 540              	.LVL36:
+ 541              	.LFB40:
+ 154:Core/Src/syscalls.c **** 
+ 155:Core/Src/syscalls.c **** int _link(char *old, char *new)
+ 156:Core/Src/syscalls.c **** {
+ 542              		.loc 1 156 1 is_stmt 1 view -0
+ 543              		.cfi_startproc
+ 544              		@ args = 0, pretend = 0, frame = 0
+ 545              		@ frame_needed = 0, uses_anonymous_args = 0
+ 546              		.loc 1 156 1 is_stmt 0 view .LVU113
+ 547 0000 08B5     		push	{r3, lr}
+ 548              	.LCFI8:
+ 549              		.cfi_def_cfa_offset 8
+ 550              		.cfi_offset 3, -8
+ 551              		.cfi_offset 14, -4
+ARM GAS  /tmp/ccbJKhct.s 			page 13
+
+
+ 157:Core/Src/syscalls.c ****   (void)old;
+ 552              		.loc 1 157 3 is_stmt 1 view .LVU114
+ 158:Core/Src/syscalls.c ****   (void)new;
+ 553              		.loc 1 158 3 view .LVU115
+ 159:Core/Src/syscalls.c ****   errno = EMLINK;
+ 554              		.loc 1 159 3 view .LVU116
+ 555 0002 FFF7FEFF 		bl	__errno
+ 556              	.LVL37:
+ 557              		.loc 1 159 9 is_stmt 0 view .LVU117
+ 558 0006 1F23     		movs	r3, #31
+ 559 0008 0360     		str	r3, [r0]
+ 160:Core/Src/syscalls.c ****   return -1;
+ 560              		.loc 1 160 3 is_stmt 1 view .LVU118
+ 161:Core/Src/syscalls.c **** }
+ 561              		.loc 1 161 1 is_stmt 0 view .LVU119
+ 562 000a 4FF0FF30 		mov	r0, #-1
+ 563 000e 08BD     		pop	{r3, pc}
+ 564              		.cfi_endproc
+ 565              	.LFE40:
+ 567              		.section	.text._fork,"ax",%progbits
+ 568              		.align	1
+ 569              		.global	_fork
+ 570              		.syntax unified
+ 571              		.thumb
+ 572              		.thumb_func
+ 573              		.fpu fpv4-sp-d16
+ 575              	_fork:
+ 576              	.LFB41:
+ 162:Core/Src/syscalls.c **** 
+ 163:Core/Src/syscalls.c **** int _fork(void)
+ 164:Core/Src/syscalls.c **** {
+ 577              		.loc 1 164 1 is_stmt 1 view -0
+ 578              		.cfi_startproc
+ 579              		@ args = 0, pretend = 0, frame = 0
+ 580              		@ frame_needed = 0, uses_anonymous_args = 0
+ 581 0000 08B5     		push	{r3, lr}
+ 582              	.LCFI9:
+ 583              		.cfi_def_cfa_offset 8
+ 584              		.cfi_offset 3, -8
+ 585              		.cfi_offset 14, -4
+ 165:Core/Src/syscalls.c ****   errno = EAGAIN;
+ 586              		.loc 1 165 3 view .LVU121
+ 587 0002 FFF7FEFF 		bl	__errno
+ 588              	.LVL38:
+ 589              		.loc 1 165 9 is_stmt 0 view .LVU122
+ 590 0006 0B23     		movs	r3, #11
+ 591 0008 0360     		str	r3, [r0]
+ 166:Core/Src/syscalls.c ****   return -1;
+ 592              		.loc 1 166 3 is_stmt 1 view .LVU123
+ 167:Core/Src/syscalls.c **** }
+ 593              		.loc 1 167 1 is_stmt 0 view .LVU124
+ 594 000a 4FF0FF30 		mov	r0, #-1
+ 595 000e 08BD     		pop	{r3, pc}
+ 596              		.cfi_endproc
+ 597              	.LFE41:
+ 599              		.section	.text._execve,"ax",%progbits
+ 600              		.align	1
+ARM GAS  /tmp/ccbJKhct.s 			page 14
+
+
+ 601              		.global	_execve
+ 602              		.syntax unified
+ 603              		.thumb
+ 604              		.thumb_func
+ 605              		.fpu fpv4-sp-d16
+ 607              	_execve:
+ 608              	.LVL39:
+ 609              	.LFB42:
+ 168:Core/Src/syscalls.c **** 
+ 169:Core/Src/syscalls.c **** int _execve(char *name, char **argv, char **env)
+ 170:Core/Src/syscalls.c **** {
+ 610              		.loc 1 170 1 is_stmt 1 view -0
+ 611              		.cfi_startproc
+ 612              		@ args = 0, pretend = 0, frame = 0
+ 613              		@ frame_needed = 0, uses_anonymous_args = 0
+ 614              		.loc 1 170 1 is_stmt 0 view .LVU126
+ 615 0000 08B5     		push	{r3, lr}
+ 616              	.LCFI10:
+ 617              		.cfi_def_cfa_offset 8
+ 618              		.cfi_offset 3, -8
+ 619              		.cfi_offset 14, -4
+ 171:Core/Src/syscalls.c ****   (void)name;
+ 620              		.loc 1 171 3 is_stmt 1 view .LVU127
+ 172:Core/Src/syscalls.c ****   (void)argv;
+ 621              		.loc 1 172 3 view .LVU128
+ 173:Core/Src/syscalls.c ****   (void)env;
+ 622              		.loc 1 173 3 view .LVU129
+ 174:Core/Src/syscalls.c ****   errno = ENOMEM;
+ 623              		.loc 1 174 3 view .LVU130
+ 624 0002 FFF7FEFF 		bl	__errno
+ 625              	.LVL40:
+ 626              		.loc 1 174 9 is_stmt 0 view .LVU131
+ 627 0006 0C23     		movs	r3, #12
+ 628 0008 0360     		str	r3, [r0]
+ 175:Core/Src/syscalls.c ****   return -1;
+ 629              		.loc 1 175 3 is_stmt 1 view .LVU132
+ 176:Core/Src/syscalls.c **** }
+ 630              		.loc 1 176 1 is_stmt 0 view .LVU133
+ 631 000a 4FF0FF30 		mov	r0, #-1
+ 632 000e 08BD     		pop	{r3, pc}
+ 633              		.cfi_endproc
+ 634              	.LFE42:
+ 636              		.global	environ
+ 637              		.global	__env
+ 638              		.section	.bss.__env,"aw",%nobits
+ 639              		.align	2
+ 642              	__env:
+ 643 0000 00000000 		.space	4
+ 644              		.section	.data.environ,"aw"
+ 645              		.align	2
+ 648              	environ:
+ 649 0000 00000000 		.word	__env
+ 650              		.weak	__io_putchar
+ 651              		.weak	__io_getchar
+ 652              		.text
+ 653              	.Letext0:
+ 654              		.file 2 "/usr/include/newlib/machine/_default_types.h"
+ARM GAS  /tmp/ccbJKhct.s 			page 15
+
+
+ 655              		.file 3 "/usr/include/newlib/sys/_types.h"
+ 656              		.file 4 "/usr/include/newlib/sys/_timeval.h"
+ 657              		.file 5 "/usr/include/newlib/sys/_timespec.h"
+ 658              		.file 6 "/usr/include/newlib/sys/types.h"
+ 659              		.file 7 "/usr/include/newlib/sys/stat.h"
+ 660              		.file 8 "/usr/include/newlib/sys/times.h"
+ 661              		.file 9 "/usr/include/newlib/sys/errno.h"
+ARM GAS  /tmp/ccbJKhct.s 			page 16
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 syscalls.c
+     /tmp/ccbJKhct.s:18     .text.initialise_monitor_handles:0000000000000000 $t
+     /tmp/ccbJKhct.s:26     .text.initialise_monitor_handles:0000000000000000 initialise_monitor_handles
+     /tmp/ccbJKhct.s:40     .text._getpid:0000000000000000 $t
+     /tmp/ccbJKhct.s:47     .text._getpid:0000000000000000 _getpid
+     /tmp/ccbJKhct.s:62     .text._kill:0000000000000000 $t
+     /tmp/ccbJKhct.s:69     .text._kill:0000000000000000 _kill
+     /tmp/ccbJKhct.s:98     .text._exit:0000000000000000 $t
+     /tmp/ccbJKhct.s:105    .text._exit:0000000000000000 _exit
+     /tmp/ccbJKhct.s:132    .text._read:0000000000000000 $t
+     /tmp/ccbJKhct.s:139    .text._read:0000000000000000 _read
+     /tmp/ccbJKhct.s:197    .text._write:0000000000000000 $t
+     /tmp/ccbJKhct.s:204    .text._write:0000000000000000 _write
+     /tmp/ccbJKhct.s:256    .text._close:0000000000000000 $t
+     /tmp/ccbJKhct.s:263    .text._close:0000000000000000 _close
+     /tmp/ccbJKhct.s:282    .text._fstat:0000000000000000 $t
+     /tmp/ccbJKhct.s:289    .text._fstat:0000000000000000 _fstat
+     /tmp/ccbJKhct.s:312    .text._isatty:0000000000000000 $t
+     /tmp/ccbJKhct.s:319    .text._isatty:0000000000000000 _isatty
+     /tmp/ccbJKhct.s:338    .text._lseek:0000000000000000 $t
+     /tmp/ccbJKhct.s:345    .text._lseek:0000000000000000 _lseek
+     /tmp/ccbJKhct.s:366    .text._open:0000000000000000 $t
+     /tmp/ccbJKhct.s:373    .text._open:0000000000000000 _open
+     /tmp/ccbJKhct.s:406    .text._wait:0000000000000000 $t
+     /tmp/ccbJKhct.s:413    .text._wait:0000000000000000 _wait
+     /tmp/ccbJKhct.s:441    .text._unlink:0000000000000000 $t
+     /tmp/ccbJKhct.s:448    .text._unlink:0000000000000000 _unlink
+     /tmp/ccbJKhct.s:476    .text._times:0000000000000000 $t
+     /tmp/ccbJKhct.s:483    .text._times:0000000000000000 _times
+     /tmp/ccbJKhct.s:502    .text._stat:0000000000000000 $t
+     /tmp/ccbJKhct.s:509    .text._stat:0000000000000000 _stat
+     /tmp/ccbJKhct.s:532    .text._link:0000000000000000 $t
+     /tmp/ccbJKhct.s:539    .text._link:0000000000000000 _link
+     /tmp/ccbJKhct.s:568    .text._fork:0000000000000000 $t
+     /tmp/ccbJKhct.s:575    .text._fork:0000000000000000 _fork
+     /tmp/ccbJKhct.s:600    .text._execve:0000000000000000 $t
+     /tmp/ccbJKhct.s:607    .text._execve:0000000000000000 _execve
+     /tmp/ccbJKhct.s:648    .data.environ:0000000000000000 environ
+     /tmp/ccbJKhct.s:642    .bss.__env:0000000000000000 __env
+     /tmp/ccbJKhct.s:639    .bss.__env:0000000000000000 $d
+     /tmp/ccbJKhct.s:645    .data.environ:0000000000000000 $d
+
+UNDEFINED SYMBOLS
+__errno
+__io_getchar
+__io_putchar

build/sysmem.d

@@ -0,0 +1 @@
+build/sysmem.o: Core/Src/sysmem.c

build/sysmem.lst

@@ -0,0 +1,232 @@
+ARM GAS  /tmp/ccEFOvop.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.eabi_attribute 27, 1
+   3              		.eabi_attribute 28, 1
+   4              		.eabi_attribute 20, 1
+   5              		.eabi_attribute 21, 1
+   6              		.eabi_attribute 23, 3
+   7              		.eabi_attribute 24, 1
+   8              		.eabi_attribute 25, 1
+   9              		.eabi_attribute 26, 1
+  10              		.eabi_attribute 30, 1
+  11              		.eabi_attribute 34, 1
+  12              		.eabi_attribute 18, 4
+  13              		.file	"sysmem.c"
+  14              		.text
+  15              	.Ltext0:
+  16              		.cfi_sections	.debug_frame
+  17              		.section	.text._sbrk,"ax",%progbits
+  18              		.align	1
+  19              		.global	_sbrk
+  20              		.arch armv7e-m
+  21              		.syntax unified
+  22              		.thumb
+  23              		.thumb_func
+  24              		.fpu fpv4-sp-d16
+  26              	_sbrk:
+  27              	.LVL0:
+  28              	.LFB0:
+  29              		.file 1 "Core/Src/sysmem.c"
+   1:Core/Src/sysmem.c **** /**
+   2:Core/Src/sysmem.c ****  ******************************************************************************
+   3:Core/Src/sysmem.c ****  * @file      sysmem.c
+   4:Core/Src/sysmem.c ****  * @author    Generated by STM32CubeMX
+   5:Core/Src/sysmem.c ****  * @brief     System Memory calls file
+   6:Core/Src/sysmem.c ****  *
+   7:Core/Src/sysmem.c ****  *            For more information about which C functions
+   8:Core/Src/sysmem.c ****  *            need which of these lowlevel functions
+   9:Core/Src/sysmem.c ****  *            please consult the Newlib or Picolibc libc manual
+  10:Core/Src/sysmem.c ****  ******************************************************************************
+  11:Core/Src/sysmem.c ****  * @attention
+  12:Core/Src/sysmem.c ****  *
+  13:Core/Src/sysmem.c ****  * Copyright (c) 2025 STMicroelectronics.
+  14:Core/Src/sysmem.c ****  * All rights reserved.
+  15:Core/Src/sysmem.c ****  *
+  16:Core/Src/sysmem.c ****  * This software is licensed under terms that can be found in the LICENSE file
+  17:Core/Src/sysmem.c ****  * in the root directory of this software component.
+  18:Core/Src/sysmem.c ****  * If no LICENSE file comes with this software, it is provided AS-IS.
+  19:Core/Src/sysmem.c ****  *
+  20:Core/Src/sysmem.c ****  ******************************************************************************
+  21:Core/Src/sysmem.c ****  */
+  22:Core/Src/sysmem.c **** 
+  23:Core/Src/sysmem.c **** /* Includes */
+  24:Core/Src/sysmem.c **** #include <errno.h>
+  25:Core/Src/sysmem.c **** #include <stdint.h>
+  26:Core/Src/sysmem.c **** #include <stddef.h>
+  27:Core/Src/sysmem.c **** 
+  28:Core/Src/sysmem.c **** /**
+  29:Core/Src/sysmem.c ****  * Pointer to the current high watermark of the heap usage
+ARM GAS  /tmp/ccEFOvop.s 			page 2
+
+
+  30:Core/Src/sysmem.c ****  */
+  31:Core/Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL;
+  32:Core/Src/sysmem.c **** 
+  33:Core/Src/sysmem.c **** /**
+  34:Core/Src/sysmem.c ****  * @brief _sbrk() allocates memory to the newlib heap and is used by malloc
+  35:Core/Src/sysmem.c ****  *        and others from the C library
+  36:Core/Src/sysmem.c ****  *
+  37:Core/Src/sysmem.c ****  * @verbatim
+  38:Core/Src/sysmem.c ****  * ############################################################################
+  39:Core/Src/sysmem.c ****  * #  .data  #  .bss  #       newlib heap       #          MSP stack          #
+  40:Core/Src/sysmem.c ****  * #         #        #                         # Reserved by _Min_Stack_Size #
+  41:Core/Src/sysmem.c ****  * ############################################################################
+  42:Core/Src/sysmem.c ****  * ^-- RAM start      ^-- _end                             _estack, RAM end --^
+  43:Core/Src/sysmem.c ****  * @endverbatim
+  44:Core/Src/sysmem.c ****  *
+  45:Core/Src/sysmem.c ****  * This implementation starts allocating at the '_end' linker symbol
+  46:Core/Src/sysmem.c ****  * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
+  47:Core/Src/sysmem.c ****  * The implementation considers '_estack' linker symbol to be RAM end
+  48:Core/Src/sysmem.c ****  * NOTE: If the MSP stack, at any point during execution, grows larger than the
+  49:Core/Src/sysmem.c ****  * reserved size, please increase the '_Min_Stack_Size'.
+  50:Core/Src/sysmem.c ****  *
+  51:Core/Src/sysmem.c ****  * @param incr Memory size
+  52:Core/Src/sysmem.c ****  * @return Pointer to allocated memory
+  53:Core/Src/sysmem.c ****  */
+  54:Core/Src/sysmem.c **** void *_sbrk(ptrdiff_t incr)
+  55:Core/Src/sysmem.c **** {
+  30              		.loc 1 55 1 view -0
+  31              		.cfi_startproc
+  32              		@ args = 0, pretend = 0, frame = 0
+  33              		@ frame_needed = 0, uses_anonymous_args = 0
+  34              		.loc 1 55 1 is_stmt 0 view .LVU1
+  35 0000 10B5     		push	{r4, lr}
+  36              	.LCFI0:
+  37              		.cfi_def_cfa_offset 8
+  38              		.cfi_offset 4, -8
+  39              		.cfi_offset 14, -4
+  40 0002 0346     		mov	r3, r0
+  56:Core/Src/sysmem.c ****   extern uint8_t _end; /* Symbol defined in the linker script */
+  41              		.loc 1 56 3 is_stmt 1 view .LVU2
+  57:Core/Src/sysmem.c ****   extern uint8_t _estack; /* Symbol defined in the linker script */
+  42              		.loc 1 57 3 view .LVU3
+  58:Core/Src/sysmem.c ****   extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
+  43              		.loc 1 58 3 view .LVU4
+  59:Core/Src/sysmem.c ****   const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
+  44              		.loc 1 59 3 view .LVU5
+  45              		.loc 1 59 18 is_stmt 0 view .LVU6
+  46 0004 0C4A     		ldr	r2, .L8
+  47 0006 0D49     		ldr	r1, .L8+4
+  60:Core/Src/sysmem.c ****   const uint8_t *max_heap = (uint8_t *)stack_limit;
+  48              		.loc 1 60 3 is_stmt 1 view .LVU7
+  49              	.LVL1:
+  61:Core/Src/sysmem.c ****   uint8_t *prev_heap_end;
+  50              		.loc 1 61 3 view .LVU8
+  62:Core/Src/sysmem.c **** 
+  63:Core/Src/sysmem.c ****   /* Initialize heap end at first call */
+  64:Core/Src/sysmem.c ****   if (NULL == __sbrk_heap_end)
+  51              		.loc 1 64 3 view .LVU9
+ARM GAS  /tmp/ccEFOvop.s 			page 3
+
+
+  52              		.loc 1 64 12 is_stmt 0 view .LVU10
+  53 0008 0D48     		ldr	r0, .L8+8
+  54              	.LVL2:
+  55              		.loc 1 64 12 view .LVU11
+  56 000a 0068     		ldr	r0, [r0]
+  57              		.loc 1 64 6 view .LVU12
+  58 000c 40B1     		cbz	r0, .L6
+  59              	.L2:
+  65:Core/Src/sysmem.c ****   {
+  66:Core/Src/sysmem.c ****     __sbrk_heap_end = &_end;
+  67:Core/Src/sysmem.c ****   }
+  68:Core/Src/sysmem.c **** 
+  69:Core/Src/sysmem.c ****   /* Protect heap from growing into the reserved MSP stack */
+  70:Core/Src/sysmem.c ****   if (__sbrk_heap_end + incr > max_heap)
+  60              		.loc 1 70 3 is_stmt 1 view .LVU13
+  61              		.loc 1 70 23 is_stmt 0 view .LVU14
+  62 000e 0C48     		ldr	r0, .L8+8
+  63 0010 0068     		ldr	r0, [r0]
+  64 0012 0344     		add	r3, r3, r0
+  65              	.LVL3:
+  66              		.loc 1 70 6 view .LVU15
+  67 0014 521A     		subs	r2, r2, r1
+  68 0016 9342     		cmp	r3, r2
+  69 0018 06D8     		bhi	.L7
+  71:Core/Src/sysmem.c ****   {
+  72:Core/Src/sysmem.c ****     errno = ENOMEM;
+  73:Core/Src/sysmem.c ****     return (void *)-1;
+  74:Core/Src/sysmem.c ****   }
+  75:Core/Src/sysmem.c **** 
+  76:Core/Src/sysmem.c ****   prev_heap_end = __sbrk_heap_end;
+  70              		.loc 1 76 3 is_stmt 1 view .LVU16
+  71              	.LVL4:
+  77:Core/Src/sysmem.c ****   __sbrk_heap_end += incr;
+  72              		.loc 1 77 3 view .LVU17
+  73              		.loc 1 77 19 is_stmt 0 view .LVU18
+  74 001a 094A     		ldr	r2, .L8+8
+  75 001c 1360     		str	r3, [r2]
+  78:Core/Src/sysmem.c **** 
+  79:Core/Src/sysmem.c ****   return (void *)prev_heap_end;
+  76              		.loc 1 79 3 is_stmt 1 view .LVU19
+  77              	.LVL5:
+  78              	.L1:
+  80:Core/Src/sysmem.c **** }
+  79              		.loc 1 80 1 is_stmt 0 view .LVU20
+  80 001e 10BD     		pop	{r4, pc}
+  81              	.LVL6:
+  82              	.L6:
+  66:Core/Src/sysmem.c ****   }
+  83              		.loc 1 66 5 is_stmt 1 view .LVU21
+  66:Core/Src/sysmem.c ****   }
+  84              		.loc 1 66 21 is_stmt 0 view .LVU22
+  85 0020 0748     		ldr	r0, .L8+8
+  86 0022 084C     		ldr	r4, .L8+12
+  87 0024 0460     		str	r4, [r0]
+  88 0026 F2E7     		b	.L2
+  89              	.LVL7:
+  90              	.L7:
+ARM GAS  /tmp/ccEFOvop.s 			page 4
+
+
+  72:Core/Src/sysmem.c ****     return (void *)-1;
+  91              		.loc 1 72 5 is_stmt 1 view .LVU23
+  92 0028 FFF7FEFF 		bl	__errno
+  93              	.LVL8:
+  72:Core/Src/sysmem.c ****     return (void *)-1;
+  94              		.loc 1 72 11 is_stmt 0 view .LVU24
+  95 002c 0C23     		movs	r3, #12
+  96 002e 0360     		str	r3, [r0]
+  73:Core/Src/sysmem.c ****   }
+  97              		.loc 1 73 5 is_stmt 1 view .LVU25
+  73:Core/Src/sysmem.c ****   }
+  98              		.loc 1 73 12 is_stmt 0 view .LVU26
+  99 0030 4FF0FF30 		mov	r0, #-1
+ 100 0034 F3E7     		b	.L1
+ 101              	.L9:
+ 102 0036 00BF     		.align	2
+ 103              	.L8:
+ 104 0038 00000000 		.word	_estack
+ 105 003c 00000000 		.word	_Min_Stack_Size
+ 106 0040 00000000 		.word	.LANCHOR0
+ 107 0044 00000000 		.word	_end
+ 108              		.cfi_endproc
+ 109              	.LFE0:
+ 111              		.section	.bss.__sbrk_heap_end,"aw",%nobits
+ 112              		.align	2
+ 113              		.set	.LANCHOR0,. + 0
+ 116              	__sbrk_heap_end:
+ 117 0000 00000000 		.space	4
+ 118              		.text
+ 119              	.Letext0:
+ 120              		.file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stddef.h"
+ 121              		.file 3 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h"
+ 122              		.file 4 "/usr/include/newlib/sys/errno.h"
+ARM GAS  /tmp/ccEFOvop.s 			page 5
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 sysmem.c
+     /tmp/ccEFOvop.s:18     .text._sbrk:0000000000000000 $t
+     /tmp/ccEFOvop.s:26     .text._sbrk:0000000000000000 _sbrk
+     /tmp/ccEFOvop.s:104    .text._sbrk:0000000000000038 $d
+     /tmp/ccEFOvop.s:112    .bss.__sbrk_heap_end:0000000000000000 $d
+     /tmp/ccEFOvop.s:116    .bss.__sbrk_heap_end:0000000000000000 __sbrk_heap_end
+
+UNDEFINED SYMBOLS
+__errno
+_estack
+_Min_Stack_Size
+_end

build/system_stm32f4xx.d

@@ -0,0 +1,51 @@
+build/system_stm32f4xx.o: Core/Src/system_stm32f4xx.c \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h \
+ Drivers/CMSIS/Include/core_cm4.h Drivers/CMSIS/Include/cmsis_version.h \
+ Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
+ Drivers/CMSIS/Include/mpu_armv7.h \
+ Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h \
+ Core/Inc/stm32f4xx_hal_conf.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h \
+ Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f4xx.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h:
+Drivers/CMSIS/Include/core_cm4.h:
+Drivers/CMSIS/Include/cmsis_version.h:
+Drivers/CMSIS/Include/cmsis_compiler.h:
+Drivers/CMSIS/Include/cmsis_gcc.h:
+Drivers/CMSIS/Include/mpu_armv7.h:
+Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h:
+Core/Inc/stm32f4xx_hal_conf.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_def.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_rcc_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_exti.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dma_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_cortex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_flash_ramfunc.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h:
+Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h:

build/system_stm32f4xx.lst

@@ -0,0 +1,589 @@
+ARM GAS  /tmp/cc9poKmu.s 			page 1
+
+
+   1              		.cpu cortex-m4
+   2              		.eabi_attribute 27, 1
+   3              		.eabi_attribute 28, 1
+   4              		.eabi_attribute 20, 1
+   5              		.eabi_attribute 21, 1
+   6              		.eabi_attribute 23, 3
+   7              		.eabi_attribute 24, 1
+   8              		.eabi_attribute 25, 1
+   9              		.eabi_attribute 26, 1
+  10              		.eabi_attribute 30, 1
+  11              		.eabi_attribute 34, 1
+  12              		.eabi_attribute 18, 4
+  13              		.file	"system_stm32f4xx.c"
+  14              		.text
+  15              	.Ltext0:
+  16              		.cfi_sections	.debug_frame
+  17              		.section	.text.SystemInit,"ax",%progbits
+  18              		.align	1
+  19              		.global	SystemInit
+  20              		.arch armv7e-m
+  21              		.syntax unified
+  22              		.thumb
+  23              		.thumb_func
+  24              		.fpu fpv4-sp-d16
+  26              	SystemInit:
+  27              	.LFB134:
+  28              		.file 1 "Core/Src/system_stm32f4xx.c"
+   1:Core/Src/system_stm32f4xx.c **** /**
+   2:Core/Src/system_stm32f4xx.c ****   ******************************************************************************
+   3:Core/Src/system_stm32f4xx.c ****   * @file    system_stm32f4xx.c
+   4:Core/Src/system_stm32f4xx.c ****   * @author  MCD Application Team
+   5:Core/Src/system_stm32f4xx.c ****   * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+   6:Core/Src/system_stm32f4xx.c ****   *
+   7:Core/Src/system_stm32f4xx.c ****   *   This file provides two functions and one global variable to be called from 
+   8:Core/Src/system_stm32f4xx.c ****   *   user application:
+   9:Core/Src/system_stm32f4xx.c ****   *      - SystemInit(): This function is called at startup just after reset and 
+  10:Core/Src/system_stm32f4xx.c ****   *                      before branch to main program. This call is made inside
+  11:Core/Src/system_stm32f4xx.c ****   *                      the "startup_stm32f4xx.s" file.
+  12:Core/Src/system_stm32f4xx.c ****   *
+  13:Core/Src/system_stm32f4xx.c ****   *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  14:Core/Src/system_stm32f4xx.c ****   *                                  by the user application to setup the SysTick 
+  15:Core/Src/system_stm32f4xx.c ****   *                                  timer or configure other parameters.
+  16:Core/Src/system_stm32f4xx.c ****   *                                     
+  17:Core/Src/system_stm32f4xx.c ****   *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  18:Core/Src/system_stm32f4xx.c ****   *                                 be called whenever the core clock is changed
+  19:Core/Src/system_stm32f4xx.c ****   *                                 during program execution.
+  20:Core/Src/system_stm32f4xx.c ****   *
+  21:Core/Src/system_stm32f4xx.c ****   *
+  22:Core/Src/system_stm32f4xx.c ****   ******************************************************************************
+  23:Core/Src/system_stm32f4xx.c ****   * @attention
+  24:Core/Src/system_stm32f4xx.c ****   *
+  25:Core/Src/system_stm32f4xx.c ****   * Copyright (c) 2017 STMicroelectronics.
+  26:Core/Src/system_stm32f4xx.c ****   * All rights reserved.
+  27:Core/Src/system_stm32f4xx.c ****   *
+  28:Core/Src/system_stm32f4xx.c ****   * This software is licensed under terms that can be found in the LICENSE file
+  29:Core/Src/system_stm32f4xx.c ****   * in the root directory of this software component.
+  30:Core/Src/system_stm32f4xx.c ****   * If no LICENSE file comes with this software, it is provided AS-IS.
+ARM GAS  /tmp/cc9poKmu.s 			page 2
+
+
+  31:Core/Src/system_stm32f4xx.c ****   *
+  32:Core/Src/system_stm32f4xx.c ****   ******************************************************************************
+  33:Core/Src/system_stm32f4xx.c ****   */
+  34:Core/Src/system_stm32f4xx.c **** 
+  35:Core/Src/system_stm32f4xx.c **** /** @addtogroup CMSIS
+  36:Core/Src/system_stm32f4xx.c ****   * @{
+  37:Core/Src/system_stm32f4xx.c ****   */
+  38:Core/Src/system_stm32f4xx.c **** 
+  39:Core/Src/system_stm32f4xx.c **** /** @addtogroup stm32f4xx_system
+  40:Core/Src/system_stm32f4xx.c ****   * @{
+  41:Core/Src/system_stm32f4xx.c ****   */  
+  42:Core/Src/system_stm32f4xx.c ****   
+  43:Core/Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Includes
+  44:Core/Src/system_stm32f4xx.c ****   * @{
+  45:Core/Src/system_stm32f4xx.c ****   */
+  46:Core/Src/system_stm32f4xx.c **** 
+  47:Core/Src/system_stm32f4xx.c **** 
+  48:Core/Src/system_stm32f4xx.c **** #include "stm32f4xx.h"
+  49:Core/Src/system_stm32f4xx.c **** 
+  50:Core/Src/system_stm32f4xx.c **** #if !defined  (HSE_VALUE) 
+  51:Core/Src/system_stm32f4xx.c ****   #define HSE_VALUE    ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
+  52:Core/Src/system_stm32f4xx.c **** #endif /* HSE_VALUE */
+  53:Core/Src/system_stm32f4xx.c **** 
+  54:Core/Src/system_stm32f4xx.c **** #if !defined  (HSI_VALUE)
+  55:Core/Src/system_stm32f4xx.c ****   #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+  56:Core/Src/system_stm32f4xx.c **** #endif /* HSI_VALUE */
+  57:Core/Src/system_stm32f4xx.c **** 
+  58:Core/Src/system_stm32f4xx.c **** /**
+  59:Core/Src/system_stm32f4xx.c ****   * @}
+  60:Core/Src/system_stm32f4xx.c ****   */
+  61:Core/Src/system_stm32f4xx.c **** 
+  62:Core/Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+  63:Core/Src/system_stm32f4xx.c ****   * @{
+  64:Core/Src/system_stm32f4xx.c ****   */
+  65:Core/Src/system_stm32f4xx.c **** 
+  66:Core/Src/system_stm32f4xx.c **** /**
+  67:Core/Src/system_stm32f4xx.c ****   * @}
+  68:Core/Src/system_stm32f4xx.c ****   */
+  69:Core/Src/system_stm32f4xx.c **** 
+  70:Core/Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Defines
+  71:Core/Src/system_stm32f4xx.c ****   * @{
+  72:Core/Src/system_stm32f4xx.c ****   */
+  73:Core/Src/system_stm32f4xx.c **** 
+  74:Core/Src/system_stm32f4xx.c **** /************************* Miscellaneous Configuration ************************/
+  75:Core/Src/system_stm32f4xx.c **** /*!< Uncomment the following line if you need to use external SRAM or SDRAM as data memory  */
+  76:Core/Src/system_stm32f4xx.c **** #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)\
+  77:Core/Src/system_stm32f4xx.c ****  || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+  78:Core/Src/system_stm32f4xx.c ****  || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx)
+  79:Core/Src/system_stm32f4xx.c **** /* #define DATA_IN_ExtSRAM */
+  80:Core/Src/system_stm32f4xx.c **** #endif /* STM32F40xxx || STM32F41xxx || STM32F42xxx || STM32F43xxx || STM32F469xx || STM32F479xx ||
+  81:Core/Src/system_stm32f4xx.c ****           STM32F412Zx || STM32F412Vx */
+  82:Core/Src/system_stm32f4xx.c ****  
+  83:Core/Src/system_stm32f4xx.c **** #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)\
+  84:Core/Src/system_stm32f4xx.c ****  || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
+  85:Core/Src/system_stm32f4xx.c **** /* #define DATA_IN_ExtSDRAM */
+  86:Core/Src/system_stm32f4xx.c **** #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||
+  87:Core/Src/system_stm32f4xx.c ****           STM32F479xx */
+ARM GAS  /tmp/cc9poKmu.s 			page 3
+
+
+  88:Core/Src/system_stm32f4xx.c **** 
+  89:Core/Src/system_stm32f4xx.c **** /* Note: Following vector table addresses must be defined in line with linker
+  90:Core/Src/system_stm32f4xx.c ****          configuration. */
+  91:Core/Src/system_stm32f4xx.c **** /*!< Uncomment the following line if you need to relocate the vector table
+  92:Core/Src/system_stm32f4xx.c ****      anywhere in Flash or Sram, else the vector table is kept at the automatic
+  93:Core/Src/system_stm32f4xx.c ****      remap of boot address selected */
+  94:Core/Src/system_stm32f4xx.c **** /* #define USER_VECT_TAB_ADDRESS */
+  95:Core/Src/system_stm32f4xx.c **** 
+  96:Core/Src/system_stm32f4xx.c **** #if defined(USER_VECT_TAB_ADDRESS)
+  97:Core/Src/system_stm32f4xx.c **** /*!< Uncomment the following line if you need to relocate your vector Table
+  98:Core/Src/system_stm32f4xx.c ****      in Sram else user remap will be done in Flash. */
+  99:Core/Src/system_stm32f4xx.c **** /* #define VECT_TAB_SRAM */
+ 100:Core/Src/system_stm32f4xx.c **** #if defined(VECT_TAB_SRAM)
+ 101:Core/Src/system_stm32f4xx.c **** #define VECT_TAB_BASE_ADDRESS   SRAM_BASE       /*!< Vector Table base address field.
+ 102:Core/Src/system_stm32f4xx.c ****                                                      This value must be a multiple of 0x200. */
+ 103:Core/Src/system_stm32f4xx.c **** #else
+ 104:Core/Src/system_stm32f4xx.c **** #define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+ 105:Core/Src/system_stm32f4xx.c ****                                                      This value must be a multiple of 0x200. */
+ 106:Core/Src/system_stm32f4xx.c **** #endif /* VECT_TAB_SRAM */
+ 107:Core/Src/system_stm32f4xx.c **** #if !defined(VECT_TAB_OFFSET)
+ 108:Core/Src/system_stm32f4xx.c **** #define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table offset field.
+ 109:Core/Src/system_stm32f4xx.c ****                                                      This value must be a multiple of 0x200. */
+ 110:Core/Src/system_stm32f4xx.c **** #endif /* VECT_TAB_OFFSET */
+ 111:Core/Src/system_stm32f4xx.c **** #endif /* USER_VECT_TAB_ADDRESS */
+ 112:Core/Src/system_stm32f4xx.c **** /******************************************************************************/
+ 113:Core/Src/system_stm32f4xx.c **** 
+ 114:Core/Src/system_stm32f4xx.c **** /**
+ 115:Core/Src/system_stm32f4xx.c ****   * @}
+ 116:Core/Src/system_stm32f4xx.c ****   */
+ 117:Core/Src/system_stm32f4xx.c **** 
+ 118:Core/Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Macros
+ 119:Core/Src/system_stm32f4xx.c ****   * @{
+ 120:Core/Src/system_stm32f4xx.c ****   */
+ 121:Core/Src/system_stm32f4xx.c **** 
+ 122:Core/Src/system_stm32f4xx.c **** /**
+ 123:Core/Src/system_stm32f4xx.c ****   * @}
+ 124:Core/Src/system_stm32f4xx.c ****   */
+ 125:Core/Src/system_stm32f4xx.c **** 
+ 126:Core/Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Variables
+ 127:Core/Src/system_stm32f4xx.c ****   * @{
+ 128:Core/Src/system_stm32f4xx.c ****   */
+ 129:Core/Src/system_stm32f4xx.c ****   /* This variable is updated in three ways:
+ 130:Core/Src/system_stm32f4xx.c ****       1) by calling CMSIS function SystemCoreClockUpdate()
+ 131:Core/Src/system_stm32f4xx.c ****       2) by calling HAL API function HAL_RCC_GetHCLKFreq()
+ 132:Core/Src/system_stm32f4xx.c ****       3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+ 133:Core/Src/system_stm32f4xx.c ****          Note: If you use this function to configure the system clock; then there
+ 134:Core/Src/system_stm32f4xx.c ****                is no need to call the 2 first functions listed above, since SystemCoreClock
+ 135:Core/Src/system_stm32f4xx.c ****                variable is updated automatically.
+ 136:Core/Src/system_stm32f4xx.c ****   */
+ 137:Core/Src/system_stm32f4xx.c **** uint32_t SystemCoreClock = 16000000;
+ 138:Core/Src/system_stm32f4xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+ 139:Core/Src/system_stm32f4xx.c **** const uint8_t APBPrescTable[8]  = {0, 0, 0, 0, 1, 2, 3, 4};
+ 140:Core/Src/system_stm32f4xx.c **** /**
+ 141:Core/Src/system_stm32f4xx.c ****   * @}
+ 142:Core/Src/system_stm32f4xx.c ****   */
+ 143:Core/Src/system_stm32f4xx.c **** 
+ 144:Core/Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+ARM GAS  /tmp/cc9poKmu.s 			page 4
+
+
+ 145:Core/Src/system_stm32f4xx.c ****   * @{
+ 146:Core/Src/system_stm32f4xx.c ****   */
+ 147:Core/Src/system_stm32f4xx.c **** 
+ 148:Core/Src/system_stm32f4xx.c **** #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ 149:Core/Src/system_stm32f4xx.c ****   static void SystemInit_ExtMemCtl(void); 
+ 150:Core/Src/system_stm32f4xx.c **** #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+ 151:Core/Src/system_stm32f4xx.c **** 
+ 152:Core/Src/system_stm32f4xx.c **** /**
+ 153:Core/Src/system_stm32f4xx.c ****   * @}
+ 154:Core/Src/system_stm32f4xx.c ****   */
+ 155:Core/Src/system_stm32f4xx.c **** 
+ 156:Core/Src/system_stm32f4xx.c **** /** @addtogroup STM32F4xx_System_Private_Functions
+ 157:Core/Src/system_stm32f4xx.c ****   * @{
+ 158:Core/Src/system_stm32f4xx.c ****   */
+ 159:Core/Src/system_stm32f4xx.c **** 
+ 160:Core/Src/system_stm32f4xx.c **** /**
+ 161:Core/Src/system_stm32f4xx.c ****   * @brief  Setup the microcontroller system
+ 162:Core/Src/system_stm32f4xx.c ****   *         Initialize the FPU setting, vector table location and External memory 
+ 163:Core/Src/system_stm32f4xx.c ****   *         configuration.
+ 164:Core/Src/system_stm32f4xx.c ****   * @param  None
+ 165:Core/Src/system_stm32f4xx.c ****   * @retval None
+ 166:Core/Src/system_stm32f4xx.c ****   */
+ 167:Core/Src/system_stm32f4xx.c **** void SystemInit(void)
+ 168:Core/Src/system_stm32f4xx.c **** {
+  29              		.loc 1 168 1 view -0
+  30              		.cfi_startproc
+  31              		@ args = 0, pretend = 0, frame = 0
+  32              		@ frame_needed = 0, uses_anonymous_args = 0
+  33              		@ link register save eliminated.
+ 169:Core/Src/system_stm32f4xx.c ****   /* FPU settings ------------------------------------------------------------*/
+ 170:Core/Src/system_stm32f4xx.c ****   #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+ 171:Core/Src/system_stm32f4xx.c ****     SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access */
+  34              		.loc 1 171 5 view .LVU1
+  35              		.loc 1 171 16 is_stmt 0 view .LVU2
+  36 0000 034A     		ldr	r2, .L2
+  37 0002 D2F88830 		ldr	r3, [r2, #136]
+  38 0006 43F47003 		orr	r3, r3, #15728640
+  39 000a C2F88830 		str	r3, [r2, #136]
+ 172:Core/Src/system_stm32f4xx.c ****   #endif
+ 173:Core/Src/system_stm32f4xx.c **** 
+ 174:Core/Src/system_stm32f4xx.c **** #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
+ 175:Core/Src/system_stm32f4xx.c ****   SystemInit_ExtMemCtl(); 
+ 176:Core/Src/system_stm32f4xx.c **** #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
+ 177:Core/Src/system_stm32f4xx.c **** 
+ 178:Core/Src/system_stm32f4xx.c ****   /* Configure the Vector Table location -------------------------------------*/
+ 179:Core/Src/system_stm32f4xx.c **** #if defined(USER_VECT_TAB_ADDRESS)
+ 180:Core/Src/system_stm32f4xx.c ****   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM 
+ 181:Core/Src/system_stm32f4xx.c **** #endif /* USER_VECT_TAB_ADDRESS */
+ 182:Core/Src/system_stm32f4xx.c **** }
+  40              		.loc 1 182 1 view .LVU3
+  41 000e 7047     		bx	lr
+  42              	.L3:
+  43              		.align	2
+  44              	.L2:
+  45 0010 00ED00E0 		.word	-536810240
+  46              		.cfi_endproc
+  47              	.LFE134:
+ARM GAS  /tmp/cc9poKmu.s 			page 5
+
+
+  49              		.section	.text.SystemCoreClockUpdate,"ax",%progbits
+  50              		.align	1
+  51              		.global	SystemCoreClockUpdate
+  52              		.syntax unified
+  53              		.thumb
+  54              		.thumb_func
+  55              		.fpu fpv4-sp-d16
+  57              	SystemCoreClockUpdate:
+  58              	.LFB135:
+ 183:Core/Src/system_stm32f4xx.c **** 
+ 184:Core/Src/system_stm32f4xx.c **** /**
+ 185:Core/Src/system_stm32f4xx.c ****    * @brief  Update SystemCoreClock variable according to Clock Register Values.
+ 186:Core/Src/system_stm32f4xx.c ****   *         The SystemCoreClock variable contains the core clock (HCLK), it can
+ 187:Core/Src/system_stm32f4xx.c ****   *         be used by the user application to setup the SysTick timer or configure
+ 188:Core/Src/system_stm32f4xx.c ****   *         other parameters.
+ 189:Core/Src/system_stm32f4xx.c ****   *           
+ 190:Core/Src/system_stm32f4xx.c ****   * @note   Each time the core clock (HCLK) changes, this function must be called
+ 191:Core/Src/system_stm32f4xx.c ****   *         to update SystemCoreClock variable value. Otherwise, any configuration
+ 192:Core/Src/system_stm32f4xx.c ****   *         based on this variable will be incorrect.         
+ 193:Core/Src/system_stm32f4xx.c ****   *     
+ 194:Core/Src/system_stm32f4xx.c ****   * @note   - The system frequency computed by this function is not the real 
+ 195:Core/Src/system_stm32f4xx.c ****   *           frequency in the chip. It is calculated based on the predefined 
+ 196:Core/Src/system_stm32f4xx.c ****   *           constant and the selected clock source:
+ 197:Core/Src/system_stm32f4xx.c ****   *             
+ 198:Core/Src/system_stm32f4xx.c ****   *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+ 199:Core/Src/system_stm32f4xx.c ****   *                                              
+ 200:Core/Src/system_stm32f4xx.c ****   *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+ 201:Core/Src/system_stm32f4xx.c ****   *                          
+ 202:Core/Src/system_stm32f4xx.c ****   *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
+ 203:Core/Src/system_stm32f4xx.c ****   *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+ 204:Core/Src/system_stm32f4xx.c ****   *         
+ 205:Core/Src/system_stm32f4xx.c ****   *         (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
+ 206:Core/Src/system_stm32f4xx.c ****   *             16 MHz) but the real value may vary depending on the variations
+ 207:Core/Src/system_stm32f4xx.c ****   *             in voltage and temperature.   
+ 208:Core/Src/system_stm32f4xx.c ****   *    
+ 209:Core/Src/system_stm32f4xx.c ****   *         (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
+ 210:Core/Src/system_stm32f4xx.c ****   *              depends on the application requirements), user has to ensure that HSE_VALUE
+ 211:Core/Src/system_stm32f4xx.c ****   *              is same as the real frequency of the crystal used. Otherwise, this function
+ 212:Core/Src/system_stm32f4xx.c ****   *              may have wrong result.
+ 213:Core/Src/system_stm32f4xx.c ****   *                
+ 214:Core/Src/system_stm32f4xx.c ****   *         - The result of this function could be not correct when using fractional
+ 215:Core/Src/system_stm32f4xx.c ****   *           value for HSE crystal.
+ 216:Core/Src/system_stm32f4xx.c ****   *     
+ 217:Core/Src/system_stm32f4xx.c ****   * @param  None
+ 218:Core/Src/system_stm32f4xx.c ****   * @retval None
+ 219:Core/Src/system_stm32f4xx.c ****   */
+ 220:Core/Src/system_stm32f4xx.c **** void SystemCoreClockUpdate(void)
+ 221:Core/Src/system_stm32f4xx.c **** {
+  59              		.loc 1 221 1 is_stmt 1 view -0
+  60              		.cfi_startproc
+  61              		@ args = 0, pretend = 0, frame = 0
+  62              		@ frame_needed = 0, uses_anonymous_args = 0
+  63              		@ link register save eliminated.
+ 222:Core/Src/system_stm32f4xx.c ****   uint32_t tmp, pllvco, pllp, pllsource, pllm;
+  64              		.loc 1 222 3 view .LVU5
+ 223:Core/Src/system_stm32f4xx.c ****   
+ 224:Core/Src/system_stm32f4xx.c ****   /* Get SYSCLK source -------------------------------------------------------*/
+ARM GAS  /tmp/cc9poKmu.s 			page 6
+
+
+ 225:Core/Src/system_stm32f4xx.c ****   tmp = RCC->CFGR & RCC_CFGR_SWS;
+  65              		.loc 1 225 3 view .LVU6
+  66              		.loc 1 225 12 is_stmt 0 view .LVU7
+  67 0000 224B     		ldr	r3, .L12
+  68 0002 9B68     		ldr	r3, [r3, #8]
+  69              		.loc 1 225 7 view .LVU8
+  70 0004 03F00C03 		and	r3, r3, #12
+  71              	.LVL0:
+ 226:Core/Src/system_stm32f4xx.c **** 
+ 227:Core/Src/system_stm32f4xx.c ****   switch (tmp)
+  72              		.loc 1 227 3 is_stmt 1 view .LVU9
+  73 0008 042B     		cmp	r3, #4
+  74 000a 14D0     		beq	.L5
+  75 000c 082B     		cmp	r3, #8
+  76 000e 16D0     		beq	.L6
+  77 0010 1BB1     		cbz	r3, .L11
+ 228:Core/Src/system_stm32f4xx.c ****   {
+ 229:Core/Src/system_stm32f4xx.c ****     case 0x00:  /* HSI used as system clock source */
+ 230:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = HSI_VALUE;
+ 231:Core/Src/system_stm32f4xx.c ****       break;
+ 232:Core/Src/system_stm32f4xx.c ****     case 0x04:  /* HSE used as system clock source */
+ 233:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = HSE_VALUE;
+ 234:Core/Src/system_stm32f4xx.c ****       break;
+ 235:Core/Src/system_stm32f4xx.c ****     case 0x08:  /* PLL used as system clock source */
+ 236:Core/Src/system_stm32f4xx.c **** 
+ 237:Core/Src/system_stm32f4xx.c ****       /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+ 238:Core/Src/system_stm32f4xx.c ****          SYSCLK = PLL_VCO / PLL_P
+ 239:Core/Src/system_stm32f4xx.c ****          */    
+ 240:Core/Src/system_stm32f4xx.c ****       pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+ 241:Core/Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 242:Core/Src/system_stm32f4xx.c ****       
+ 243:Core/Src/system_stm32f4xx.c ****       if (pllsource != 0)
+ 244:Core/Src/system_stm32f4xx.c ****       {
+ 245:Core/Src/system_stm32f4xx.c ****         /* HSE used as PLL clock source */
+ 246:Core/Src/system_stm32f4xx.c ****         pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ 247:Core/Src/system_stm32f4xx.c ****       }
+ 248:Core/Src/system_stm32f4xx.c ****       else
+ 249:Core/Src/system_stm32f4xx.c ****       {
+ 250:Core/Src/system_stm32f4xx.c ****         /* HSI used as PLL clock source */
+ 251:Core/Src/system_stm32f4xx.c ****         pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+ 252:Core/Src/system_stm32f4xx.c ****       }
+ 253:Core/Src/system_stm32f4xx.c **** 
+ 254:Core/Src/system_stm32f4xx.c ****       pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+ 255:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 256:Core/Src/system_stm32f4xx.c ****       break;
+ 257:Core/Src/system_stm32f4xx.c ****     default:
+ 258:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = HSI_VALUE;
+  78              		.loc 1 258 7 view .LVU10
+  79              		.loc 1 258 23 is_stmt 0 view .LVU11
+  80 0012 1F4B     		ldr	r3, .L12+4
+  81              	.LVL1:
+  82              		.loc 1 258 23 view .LVU12
+  83 0014 1F4A     		ldr	r2, .L12+8
+  84 0016 1A60     		str	r2, [r3]
+ 259:Core/Src/system_stm32f4xx.c ****       break;
+  85              		.loc 1 259 7 is_stmt 1 view .LVU13
+  86 0018 02E0     		b	.L8
+ARM GAS  /tmp/cc9poKmu.s 			page 7
+
+
+  87              	.LVL2:
+  88              	.L11:
+ 230:Core/Src/system_stm32f4xx.c ****       break;
+  89              		.loc 1 230 7 view .LVU14
+ 230:Core/Src/system_stm32f4xx.c ****       break;
+  90              		.loc 1 230 23 is_stmt 0 view .LVU15
+  91 001a 1D4B     		ldr	r3, .L12+4
+  92              	.LVL3:
+ 230:Core/Src/system_stm32f4xx.c ****       break;
+  93              		.loc 1 230 23 view .LVU16
+  94 001c 1D4A     		ldr	r2, .L12+8
+  95 001e 1A60     		str	r2, [r3]
+ 231:Core/Src/system_stm32f4xx.c ****     case 0x04:  /* HSE used as system clock source */
+  96              		.loc 1 231 7 is_stmt 1 view .LVU17
+  97              	.L8:
+ 260:Core/Src/system_stm32f4xx.c ****   }
+ 261:Core/Src/system_stm32f4xx.c ****   /* Compute HCLK frequency --------------------------------------------------*/
+ 262:Core/Src/system_stm32f4xx.c ****   /* Get HCLK prescaler */
+ 263:Core/Src/system_stm32f4xx.c ****   tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  98              		.loc 1 263 3 view .LVU18
+  99              		.loc 1 263 28 is_stmt 0 view .LVU19
+ 100 0020 1A4B     		ldr	r3, .L12
+ 101 0022 9B68     		ldr	r3, [r3, #8]
+ 102              		.loc 1 263 52 view .LVU20
+ 103 0024 C3F30313 		ubfx	r3, r3, #4, #4
+ 104              		.loc 1 263 22 view .LVU21
+ 105 0028 1B4A     		ldr	r2, .L12+12
+ 106 002a D15C     		ldrb	r1, [r2, r3]	@ zero_extendqisi2
+ 107              	.LVL4:
+ 264:Core/Src/system_stm32f4xx.c ****   /* HCLK frequency */
+ 265:Core/Src/system_stm32f4xx.c ****   SystemCoreClock >>= tmp;
+ 108              		.loc 1 265 3 is_stmt 1 view .LVU22
+ 109              		.loc 1 265 19 is_stmt 0 view .LVU23
+ 110 002c 184A     		ldr	r2, .L12+4
+ 111 002e 1368     		ldr	r3, [r2]
+ 112 0030 CB40     		lsrs	r3, r3, r1
+ 113 0032 1360     		str	r3, [r2]
+ 266:Core/Src/system_stm32f4xx.c **** }
+ 114              		.loc 1 266 1 view .LVU24
+ 115 0034 7047     		bx	lr
+ 116              	.LVL5:
+ 117              	.L5:
+ 233:Core/Src/system_stm32f4xx.c ****       break;
+ 118              		.loc 1 233 7 is_stmt 1 view .LVU25
+ 233:Core/Src/system_stm32f4xx.c ****       break;
+ 119              		.loc 1 233 23 is_stmt 0 view .LVU26
+ 120 0036 164B     		ldr	r3, .L12+4
+ 121              	.LVL6:
+ 233:Core/Src/system_stm32f4xx.c ****       break;
+ 122              		.loc 1 233 23 view .LVU27
+ 123 0038 184A     		ldr	r2, .L12+16
+ 124 003a 1A60     		str	r2, [r3]
+ 234:Core/Src/system_stm32f4xx.c ****     case 0x08:  /* PLL used as system clock source */
+ 125              		.loc 1 234 7 is_stmt 1 view .LVU28
+ 126 003c F0E7     		b	.L8
+ 127              	.LVL7:
+ 128              	.L6:
+ARM GAS  /tmp/cc9poKmu.s 			page 8
+
+
+ 240:Core/Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 129              		.loc 1 240 7 view .LVU29
+ 240:Core/Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 130              		.loc 1 240 23 is_stmt 0 view .LVU30
+ 131 003e 134B     		ldr	r3, .L12
+ 132              	.LVL8:
+ 240:Core/Src/system_stm32f4xx.c ****       pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+ 133              		.loc 1 240 23 view .LVU31
+ 134 0040 5968     		ldr	r1, [r3, #4]
+ 135              	.LVL9:
+ 241:Core/Src/system_stm32f4xx.c ****       
+ 136              		.loc 1 241 7 is_stmt 1 view .LVU32
+ 241:Core/Src/system_stm32f4xx.c ****       
+ 137              		.loc 1 241 17 is_stmt 0 view .LVU33
+ 138 0042 5A68     		ldr	r2, [r3, #4]
+ 241:Core/Src/system_stm32f4xx.c ****       
+ 139              		.loc 1 241 12 view .LVU34
+ 140 0044 02F03F02 		and	r2, r2, #63
+ 141              	.LVL10:
+ 243:Core/Src/system_stm32f4xx.c ****       {
+ 142              		.loc 1 243 7 is_stmt 1 view .LVU35
+ 243:Core/Src/system_stm32f4xx.c ****       {
+ 143              		.loc 1 243 10 is_stmt 0 view .LVU36
+ 144 0048 11F4800F 		tst	r1, #4194304
+ 145 004c 13D0     		beq	.L9
+ 246:Core/Src/system_stm32f4xx.c ****       }
+ 146              		.loc 1 246 9 is_stmt 1 view .LVU37
+ 246:Core/Src/system_stm32f4xx.c ****       }
+ 147              		.loc 1 246 29 is_stmt 0 view .LVU38
+ 148 004e 134B     		ldr	r3, .L12+16
+ 149 0050 B3FBF2F3 		udiv	r3, r3, r2
+ 246:Core/Src/system_stm32f4xx.c ****       }
+ 150              		.loc 1 246 44 view .LVU39
+ 151 0054 0D4A     		ldr	r2, .L12
+ 152              	.LVL11:
+ 246:Core/Src/system_stm32f4xx.c ****       }
+ 153              		.loc 1 246 44 view .LVU40
+ 154 0056 5268     		ldr	r2, [r2, #4]
+ 246:Core/Src/system_stm32f4xx.c ****       }
+ 155              		.loc 1 246 74 view .LVU41
+ 156 0058 C2F38812 		ubfx	r2, r2, #6, #9
+ 246:Core/Src/system_stm32f4xx.c ****       }
+ 157              		.loc 1 246 16 view .LVU42
+ 158 005c 02FB03F3 		mul	r3, r2, r3
+ 159              	.LVL12:
+ 160              	.L10:
+ 254:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 161              		.loc 1 254 7 is_stmt 1 view .LVU43
+ 254:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 162              		.loc 1 254 20 is_stmt 0 view .LVU44
+ 163 0060 0A4A     		ldr	r2, .L12
+ 164 0062 5268     		ldr	r2, [r2, #4]
+ 254:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 165              		.loc 1 254 50 view .LVU45
+ 166 0064 C2F30142 		ubfx	r2, r2, #16, #2
+ 254:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 167              		.loc 1 254 56 view .LVU46
+ARM GAS  /tmp/cc9poKmu.s 			page 9
+
+
+ 168 0068 0132     		adds	r2, r2, #1
+ 254:Core/Src/system_stm32f4xx.c ****       SystemCoreClock = pllvco/pllp;
+ 169              		.loc 1 254 12 view .LVU47
+ 170 006a 5200     		lsls	r2, r2, #1
+ 171              	.LVL13:
+ 255:Core/Src/system_stm32f4xx.c ****       break;
+ 172              		.loc 1 255 7 is_stmt 1 view .LVU48
+ 255:Core/Src/system_stm32f4xx.c ****       break;
+ 173              		.loc 1 255 31 is_stmt 0 view .LVU49
+ 174 006c B3FBF2F3 		udiv	r3, r3, r2
+ 175              	.LVL14:
+ 255:Core/Src/system_stm32f4xx.c ****       break;
+ 176              		.loc 1 255 23 view .LVU50
+ 177 0070 074A     		ldr	r2, .L12+4
+ 178              	.LVL15:
+ 255:Core/Src/system_stm32f4xx.c ****       break;
+ 179              		.loc 1 255 23 view .LVU51
+ 180 0072 1360     		str	r3, [r2]
+ 256:Core/Src/system_stm32f4xx.c ****     default:
+ 181              		.loc 1 256 7 is_stmt 1 view .LVU52
+ 182 0074 D4E7     		b	.L8
+ 183              	.LVL16:
+ 184              	.L9:
+ 251:Core/Src/system_stm32f4xx.c ****       }
+ 185              		.loc 1 251 9 view .LVU53
+ 251:Core/Src/system_stm32f4xx.c ****       }
+ 186              		.loc 1 251 29 is_stmt 0 view .LVU54
+ 187 0076 074B     		ldr	r3, .L12+8
+ 188 0078 B3FBF2F3 		udiv	r3, r3, r2
+ 251:Core/Src/system_stm32f4xx.c ****       }
+ 189              		.loc 1 251 44 view .LVU55
+ 190 007c 034A     		ldr	r2, .L12
+ 191              	.LVL17:
+ 251:Core/Src/system_stm32f4xx.c ****       }
+ 192              		.loc 1 251 44 view .LVU56
+ 193 007e 5268     		ldr	r2, [r2, #4]
+ 251:Core/Src/system_stm32f4xx.c ****       }
+ 194              		.loc 1 251 74 view .LVU57
+ 195 0080 C2F38812 		ubfx	r2, r2, #6, #9
+ 251:Core/Src/system_stm32f4xx.c ****       }
+ 196              		.loc 1 251 16 view .LVU58
+ 197 0084 02FB03F3 		mul	r3, r2, r3
+ 198              	.LVL18:
+ 251:Core/Src/system_stm32f4xx.c ****       }
+ 199              		.loc 1 251 16 view .LVU59
+ 200 0088 EAE7     		b	.L10
+ 201              	.L13:
+ 202 008a 00BF     		.align	2
+ 203              	.L12:
+ 204 008c 00380240 		.word	1073887232
+ 205 0090 00000000 		.word	.LANCHOR0
+ 206 0094 0024F400 		.word	16000000
+ 207 0098 00000000 		.word	.LANCHOR1
+ 208 009c 00127A00 		.word	8000000
+ 209              		.cfi_endproc
+ 210              	.LFE135:
+ 212              		.global	APBPrescTable
+ARM GAS  /tmp/cc9poKmu.s 			page 10
+
+
+ 213              		.global	AHBPrescTable
+ 214              		.global	SystemCoreClock
+ 215              		.section	.data.SystemCoreClock,"aw"
+ 216              		.align	2
+ 217              		.set	.LANCHOR0,. + 0
+ 220              	SystemCoreClock:
+ 221 0000 0024F400 		.word	16000000
+ 222              		.section	.rodata.AHBPrescTable,"a"
+ 223              		.align	2
+ 224              		.set	.LANCHOR1,. + 0
+ 227              	AHBPrescTable:
+ 228 0000 00000000 		.ascii	"\000\000\000\000\000\000\000\000\001\002\003\004\006"
+ 228      00000000 
+ 228      01020304 
+ 228      06
+ 229 000d 070809   		.ascii	"\007\010\011"
+ 230              		.section	.rodata.APBPrescTable,"a"
+ 231              		.align	2
+ 234              	APBPrescTable:
+ 235 0000 00000000 		.ascii	"\000\000\000\000\001\002\003\004"
+ 235      01020304 
+ 236              		.text
+ 237              	.Letext0:
+ 238              		.file 2 "/usr/lib/gcc/arm-none-eabi/10.3.1/include/stdint.h"
+ 239              		.file 3 "Drivers/CMSIS/Include/core_cm4.h"
+ 240              		.file 4 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h"
+ 241              		.file 5 "Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h"
+ARM GAS  /tmp/cc9poKmu.s 			page 11
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 system_stm32f4xx.c
+     /tmp/cc9poKmu.s:18     .text.SystemInit:0000000000000000 $t
+     /tmp/cc9poKmu.s:26     .text.SystemInit:0000000000000000 SystemInit
+     /tmp/cc9poKmu.s:45     .text.SystemInit:0000000000000010 $d
+     /tmp/cc9poKmu.s:50     .text.SystemCoreClockUpdate:0000000000000000 $t
+     /tmp/cc9poKmu.s:57     .text.SystemCoreClockUpdate:0000000000000000 SystemCoreClockUpdate
+     /tmp/cc9poKmu.s:204    .text.SystemCoreClockUpdate:000000000000008c $d
+     /tmp/cc9poKmu.s:234    .rodata.APBPrescTable:0000000000000000 APBPrescTable
+     /tmp/cc9poKmu.s:227    .rodata.AHBPrescTable:0000000000000000 AHBPrescTable
+     /tmp/cc9poKmu.s:220    .data.SystemCoreClock:0000000000000000 SystemCoreClock
+     /tmp/cc9poKmu.s:216    .data.SystemCoreClock:0000000000000000 $d
+     /tmp/cc9poKmu.s:223    .rodata.AHBPrescTable:0000000000000000 $d
+     /tmp/cc9poKmu.s:231    .rodata.APBPrescTable:0000000000000000 $d
+
+NO UNDEFINED SYMBOLS