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https://github.com/ayabusa/Numworks-zeta-os.git
synced 2024-11-21 10:43:26 +00:00
started working on clock control, not working
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numworks_port/build/Laplace/clock.o
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numworks_port/build/Laplace/clock.o
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numworks_port/src/Laplace/clock.c
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numworks_port/src/Laplace/clock.c
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@ -0,0 +1,32 @@
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#include "clock.h"
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/* This should set the speed to 216MHz intead of just 48MHz */
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void init_clock(){
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// ACR means flash Access control register
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FLASH->ACR |= (FLASH_ACR_LATENCY_7WS | // 7 wait states
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FLASH_ACR_PRFTEN | // prefetch on
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FLASH_ACR_ARTEN); // ART on
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// enables HSE and wait for it to be ready
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RCC->CR |= (RCC_CR_HSEON);
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while (!(RCC->CR & RCC_CR_HSERDY)) {};
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// clear the specified bit
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// (8/4)*108 = 216MHz
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/*
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RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSE | // HSE: 8MHz
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RCC_PLLCFGR_PLLN_108 | // *108
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RCC_PLLCFGR_PLLM_25); // /4
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*/
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RCC->PLLCFGR = 0b00001000010000100110000000001000; // HSE: 8MHz*/
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// enable the RCC clock and wait for it to be ready
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RCC->CR |= (RCC_CR_PLLON);
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while (!(RCC->CR & RCC_CR_PLLRDY)) {};
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// set it as the system clock source
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RCC->CFGR &= ~(RCC_CFGR_SW);
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RCC->CFGR |= (RCC_CFGR_SW_PLL);
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while (!(RCC->CFGR & RCC_CFGR_SWS_PLL)) {};
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}
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25
numworks_port/src/Laplace/clock.h
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25
numworks_port/src/Laplace/clock.h
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/** @file clock.h
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*
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* @brief Handle clock init and all
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*
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*/
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#ifndef CLOCK_H
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#define CLOCK_H
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#include "stdint.h"
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#include "../device/stm32f730xx.h"
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#define PLL_N 384
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#define PLL_M 8
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#define PLL_P 2
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#define PLL_Q 8
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/*
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RCC->PLLCFGR |= 0b00001000010000100110000000001000; // HSE: 8MHz*/
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//0b0000/*<-null*/1000/*<-PLLQ*/0/*<-null*/1/*<-PLLPSRC(HSE)*/0000/*<-null*/10/*<-PLLP*/0/*<-null*/110000000/*<-PLLN*/001000/*<-PLLM*/
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void init_clock();
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#endif
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@ -10,4 +10,5 @@ void laplace_init(){
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enable_gpio_x_rcc(GPIO_C); //column (in)
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enable_gpio_x_rcc(GPIO_A); //row (out)
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keyboard_init();
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init_clock();
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}
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@ -10,6 +10,7 @@
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#include "gpio_helper.h"
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#include "led.h"
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#include "keyboard.h"
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#include "clock.h"
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/* Initialize all needed peripherals, should be called early in your program */
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void laplace_init();
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@ -9403,6 +9403,7 @@ typedef struct
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#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
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#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
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#define RCC_PLLCFGR_PLLN_8 (0x100UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00004000 */
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#define RCC_PLLCFGR_PLLN_384 (0x180UL << RCC_PLLCFGR_PLLN_Pos) /*!< ? */
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#define RCC_PLLCFGR_PLLP_Pos (16U)
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#define RCC_PLLCFGR_PLLP_Msk (0x3UL << RCC_PLLCFGR_PLLP_Pos) /*!< 0x00030000 */
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#define RCC_PLLCFGR_PLLP RCC_PLLCFGR_PLLP_Msk
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@ -4,7 +4,6 @@
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void main_entry(){
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// init all the peripherals
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laplace_init();
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ms_wait(2000);
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// infinite loop
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while (1){
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@ -27,12 +26,17 @@ void main_entry(){
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}
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}
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}*/
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/*
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if(get_key('G', 3)){
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set_led_red(true);
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}else{
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set_led_red(false);
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}
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}*/
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set_led_red(true);
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ms_wait(5000);
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set_led_red(false);
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ms_wait(5000);
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}
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}
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