mirror of
https://github.com/ayabusa/Numworks-zeta-os.git
synced 2024-11-22 02:53:25 +00:00
started working on clock control, not working
This commit is contained in:
parent
3a4fa32c93
commit
ee23bf80fd
BIN
numworks_port/build/Laplace/clock.o
Normal file
BIN
numworks_port/build/Laplace/clock.o
Normal file
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
Binary file not shown.
32
numworks_port/src/Laplace/clock.c
Normal file
32
numworks_port/src/Laplace/clock.c
Normal file
@ -0,0 +1,32 @@
|
|||||||
|
#include "clock.h"
|
||||||
|
|
||||||
|
/* This should set the speed to 216MHz intead of just 48MHz */
|
||||||
|
void init_clock(){
|
||||||
|
// ACR means flash Access control register
|
||||||
|
FLASH->ACR |= (FLASH_ACR_LATENCY_7WS | // 7 wait states
|
||||||
|
FLASH_ACR_PRFTEN | // prefetch on
|
||||||
|
FLASH_ACR_ARTEN); // ART on
|
||||||
|
|
||||||
|
// enables HSE and wait for it to be ready
|
||||||
|
RCC->CR |= (RCC_CR_HSEON);
|
||||||
|
while (!(RCC->CR & RCC_CR_HSERDY)) {};
|
||||||
|
|
||||||
|
// clear the specified bit
|
||||||
|
|
||||||
|
// (8/4)*108 = 216MHz
|
||||||
|
/*
|
||||||
|
RCC->PLLCFGR |= (RCC_PLLCFGR_PLLSRC_HSE | // HSE: 8MHz
|
||||||
|
RCC_PLLCFGR_PLLN_108 | // *108
|
||||||
|
RCC_PLLCFGR_PLLM_25); // /4
|
||||||
|
*/
|
||||||
|
RCC->PLLCFGR = 0b00001000010000100110000000001000; // HSE: 8MHz*/
|
||||||
|
|
||||||
|
// enable the RCC clock and wait for it to be ready
|
||||||
|
RCC->CR |= (RCC_CR_PLLON);
|
||||||
|
while (!(RCC->CR & RCC_CR_PLLRDY)) {};
|
||||||
|
|
||||||
|
// set it as the system clock source
|
||||||
|
RCC->CFGR &= ~(RCC_CFGR_SW);
|
||||||
|
RCC->CFGR |= (RCC_CFGR_SW_PLL);
|
||||||
|
while (!(RCC->CFGR & RCC_CFGR_SWS_PLL)) {};
|
||||||
|
}
|
25
numworks_port/src/Laplace/clock.h
Normal file
25
numworks_port/src/Laplace/clock.h
Normal file
@ -0,0 +1,25 @@
|
|||||||
|
/** @file clock.h
|
||||||
|
*
|
||||||
|
* @brief Handle clock init and all
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CLOCK_H
|
||||||
|
#define CLOCK_H
|
||||||
|
|
||||||
|
#include "stdint.h"
|
||||||
|
#include "../device/stm32f730xx.h"
|
||||||
|
|
||||||
|
#define PLL_N 384
|
||||||
|
#define PLL_M 8
|
||||||
|
#define PLL_P 2
|
||||||
|
#define PLL_Q 8
|
||||||
|
|
||||||
|
/*
|
||||||
|
RCC->PLLCFGR |= 0b00001000010000100110000000001000; // HSE: 8MHz*/
|
||||||
|
//0b0000/*<-null*/1000/*<-PLLQ*/0/*<-null*/1/*<-PLLPSRC(HSE)*/0000/*<-null*/10/*<-PLLP*/0/*<-null*/110000000/*<-PLLN*/001000/*<-PLLM*/
|
||||||
|
|
||||||
|
|
||||||
|
void init_clock();
|
||||||
|
|
||||||
|
#endif
|
@ -10,4 +10,5 @@ void laplace_init(){
|
|||||||
enable_gpio_x_rcc(GPIO_C); //column (in)
|
enable_gpio_x_rcc(GPIO_C); //column (in)
|
||||||
enable_gpio_x_rcc(GPIO_A); //row (out)
|
enable_gpio_x_rcc(GPIO_A); //row (out)
|
||||||
keyboard_init();
|
keyboard_init();
|
||||||
|
init_clock();
|
||||||
}
|
}
|
@ -10,6 +10,7 @@
|
|||||||
#include "gpio_helper.h"
|
#include "gpio_helper.h"
|
||||||
#include "led.h"
|
#include "led.h"
|
||||||
#include "keyboard.h"
|
#include "keyboard.h"
|
||||||
|
#include "clock.h"
|
||||||
|
|
||||||
/* Initialize all needed peripherals, should be called early in your program */
|
/* Initialize all needed peripherals, should be called early in your program */
|
||||||
void laplace_init();
|
void laplace_init();
|
||||||
|
@ -9403,6 +9403,7 @@ typedef struct
|
|||||||
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
|
#define RCC_PLLCFGR_PLLN_6 (0x040UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00001000 */
|
||||||
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
|
#define RCC_PLLCFGR_PLLN_7 (0x080UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00002000 */
|
||||||
#define RCC_PLLCFGR_PLLN_8 (0x100UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00004000 */
|
#define RCC_PLLCFGR_PLLN_8 (0x100UL << RCC_PLLCFGR_PLLN_Pos) /*!< 0x00004000 */
|
||||||
|
#define RCC_PLLCFGR_PLLN_384 (0x180UL << RCC_PLLCFGR_PLLN_Pos) /*!< ? */
|
||||||
#define RCC_PLLCFGR_PLLP_Pos (16U)
|
#define RCC_PLLCFGR_PLLP_Pos (16U)
|
||||||
#define RCC_PLLCFGR_PLLP_Msk (0x3UL << RCC_PLLCFGR_PLLP_Pos) /*!< 0x00030000 */
|
#define RCC_PLLCFGR_PLLP_Msk (0x3UL << RCC_PLLCFGR_PLLP_Pos) /*!< 0x00030000 */
|
||||||
#define RCC_PLLCFGR_PLLP RCC_PLLCFGR_PLLP_Msk
|
#define RCC_PLLCFGR_PLLP RCC_PLLCFGR_PLLP_Msk
|
||||||
|
@ -4,7 +4,6 @@
|
|||||||
void main_entry(){
|
void main_entry(){
|
||||||
// init all the peripherals
|
// init all the peripherals
|
||||||
laplace_init();
|
laplace_init();
|
||||||
ms_wait(2000);
|
|
||||||
|
|
||||||
// infinite loop
|
// infinite loop
|
||||||
while (1){
|
while (1){
|
||||||
@ -27,12 +26,17 @@ void main_entry(){
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}*/
|
}*/
|
||||||
|
/*
|
||||||
if(get_key('G', 3)){
|
if(get_key('G', 3)){
|
||||||
set_led_red(true);
|
set_led_red(true);
|
||||||
}else{
|
}else{
|
||||||
set_led_red(false);
|
set_led_red(false);
|
||||||
}
|
}*/
|
||||||
|
|
||||||
|
set_led_red(true);
|
||||||
|
ms_wait(5000);
|
||||||
|
set_led_red(false);
|
||||||
|
ms_wait(5000);
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
Loading…
Reference in New Issue
Block a user